AU2001295860A1 - Soft decision maximum likelihood encoder and decoder - Google Patents
Soft decision maximum likelihood encoder and decoderInfo
- Publication number
- AU2001295860A1 AU2001295860A1 AU2001295860A AU9586001A AU2001295860A1 AU 2001295860 A1 AU2001295860 A1 AU 2001295860A1 AU 2001295860 A AU2001295860 A AU 2001295860A AU 9586001 A AU9586001 A AU 9586001A AU 2001295860 A1 AU2001295860 A1 AU 2001295860A1
- Authority
- AU
- Australia
- Prior art keywords
- decoder
- maximum likelihood
- soft decision
- decision maximum
- encoder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/45—Soft decoding, i.e. using symbol reliability information
- H03M13/451—Soft decoding, i.e. using symbol reliability information using a set of candidate code words, e.g. ordered statistics decoding [OSD]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/45—Soft decoding, i.e. using symbol reliability information
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
- H03M13/098—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit using single parity bit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/134—Non-binary linear block codes not provided for otherwise
Landscapes
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/686,237 | 2000-10-11 | ||
US09/686,237 US6654926B1 (en) | 2000-10-11 | 2000-10-11 | Soft decision maximum likelihood encoder and decoder |
PCT/IL2001/000920 WO2002031983A2 (fr) | 2000-10-11 | 2001-10-03 | Codeur et decodeur de vraisemblance maximum a decision ponderee |
Publications (1)
Publication Number | Publication Date |
---|---|
AU2001295860A1 true AU2001295860A1 (en) | 2002-04-22 |
Family
ID=24755489
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2001295860A Abandoned AU2001295860A1 (en) | 2000-10-11 | 2001-10-03 | Soft decision maximum likelihood encoder and decoder |
Country Status (3)
Country | Link |
---|---|
US (1) | US6654926B1 (fr) |
AU (1) | AU2001295860A1 (fr) |
WO (1) | WO2002031983A2 (fr) |
Families Citing this family (46)
Publication number | Priority date | Publication date | Assignee | Title |
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US7394877B2 (en) * | 2001-12-20 | 2008-07-01 | Texas Instruments Incorporated | Low-power packet detection using decimated correlation |
US7073115B2 (en) * | 2001-12-28 | 2006-07-04 | Network Appliance, Inc. | Correcting multiple block data loss in a storage array using a combination of a single diagonal parity group and multiple row parity groups |
JP2003203435A (ja) * | 2002-01-09 | 2003-07-18 | Fujitsu Ltd | データ再生装置 |
US7633976B2 (en) * | 2002-09-19 | 2009-12-15 | Industrial Technology Research Institute | Method and apparatus for code group identification and frame synchronization by use of Reed-Solomon decoder and reliability measurement for UMTS W-CDMA |
US7581156B2 (en) * | 2002-12-16 | 2009-08-25 | Microsoft Corporation | Systems and methods for providing improved encoding and reconstruction of data |
US7627029B2 (en) | 2003-05-20 | 2009-12-01 | Rambus Inc. | Margin test methods and circuits |
US7590175B2 (en) * | 2003-05-20 | 2009-09-15 | Rambus Inc. | DFE margin test methods and circuits that decouple sample and feedback timing |
US7281177B2 (en) * | 2003-07-14 | 2007-10-09 | International Business Machines Corporation | Autonomic parity exchange |
JP2005184232A (ja) * | 2003-12-17 | 2005-07-07 | Sony Corp | 符号化装置、プログラム、およびデータ処理方法 |
US7328395B1 (en) | 2004-04-13 | 2008-02-05 | Marvell International Ltd. | Iterative Reed-Solomon error-correction decoding |
US7269781B2 (en) * | 2004-06-25 | 2007-09-11 | Hewlett-Packard Development Company, L.P. | Discrete universal denoising with reliability information |
US20050289433A1 (en) * | 2004-06-25 | 2005-12-29 | Itschak Weissman | Discrete universal denoising with error correction coding |
KR100643150B1 (ko) * | 2005-01-05 | 2006-11-10 | 오소트론 주식회사 | 첩 신호의 반복 시간 간격 차이를 이용한 차분적 직교변조 방법 및 장치 |
US7587657B2 (en) * | 2005-04-29 | 2009-09-08 | Agere Systems Inc. | Method and apparatus for iterative error-erasure decoding |
US7434146B1 (en) | 2005-05-06 | 2008-10-07 | Helwett-Packard Development Company, L.P. | Denoising and error correction for finite input, general output channel |
US7971131B1 (en) | 2005-05-06 | 2011-06-28 | Hewlett-Packard Development Company, L.P. | System and method for iterative denoising and error correction decoding |
US7398453B2 (en) * | 2005-10-03 | 2008-07-08 | Motorola, Inc. | Method and apparatus for a low-density parity-check decoder |
US8149925B2 (en) * | 2006-03-23 | 2012-04-03 | Intel Corporation | Chase algorithm based differential decoder for soft decision Reed Solomon decoding in a QAM system |
US8031816B2 (en) * | 2006-07-17 | 2011-10-04 | Mediatek Inc. | Method and apparatus for determining boundaries of information elements |
EP1931037A1 (fr) * | 2006-12-07 | 2008-06-11 | Deutsche Thomson OHG | Méthode et dispositif pour le traitement des données d'un canal de transmission ou d'un canal d'enregistrement |
KR101366332B1 (ko) * | 2007-04-19 | 2014-02-21 | 엘지전자 주식회사 | 통신 시스템에서의 데이터 블록 재전송 방법 |
KR101412174B1 (ko) * | 2007-10-17 | 2014-06-26 | 삼성전자주식회사 | 이동통신 시스템의 복호 장치 및 방법 |
CA2660073A1 (fr) * | 2008-03-25 | 2009-09-25 | Kenneth Gracie | Traitement d'elimination des donnees superflues d'evenements permettant d'ameliorer le fonctionnement des decodeurs sequentiels |
US8295326B1 (en) | 2008-06-12 | 2012-10-23 | University Of South Florida | Digital coding scheme for data transmission |
KR101450759B1 (ko) * | 2008-07-07 | 2014-10-16 | 삼성전자주식회사 | 무선 통신시스템에서 복합 재 전송 데이터를 결합하는 방법및 장치 |
TWI430585B (zh) * | 2008-09-30 | 2014-03-11 | Realtek Semiconductor Corp | 區塊碼解碼方法與裝置 |
US8738981B2 (en) * | 2008-10-24 | 2014-05-27 | Qualcomm Incorporated | Method and apparatus for H-ARQ scheduling in a wireless communication system |
US8467480B2 (en) * | 2009-09-14 | 2013-06-18 | Qualcomm Incorporated | Combining decision metrics for decoding based on payload difference |
US8750176B2 (en) | 2010-12-22 | 2014-06-10 | Apple Inc. | Methods and apparatus for the intelligent association of control symbols |
US8868999B1 (en) * | 2011-01-06 | 2014-10-21 | Marvell International Ltd. | Systems and methods for erasure correction of iterative codes |
US9838226B2 (en) | 2012-01-27 | 2017-12-05 | Apple Inc. | Methods and apparatus for the intelligent scrambling of control symbols |
US8897398B2 (en) * | 2012-01-27 | 2014-11-25 | Apple Inc. | Methods and apparatus for error rate estimation |
US8996950B2 (en) | 2012-02-23 | 2015-03-31 | Sandisk Technologies Inc. | Erasure correction using single error detection parity |
US8898552B2 (en) * | 2012-04-24 | 2014-11-25 | Samsung Electronics Co., Ltd. | Communication system with blind decoding mechanism and method of operation thereof |
US9197365B2 (en) * | 2012-09-25 | 2015-11-24 | Nvidia Corporation | Decoding a coded data block |
US9450790B2 (en) | 2013-01-31 | 2016-09-20 | Apple Inc. | Methods and apparatus for enabling and disabling scrambling of control symbols |
US9210010B2 (en) | 2013-03-15 | 2015-12-08 | Apple, Inc. | Methods and apparatus for scrambling symbols over multi-lane serial interfaces |
US9379739B2 (en) * | 2014-08-11 | 2016-06-28 | Qualcomm Incorporated | Devices and methods for data recovery of control channels in wireless communications |
JP2017022651A (ja) * | 2015-07-14 | 2017-01-26 | ルネサスエレクトロニクス株式会社 | 誤り訂正装置、半導体記憶装置、および誤り訂正方法 |
GB2545260A (en) * | 2015-12-11 | 2017-06-14 | Nordic Semiconductor Asa | Signal processing |
EP3264622B1 (fr) * | 2016-07-01 | 2019-03-27 | Semtech Corporation | Récepteur radio longue portée à faible puissance, de faible complexité |
JP6957392B2 (ja) * | 2018-03-15 | 2021-11-02 | キオクシア株式会社 | メモリシステム |
US10707996B2 (en) | 2018-04-06 | 2020-07-07 | International Business Machines Corporation | Error correcting codes with bayes decoder and optimized codebook |
US10944428B2 (en) * | 2019-04-29 | 2021-03-09 | Intel Corporation | Device, system and method for determining bit reliability information |
RU2725699C1 (ru) * | 2019-08-27 | 2020-07-03 | Акционерное общество "Калужский научно-исследовательский институт телемеханических устройств" | Способ мягкого декодирования помехоустойчивого кода |
RU2738724C1 (ru) * | 2020-06-02 | 2020-12-16 | Акционерное общество "Калужский научно-исследовательский институт телемеханических устройств" | Способ мягкого декодирования помехоустойчивого кода |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5461629A (en) | 1992-09-09 | 1995-10-24 | Echelon Corporation | Error correction in a spread spectrum transceiver |
FI940322A (fi) | 1993-01-25 | 1994-07-26 | Hughes Aircraft Co | Parannettu virheen korjaava dekooderi ja menetelmä vastaanottajille digitaalisissa solukkokommunikaatiojärjestelmissä |
FR2712760B1 (fr) | 1993-11-19 | 1996-01-26 | France Telecom | Procédé pour transmettre des bits d'information en appliquant des codes en blocs concaténés. |
US6064695A (en) | 1997-06-20 | 2000-05-16 | Itran Communications Ltd. | Spread spectrum communication system utilizing differential code shift keying |
FR2778289B1 (fr) | 1998-05-04 | 2000-06-09 | Alsthom Cge Alcatel | Decodage iteratif de codes produits |
-
2000
- 2000-10-11 US US09/686,237 patent/US6654926B1/en not_active Expired - Fee Related
-
2001
- 2001-10-03 WO PCT/IL2001/000920 patent/WO2002031983A2/fr active Application Filing
- 2001-10-03 AU AU2001295860A patent/AU2001295860A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
US6654926B1 (en) | 2003-11-25 |
WO2002031983A2 (fr) | 2002-04-18 |
WO2002031983A3 (fr) | 2003-05-30 |
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