AU2001290092A1 - Methods and apparatus for regulating process state control messages - Google Patents

Methods and apparatus for regulating process state control messages

Info

Publication number
AU2001290092A1
AU2001290092A1 AU2001290092A AU9009201A AU2001290092A1 AU 2001290092 A1 AU2001290092 A1 AU 2001290092A1 AU 2001290092 A AU2001290092 A AU 2001290092A AU 9009201 A AU9009201 A AU 9009201A AU 2001290092 A1 AU2001290092 A1 AU 2001290092A1
Authority
AU
Australia
Prior art keywords
queue
item
processes
current state
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001290092A
Other languages
English (en)
Inventor
David Alan Gilbert
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Power X Ltd
Original Assignee
Power X Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Power X Ltd filed Critical Power X Ltd
Publication of AU2001290092A1 publication Critical patent/AU2001290092A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/10—Flow control; Congestion control
    • H04L47/30—Flow control; Congestion control in combination with information about buffer occupancy at either end or at transit nodes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/10—Flow control; Congestion control
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/10—Flow control; Congestion control
    • H04L47/26—Flow control; Congestion control using explicit feedback to the source, e.g. choke packets
    • H04L47/263—Rate modification at the source after receiving feedback

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Multi Processors (AREA)
  • Debugging And Monitoring (AREA)
  • Retry When Errors Occur (AREA)
  • Testing And Monitoring For Control Systems (AREA)
AU2001290092A 2000-10-18 2001-09-21 Methods and apparatus for regulating process state control messages Abandoned AU2001290092A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB0025490.4 2000-10-18
GB0025490A GB2368247A (en) 2000-10-18 2000-10-18 Method and apparatus for regulating process state control messages
PCT/GB2001/004262 WO2002033548A2 (en) 2000-10-18 2001-09-21 Methods and apparatus for regulating process state control messages

Publications (1)

Publication Number Publication Date
AU2001290092A1 true AU2001290092A1 (en) 2002-04-29

Family

ID=9901502

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001290092A Abandoned AU2001290092A1 (en) 2000-10-18 2001-09-21 Methods and apparatus for regulating process state control messages

Country Status (7)

Country Link
US (1) US7137122B2 (de)
EP (1) EP1399817B1 (de)
AT (1) ATE486317T1 (de)
AU (1) AU2001290092A1 (de)
DE (1) DE60143365D1 (de)
GB (1) GB2368247A (de)
WO (1) WO2002033548A2 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090216641A1 (en) * 2000-03-30 2009-08-27 Niration Network Group, L.L.C. Methods and Systems for Indexing Content
JP3908483B2 (ja) * 2001-06-28 2007-04-25 富士通株式会社 通信装置
US7546399B2 (en) * 2002-03-25 2009-06-09 Intel Corporation Store and forward device utilizing cache to store status information for active queues
JP3882760B2 (ja) * 2003-02-18 2007-02-21 株式会社デンソー タスク間通信方法、プログラム、記録媒体、電子機器
FR2858895B1 (fr) 2003-08-13 2006-05-05 Arteris Procede et dispositif de gestion de priorite lors de la transmission d'un message
US20050071848A1 (en) * 2003-09-29 2005-03-31 Ellen Kempin Automatic registration and deregistration of message queues
US20050262055A1 (en) * 2004-05-20 2005-11-24 International Business Machines Corporation Enforcing message ordering
US7680053B1 (en) * 2004-10-29 2010-03-16 Marvell International Ltd. Inter-device flow control
US9621375B2 (en) 2006-09-12 2017-04-11 Ciena Corporation Smart Ethernet edge networking system
US8031198B1 (en) * 2006-10-31 2011-10-04 Nvidia Corporation Apparatus and method for servicing multiple graphics processing channels
US8645960B2 (en) * 2007-07-23 2014-02-04 Redknee Inc. Method and apparatus for data processing using queuing
US8819161B1 (en) 2010-01-18 2014-08-26 Marvell International Ltd. Auto-syntonization and time-of-day synchronization for master-slave physical layer devices
GB2502220A (en) * 2011-03-14 2013-11-20 Hewlett Packard Development Co Synchronize a process state
US8706936B2 (en) 2011-11-14 2014-04-22 Arm Limited Integrated circuit having a bus network, and method for the integrated circuit
JP6090681B2 (ja) * 2012-04-13 2017-03-08 ゴールドマン，サックス アンド カンパニー スケーラブルな構造化データ配布のためのシステム及び方法
US20170118108A1 (en) * 2015-10-27 2017-04-27 Futurewei Technologies, Inc. Real Time Priority Selection Engine for Improved Burst Tolerance

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02149152A (ja) * 1988-11-30 1990-06-07 Nec Corp 伝送制御方法
US6157967A (en) * 1992-12-17 2000-12-05 Tandem Computer Incorporated Method of data communication flow control in a data processing system using busy/ready commands
US5581705A (en) * 1993-12-13 1996-12-03 Cray Research, Inc. Messaging facility with hardware tail pointer and software implemented head pointer message queue for distributed memory massively parallel processing system
US5925099A (en) * 1995-06-15 1999-07-20 Intel Corporation Method and apparatus for transporting messages between processors in a multiple processor system
US6032188A (en) * 1997-03-12 2000-02-29 Microsoft Corporation Method and system for controlling data flow
JP3137086B2 (ja) 1998-08-18 2001-02-19 日本電気株式会社 フロー制御システム
JP2000101676A (ja) 1998-09-22 2000-04-07 Matsushita Electric Ind Co Ltd データ通信方式
GB9828144D0 (en) 1998-12-22 1999-02-17 Power X Limited Data switching apparatus
CA2292828A1 (en) * 1999-12-22 2001-06-22 Nortel Networks Corporation Method and apparatus for traffic flow control in data switches

Also Published As

Publication number Publication date
US20020065865A1 (en) 2002-05-30
EP1399817B1 (de) 2010-10-27
WO2002033548A2 (en) 2002-04-25
GB0025490D0 (en) 2000-11-29
EP1399817A2 (de) 2004-03-24
GB2368247A (en) 2002-04-24
US7137122B2 (en) 2006-11-14
ATE486317T1 (de) 2010-11-15
WO2002033548A3 (en) 2004-01-08
DE60143365D1 (de) 2010-12-09

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