AU2001279186A1 - Method and system for providing gated clock signal to a csr block - Google Patents
Method and system for providing gated clock signal to a csr blockInfo
- Publication number
- AU2001279186A1 AU2001279186A1 AU2001279186A AU7918601A AU2001279186A1 AU 2001279186 A1 AU2001279186 A1 AU 2001279186A1 AU 2001279186 A AU2001279186 A AU 2001279186A AU 7918601 A AU7918601 A AU 7918601A AU 2001279186 A1 AU2001279186 A1 AU 2001279186A1
- Authority
- AU
- Australia
- Prior art keywords
- clock signal
- gated clock
- csr block
- providing gated
- csr
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3237—Power saving characterised by the action undertaken by disabling clock generation or distribution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/325—Power saving in peripheral device
- G06F1/3253—Power saving in bus
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/632,476 | 2000-08-04 | ||
US09/632,476 US6675305B1 (en) | 2000-08-04 | 2000-08-04 | Power saving in a USB peripheral by providing gated clock signal to CSR block in response to a local interrupt generated when an operation is to be performed |
PCT/US2001/024481 WO2002012988A1 (en) | 2000-08-04 | 2001-08-03 | Method and system for providing gated clock signal to a csr block |
Publications (1)
Publication Number | Publication Date |
---|---|
AU2001279186A1 true AU2001279186A1 (en) | 2002-02-18 |
Family
ID=24535666
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2001279186A Abandoned AU2001279186A1 (en) | 2000-08-04 | 2001-08-03 | Method and system for providing gated clock signal to a csr block |
Country Status (3)
Country | Link |
---|---|
US (1) | US6675305B1 (en) |
AU (1) | AU2001279186A1 (en) |
WO (1) | WO2002012988A1 (en) |
Families Citing this family (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE60034345D1 (en) * | 2000-11-03 | 2007-05-24 | St Microelectronics Srl | Shutdown protocol for integrated circuits |
US6950960B2 (en) * | 2001-07-17 | 2005-09-27 | Synopsys, Inc. | Disabling a clock signal to a peripheral interface engine block during peripheral operation in a selected operational mode |
US20030018924A1 (en) * | 2001-07-20 | 2003-01-23 | Mohammad Saleem Chisty | Method and system for providing clock signal to a CSR/RMON block |
US6961864B2 (en) * | 2002-05-16 | 2005-11-01 | Intel Corporation | Method and apparatus for terminating clock signals upon disconnection of clock trace from ground |
US6934865B2 (en) | 2002-07-09 | 2005-08-23 | University Of Massachusetts | Controlling a processor resource based on a compile-time prediction of number of instructions-per-cycle that will be executed across plural cycles by the processor |
US7278136B2 (en) * | 2002-07-09 | 2007-10-02 | University Of Massachusetts | Reducing processor energy consumption using compile-time information |
US7493607B2 (en) * | 2002-07-09 | 2009-02-17 | Bluerisc Inc. | Statically speculative compilation and execution |
KR100480084B1 (en) * | 2003-07-23 | 2005-04-06 | 엘지전자 주식회사 | A system for transmitting data using universal serial bus |
WO2005022379A2 (en) * | 2003-08-28 | 2005-03-10 | Koninklijke Philips Electronics, N.V. | Variable input phase for a microcontroller instruction |
US20050114850A1 (en) | 2003-10-29 | 2005-05-26 | Saurabh Chheda | Energy-focused re-compilation of executables and hardware mechanisms based on compiler-architecture interaction and compiler-inserted control |
US7996671B2 (en) | 2003-11-17 | 2011-08-09 | Bluerisc Inc. | Security of program executables and microprocessors based on compiler-architecture interaction |
US8607209B2 (en) | 2004-02-04 | 2013-12-10 | Bluerisc Inc. | Energy-focused compiler-assisted branch prediction |
CN100416531C (en) * | 2004-08-30 | 2008-09-03 | 旺玖科技股份有限公司 | Multifunctional generalserial bus wireless bridge device and system device |
DE102004057756B4 (en) * | 2004-11-30 | 2009-08-06 | Advanced Micro Devices Inc., Sunnyvale | USB control device with OTG control unit |
EP1817677B1 (en) * | 2004-11-30 | 2013-03-13 | Advanced Micro Devices, Inc. | Usb on-the-go controller |
JP2006236241A (en) * | 2005-02-28 | 2006-09-07 | Toshiba Corp | Peripheral device |
TWI266197B (en) * | 2005-04-11 | 2006-11-11 | Wistron Corp | Method for enabling or disabling a peripheral maintaining electrically connected to a computer system |
US8223910B2 (en) * | 2005-06-10 | 2012-07-17 | Freescale Semiconductor, Inc. | Method and device for frame synchronization |
EP1894114B1 (en) * | 2005-06-10 | 2014-08-13 | Freescale Semiconductor, Inc. | Device and method for media access control |
US20070294181A1 (en) * | 2006-05-22 | 2007-12-20 | Saurabh Chheda | Flexible digital rights management with secure snippets |
US20080126766A1 (en) | 2006-11-03 | 2008-05-29 | Saurabh Chheda | Securing microprocessors against information leakage and physical tampering |
GB2450564B (en) | 2007-06-29 | 2011-03-02 | Imagination Tech Ltd | Clock frequency adjustment for semi-conductor devices |
US8074195B2 (en) * | 2008-06-27 | 2011-12-06 | Freescale Semiconductor, Inc. | System and method for evaluating a dynamic power consumption of a block |
JP6936543B2 (en) * | 2015-11-13 | 2021-09-15 | テキサス インスツルメンツ インコーポレイテッド | USB interface circuits and methods for low power operation |
KR102453113B1 (en) | 2015-12-16 | 2022-10-12 | 삼성전자주식회사 | Signal transmitting circuit reducing power at standby state |
WO2022271154A1 (en) * | 2021-06-22 | 2022-12-29 | Google Llc | Independent clocking for configuration and status registers |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5438681A (en) * | 1993-08-24 | 1995-08-01 | Mensch, Jr.; William D. | Topography for CMOS microcomputer |
EP0656579B1 (en) * | 1993-12-01 | 2003-05-21 | Advanced Micro Devices, Inc. | Power management for computer system and method therefor |
EP0666529B1 (en) * | 1994-02-02 | 2004-10-06 | Advanced Micro Devices, Inc. | Power management in an asynchronus receiver/transmitter |
US5815725A (en) * | 1996-04-03 | 1998-09-29 | Sun Microsystems, Inc. | Apparatus and method for reducing power consumption in microprocessors through selective gating of clock signals |
US5834961A (en) * | 1996-12-27 | 1998-11-10 | Pacific Communication Sciences, Inc. | Gated-clock registers for low-power circuitry |
US6105142A (en) * | 1997-02-11 | 2000-08-15 | Vlsi Technology, Inc. | Intelligent power management interface for computer system hardware |
US5987617A (en) * | 1997-09-30 | 1999-11-16 | Intel Corporation | Low ICC enumeration scheme for bus powered USB device |
US6370603B1 (en) * | 1997-12-31 | 2002-04-09 | Kawasaki Microelectronics, Inc. | Configurable universal serial bus (USB) controller implemented on a single integrated circuit (IC) chip with media access control (MAC) |
US6119194A (en) * | 1998-03-19 | 2000-09-12 | Advanced Micro Devices, Inc. | Method and apparatus for monitoring universal serial bus activity |
US6467042B1 (en) * | 2000-12-27 | 2002-10-15 | Cypress Semiconductor Corporation | Method and/or apparatus for lowering power consumption in a peripheral device |
-
2000
- 2000-08-04 US US09/632,476 patent/US6675305B1/en not_active Expired - Lifetime
-
2001
- 2001-08-03 AU AU2001279186A patent/AU2001279186A1/en not_active Abandoned
- 2001-08-03 WO PCT/US2001/024481 patent/WO2002012988A1/en active Application Filing
Also Published As
Publication number | Publication date |
---|---|
US6675305B1 (en) | 2004-01-06 |
WO2002012988A9 (en) | 2003-04-03 |
WO2002012988A1 (en) | 2002-02-14 |
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