AU1440899A - Method and apparatus for manufacturing double sided or multi-layered printed circuit boards - Google Patents

Method and apparatus for manufacturing double sided or multi-layered printed circuit boards

Info

Publication number
AU1440899A
AU1440899A AU14408/99A AU1440899A AU1440899A AU 1440899 A AU1440899 A AU 1440899A AU 14408/99 A AU14408/99 A AU 14408/99A AU 1440899 A AU1440899 A AU 1440899A AU 1440899 A AU1440899 A AU 1440899A
Authority
AU
Australia
Prior art keywords
printed circuit
circuit boards
double sided
layered printed
manufacturing double
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU14408/99A
Inventor
Karl Michael Wallis
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GBGB9724981.7A external-priority patent/GB9724981D0/en
Application filed by Individual filed Critical Individual
Publication of AU1440899A publication Critical patent/AU1440899A/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/423Plated through-holes or plated via connections characterised by electroplating method
    • H05K3/424Plated through-holes or plated via connections characterised by electroplating method by direct electroplating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0355Metal foils
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09981Metallised walls
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/025Abrading, e.g. grinding or sand blasting
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05Patterning and lithography; Masks; Details of resist
    • H05K2203/0548Masks
    • H05K2203/0554Metal used as mask for etching vias, e.g. by laser ablation
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/425Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/427Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
AU14408/99A 1997-11-26 1998-11-26 Method and apparatus for manufacturing double sided or multi-layered printed circuit boards Abandoned AU1440899A (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
GB9724981 1997-11-26
GBGB9724981.7A GB9724981D0 (en) 1997-11-26 1997-11-26 Printed circuit
GBGB9819202.4A GB9819202D0 (en) 1997-11-26 1998-09-04 Improvements in or relating to printed circuit boards
GB9819202 1998-09-04
PCT/GB1998/003512 WO1999027760A1 (en) 1997-11-26 1998-11-26 Method and apparatus for manufacturing double sided or multi-layered printed circuit boards

Publications (1)

Publication Number Publication Date
AU1440899A true AU1440899A (en) 1999-06-15

Family

ID=26312659

Family Applications (1)

Application Number Title Priority Date Filing Date
AU14408/99A Abandoned AU1440899A (en) 1997-11-26 1998-11-26 Method and apparatus for manufacturing double sided or multi-layered printed circuit boards

Country Status (3)

Country Link
AU (1) AU1440899A (en)
GB (1) GB2349279B (en)
WO (1) WO1999027760A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102013107505A1 (en) * 2013-07-16 2015-01-22 Thyssenkrupp Rasselstein Gmbh Process for applying an aqueous treatment solution to the surface of a moving steel belt

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1137331B (en) * 1981-04-10 1986-09-10 Italtel Spa METHOD TO MAKE CONDUCTIVE THROUGH HOLES IN SUPPORTS FOR ELECTRIC CIRCUITS
IT1165498B (en) * 1983-12-20 1987-04-22 Italtel Spa METHOD FOR COATING THE WALLS OF HOLES THROUGH SUPPORTS FOR ELECTRIC CIRCUITS AND MACHINE TO IMPLEMENT TLAE WITH AN INK
US4585502A (en) * 1984-04-27 1986-04-29 Hitachi Condenser Co., Ltd. Process for producing printed circuit board

Also Published As

Publication number Publication date
GB2349279B (en) 2002-06-05
WO1999027760A1 (en) 1999-06-03
GB0015393D0 (en) 2000-08-16
GB2349279A (en) 2000-10-25

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase