ATE539403T1 - Verfahren und vorrichtung zur fehlerkorrektur nach der löschanzahl eines festkörperspeichers - Google Patents

Verfahren und vorrichtung zur fehlerkorrektur nach der löschanzahl eines festkörperspeichers

Info

Publication number
ATE539403T1
ATE539403T1 AT09769687T AT09769687T ATE539403T1 AT E539403 T1 ATE539403 T1 AT E539403T1 AT 09769687 T AT09769687 T AT 09769687T AT 09769687 T AT09769687 T AT 09769687T AT E539403 T1 ATE539403 T1 AT E539403T1
Authority
AT
Austria
Prior art keywords
decoder
mode
solid state
state memory
erase count
Prior art date
Application number
AT09769687T
Other languages
English (en)
Inventor
Idan Alrod
Eran Sharon
Menahem Lasser
Original Assignee
Sandisk Il Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sandisk Il Ltd filed Critical Sandisk Il Ltd
Application granted granted Critical
Publication of ATE539403T1 publication Critical patent/ATE539403T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/14—Implementation of control logic, e.g. test mode decoders

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)
AT09769687T 2008-06-24 2009-05-06 Verfahren und vorrichtung zur fehlerkorrektur nach der löschanzahl eines festkörperspeichers ATE539403T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US7506508P 2008-06-24 2008-06-24
PCT/IB2009/051856 WO2009156877A1 (en) 2008-06-24 2009-05-06 Method and apparatus for error correction according to erase counts of a solid-state memory

Publications (1)

Publication Number Publication Date
ATE539403T1 true ATE539403T1 (de) 2012-01-15

Family

ID=40908957

Family Applications (1)

Application Number Title Priority Date Filing Date
AT09769687T ATE539403T1 (de) 2008-06-24 2009-05-06 Verfahren und vorrichtung zur fehlerkorrektur nach der löschanzahl eines festkörperspeichers

Country Status (8)

Country Link
US (1) US8464134B2 (de)
EP (1) EP2294510B1 (de)
JP (1) JP5887589B2 (de)
KR (1) KR20110036816A (de)
CN (1) CN102099793B (de)
AT (1) ATE539403T1 (de)
TW (1) TW201001426A (de)
WO (1) WO2009156877A1 (de)

Families Citing this family (48)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8131912B2 (en) * 2007-09-27 2012-03-06 Kabushiki Kaisha Toshiba Memory system
US8386868B2 (en) * 2008-04-16 2013-02-26 Sandisk Il, Ltd. Using programming-time information to support error correction
KR101541040B1 (ko) 2010-03-12 2015-08-03 엘에스아이 코포레이션 플래시 메모리들을 위한 ｌｄｐｃ 소거 디코딩
US8527840B2 (en) * 2010-04-06 2013-09-03 Densbits Technologies Ltd. System and method for restoring damaged data programmed on a flash device
TWI455132B (zh) * 2010-06-23 2014-10-01 Phison Electronics Corp 資料讀取方法、控制電路與記憶體控制器
US8650437B2 (en) * 2010-06-29 2014-02-11 International Business Machines Corporation Computer system and method of protection for the system's marking store
US8446786B2 (en) 2011-01-20 2013-05-21 Micron Technology, Inc. Outputting a particular data quantization from memory
US8862902B2 (en) * 2011-04-29 2014-10-14 Seagate Technology Llc Cascaded data encryption dependent on attributes of physical memory
US8719531B2 (en) * 2011-06-14 2014-05-06 Western Digital Technologies, Inc. System and method for performing data retention that incorporates environmental conditions
EP2549482B1 (de) * 2011-07-22 2018-05-23 SanDisk Technologies LLC Vorrichtung, System und Verfahren zur Bestimmung einer Parameterkonfiguration für Solid-State Speichervorrichtungen.
KR101830808B1 (ko) 2011-11-04 2018-02-22 삼성전자주식회사 메모리 시스템 및 그것의 데이터 저장 방법
US8924815B2 (en) * 2011-11-18 2014-12-30 Sandisk Enterprise Ip Llc Systems, methods and devices for decoding codewords having multiple parity segments
US8787079B2 (en) * 2012-05-07 2014-07-22 Sandisk Technologies Inc. Reading data from multi-level cell memory
KR102123946B1 (ko) 2012-12-28 2020-06-17 삼성전자주식회사 멀티 레벨 셀 메모리 장치 및 그것의 동작방법
US9117533B2 (en) * 2013-03-13 2015-08-25 Sandisk Technologies Inc. Tracking erase operations to regions of non-volatile memory
KR102168096B1 (ko) 2013-03-15 2020-10-20 삼성전자주식회사 불휘발성 메모리 장치 및 그것의 데이터 쓰기 방법
US9424179B2 (en) * 2013-10-17 2016-08-23 Seagate Technology Llc Systems and methods for latency based data recycling in a solid state memory system
US8874835B1 (en) 2014-01-16 2014-10-28 Pure Storage, Inc. Data placement based on data properties in a tiered storage device system
US9419655B2 (en) * 2014-04-04 2016-08-16 Seagate Technology Llc Error correction code (ECC) selection using probability density functions of error correction capability in storage controllers with multiple error correction codes
KR102149668B1 (ko) * 2014-04-22 2020-08-31 삼성전자주식회사 비휘발성 메모리 장치의 데이터 디코딩 방법
US9082512B1 (en) * 2014-08-07 2015-07-14 Pure Storage, Inc. Die-level monitoring in a storage cluster
US9595979B2 (en) 2015-01-20 2017-03-14 International Business Machines Corporation Multiple erasure codes for distributed storage
JP6486723B2 (ja) * 2015-01-21 2019-03-20 東芝メモリ株式会社 メモリシステムおよび処理装置
CN104810056A (zh) * 2015-03-05 2015-07-29 华南理工大学 一种基于自适应ldpc码的nand闪存差错控制器
US11611359B2 (en) 2015-05-29 2023-03-21 SK Hynix Inc. Data storage device
US11515897B2 (en) 2015-05-29 2022-11-29 SK Hynix Inc. Data storage device
KR102347418B1 (ko) * 2015-09-25 2022-01-06 에스케이하이닉스 주식회사 데이터 처리 장치 및 그것의 동작 방법
KR102285940B1 (ko) 2015-05-29 2021-08-05 에스케이하이닉스 주식회사 데이터 처리 회로, 데이터 처리 회로를 포함하는 데이터 저장 장치 및 그것의 동작 방법
US9904594B2 (en) * 2016-04-15 2018-02-27 Micron Technology, Inc. Monitoring error correction operations performed in memory
CN107452421B (zh) * 2016-05-31 2020-06-16 建兴储存科技(广州)有限公司 固态储存装置及其状态预测方法
US10055159B2 (en) * 2016-06-20 2018-08-21 Samsung Electronics Co., Ltd. Morphic storage device
US9672905B1 (en) 2016-07-22 2017-06-06 Pure Storage, Inc. Optimize data protection layouts based on distributed flash wear leveling
US10338983B2 (en) * 2016-12-30 2019-07-02 EMC IP Holding Company LLC Method and system for online program/erase count estimation
JP2018147231A (ja) 2017-03-06 2018-09-20 東芝メモリ株式会社 メモリコントローラ、メモリシステムおよびメモリシステムの制御方法
KR20190022987A (ko) 2017-08-25 2019-03-07 에스케이하이닉스 주식회사 데이터 저장 장치 및 그것의 동작 방법
US10936205B2 (en) 2017-10-05 2021-03-02 International Business Machines Corporation Techniques for retention and read-disturb aware health binning
US10824352B2 (en) 2017-12-06 2020-11-03 International Business Machines Corporation Reducing unnecessary calibration of a memory unit for which the error count margin has been exceeded
KR102623234B1 (ko) * 2018-08-14 2024-01-11 삼성전자주식회사 스토리지 장치 및 그것의 동작 방법
US10699791B2 (en) 2018-08-24 2020-06-30 International Business Machines Corporation Adaptive read voltage threshold calibration in non-volatile memory
KR102559549B1 (ko) 2018-09-12 2023-07-26 에스케이하이닉스 주식회사 메모리 시스템에서의 블록 상태를 관리하는 방법 및 장치
JP2020149123A (ja) * 2019-03-11 2020-09-17 キオクシア株式会社 メモリシステム、及びメモリシステムの制御方法
US11088711B2 (en) 2019-07-08 2021-08-10 Winbond Electronics Corp. Memory apparatus and data accessing method thereof
TWI723515B (zh) * 2019-08-29 2021-04-01 華邦電子股份有限公司 記憶體裝置及其資料存取方法
US11157179B2 (en) 2019-12-03 2021-10-26 Pure Storage, Inc. Dynamic allocation of blocks of a storage device based on power loss protection
KR20220092021A (ko) * 2020-12-24 2022-07-01 삼성전자주식회사 스토리지 컨트롤러 및 이를 포함하는 스토리지 시스템
JP2023079292A (ja) * 2021-11-29 2023-06-08 ラピステクノロジー株式会社 半導体記憶装置、データ書込方法及び半導体記憶装置の製造方法
KR20240059345A (ko) * 2022-10-27 2024-05-07 삼성전자주식회사 Ecc 디코더 및 이를 포함하는 메모리 컨트롤러
CN116591623B (zh) * 2023-07-14 2023-09-15 西南石油大学 基于图像识别的钻井用防跑浆预警系统

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5268319A (en) 1988-06-08 1993-12-07 Eliyahou Harari Highly compact EPROM and flash EEPROM devices
US5268870A (en) 1988-06-08 1993-12-07 Eliyahou Harari Flash EEPROM system and intelligent programming and erasing methods therefor
US6166650A (en) * 1991-05-29 2000-12-26 Microchip Technology, Inc. Secure self learning system
US6230233B1 (en) 1991-09-13 2001-05-08 Sandisk Corporation Wear leveling techniques for flash EEPROM systems
US5341339A (en) 1992-10-30 1994-08-23 Intel Corporation Method for wear leveling in a flash EEPROM memory
US5388083A (en) 1993-03-26 1995-02-07 Cirrus Logic, Inc. Flash memory mass storage architecture
US5533035A (en) * 1993-06-16 1996-07-02 Hal Computer Systems, Inc. Error detection and correction method and apparatus
JPH07264077A (ja) * 1994-03-18 1995-10-13 Canon Inc 誤り検出訂正回路
US5568423A (en) 1995-04-14 1996-10-22 Unisys Corporation Flash memory wear leveling system providing immediate direct access to microprocessor
US6941505B2 (en) * 2000-09-12 2005-09-06 Hitachi, Ltd. Data processing system and data processing method
US8412879B2 (en) * 2002-10-28 2013-04-02 Sandisk Technologies Inc. Hybrid implementation for error correction codes within a non-volatile memory system
US6831865B2 (en) 2002-10-28 2004-12-14 Sandisk Corporation Maintaining erase counts in non-volatile storage systems
US7900125B1 (en) * 2004-05-24 2011-03-01 Seagate Technology Llc Majority detection in error recovery
US8402325B2 (en) * 2004-08-02 2013-03-19 St-Ericsson Sa Data storage and replay apparatus
KR100688549B1 (ko) * 2005-05-24 2007-03-02 삼성전자주식회사 비휘발성 메모리를 지원하는 온더플라이 ｂｃｃ 코덱시스템 및 방법
US7844877B2 (en) * 2005-11-15 2010-11-30 Ramot At Tel Aviv University Ltd. Method and device for multi phase error-correction
KR101202537B1 (ko) 2006-05-12 2012-11-19 애플 인크. 메모리 디바이스를 위한 결합된 왜곡 추정 및 에러 보정 코딩
US8042029B2 (en) * 2006-05-21 2011-10-18 Ramot At Tel Aviv University Ltd. Error correction decoding by trial and error
US8069397B2 (en) * 2006-07-10 2011-11-29 Broadcom Corporation Use of ECC with iterative decoding for iterative and non-iterative decoding in a read channel for a disk drive
US7975192B2 (en) 2006-10-30 2011-07-05 Anobit Technologies Ltd. Reading memory cells using multiple thresholds
US8151163B2 (en) 2006-12-03 2012-04-03 Anobit Technologies Ltd. Automatic defect management in memory devices
US8095851B2 (en) * 2007-09-06 2012-01-10 Siliconsystems, Inc. Storage subsystem capable of adjusting ECC settings based on monitored conditions
US8429492B2 (en) * 2007-11-30 2013-04-23 Marvell World Trade Ltd. Error correcting code predication system and method
US9152496B2 (en) * 2007-12-21 2015-10-06 Cypress Semiconductor Corporation High performance flash channel interface
US8386868B2 (en) * 2008-04-16 2013-02-26 Sandisk Il, Ltd. Using programming-time information to support error correction
US8407559B2 (en) * 2008-06-20 2013-03-26 Marvell World Trade Ltd. Monitoring memory

Also Published As

Publication number Publication date
EP2294510B1 (de) 2011-12-28
TW201001426A (en) 2010-01-01
KR20110036816A (ko) 2011-04-11
WO2009156877A1 (en) 2009-12-30
CN102099793B (zh) 2013-10-16
US8464134B2 (en) 2013-06-11
JP2011525655A (ja) 2011-09-22
US20090319859A1 (en) 2009-12-24
EP2294510A1 (de) 2011-03-16
CN102099793A (zh) 2011-06-15
JP5887589B2 (ja) 2016-03-16

Similar Documents

Publication Publication Date Title
ATE539403T1 (de) Verfahren und vorrichtung zur fehlerkorrektur nach der löschanzahl eines festkörperspeichers
GB2490461A (en) Method, device and computer program product for decoding a codeword
WO2010032108A3 (en) Iterative decoding of blocks with cyclic redundancy checks
WO2015024062A8 (en) Enhanced automatic identification system
ATE538577T1 (de) Verfahren und einrichtung zum empfangen und dekodieren von steuerungsinformationen in einem kommunikationssystem
US9619324B2 (en) Error correction in non—volatile memory
ATE540357T1 (de) Verfahren zur erkennung eines angriffs durch fehlerinjektion in eine speichervorrichtung und entsprechende speichervorrichtung
JP2011081858A5 (de)
HK1151620A1 (en) Audio signal decoder, time warp contour data provider, method and computer program
TW200943843A (en) Data substitution scheme for oversampled data
JP2012118979A5 (de)
WO2014066595A3 (en) Non-volatile memory error correction
EA201070631A1 (ru) Устройство и способ обработки данных
WO2010136930A3 (en) Iterative decoding of ldpc codes with iteration scheduling
TW201129901A (en) Error-floor mitigation of codes using write verification
WO2009105542A3 (en) A method and apparatus for secure trusted time techniques
WO2008086237A3 (en) Codes for limited magnitude asymmetric errors in flash memories
TW200739593A (en) Test apparatus and test method
WO2013083415A3 (en) Soft decision error correction for memory based puf using a single enrollment
EA201070627A1 (ru) Устройство обработки данных и способ обработки данных
GB2524426A (en) Unequal error protection scheme for headerized sub data sets
WO2010107176A3 (ko) 디램 버퍼 관리 장치 및 방법
WO2013085670A3 (en) Enhanced error correction in memory devices
WO2009081338A3 (en) Defining classification thresholds in template protection systems
WO2003088505A3 (en) A decoding method and apparatus