ATE535017T1 - Hochleistungshalbleitergehäuse mit zweiseitiger kühlung - Google Patents
Hochleistungshalbleitergehäuse mit zweiseitiger kühlungInfo
- Publication number
- ATE535017T1 ATE535017T1 AT08153955T AT08153955T ATE535017T1 AT E535017 T1 ATE535017 T1 AT E535017T1 AT 08153955 T AT08153955 T AT 08153955T AT 08153955 T AT08153955 T AT 08153955T AT E535017 T1 ATE535017 T1 AT E535017T1
- Authority
- AT
- Austria
- Prior art keywords
- substrate
- circuit board
- heat sink
- upper substrate
- double
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3675—Cooling facilitated by shape of device characterised by the shape of the housing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49833—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the chip support structure consisting of a plurality of insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/32227—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the layer connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
- H01L2224/331—Disposition
- H01L2224/3318—Disposition being disposed on at least two different sides of the body, e.g. dual array
- H01L2224/33181—On opposite sides of the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Cooling Or The Like Of Electrical Apparatus (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/799,916 US7659615B2 (en) | 2007-05-03 | 2007-05-03 | High power package with dual-sided heat sinking |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE535017T1 true ATE535017T1 (de) | 2011-12-15 |
Family
ID=39640945
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT08153955T ATE535017T1 (de) | 2007-05-03 | 2008-04-02 | Hochleistungshalbleitergehäuse mit zweiseitiger kühlung |
Country Status (3)
Country | Link |
---|---|
US (1) | US7659615B2 (de) |
EP (1) | EP1988571B1 (de) |
AT (1) | ATE535017T1 (de) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7706144B2 (en) * | 2007-12-17 | 2010-04-27 | Lynch Thomas W | Heat dissipation system and related method |
US8730408B2 (en) * | 2011-06-02 | 2014-05-20 | Sharp Kabushiki Kaisha | Lighting device, display device, and television receiver |
US8514576B1 (en) * | 2011-06-14 | 2013-08-20 | Juniper Networks, Inc. | Dual sided system in a package |
JP5168393B2 (ja) * | 2011-08-18 | 2013-03-21 | 第一精工株式会社 | 基板用端子及び基板用コネクタ |
US9391029B2 (en) * | 2014-06-12 | 2016-07-12 | Kabushiki Kaisha Toshiba | Electronic device |
US9693488B2 (en) * | 2015-02-13 | 2017-06-27 | Deere & Company | Electronic assembly with one or more heat sinks |
WO2016145526A1 (en) | 2015-03-16 | 2016-09-22 | Dana Canada Corporation | Heat exchangers with plates having surface patterns for enhancing flatness and methods for manufacturing same |
US20220068753A1 (en) * | 2020-08-28 | 2022-03-03 | Delphi Technologies Ip Limited | Electronic power package and heat sink/cold rail arrangement |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW373308B (en) * | 1995-02-24 | 1999-11-01 | Agere Systems Inc | Thin packaging of multi-chip modules with enhanced thermal/power management |
US6075700A (en) * | 1999-02-02 | 2000-06-13 | Compaq Computer Corporation | Method and system for controlling radio frequency radiation in microelectronic packages using heat dissipation structures |
US6219243B1 (en) * | 1999-12-14 | 2001-04-17 | Intel Corporation | Heat spreader structures for enhanced heat removal from both sides of chip-on-flex packaged units |
US6490161B1 (en) * | 2002-01-08 | 2002-12-03 | International Business Machines Corporation | Peripheral land grid array package with improved thermal performance |
DE10231091A1 (de) * | 2002-07-10 | 2004-01-22 | Robert Bosch Gmbh | Aktivgleichrichter-Modul für Drehstromgeneratoren von Fahrzeugen |
DE10303103B4 (de) * | 2003-01-28 | 2009-07-09 | Ixys Semiconductor Gmbh | Halbleiterbauteil, insbesondere Leistungshalbleiterbauteil |
US7268425B2 (en) * | 2003-03-05 | 2007-09-11 | Intel Corporation | Thermally enhanced electronic flip-chip packaging with external-connector-side die and method |
US7005734B2 (en) | 2003-05-05 | 2006-02-28 | Ixys Corporation | Double-sided cooling isolated packaged power semiconductor device |
DE10329101A1 (de) * | 2003-06-27 | 2005-01-27 | eupec Europäische Gesellschaft für Leistungshalbleiter mbH | Halbleiteranordnung und Verfahren zum Herstellen einer Halbleiteranordnung |
US7002247B2 (en) * | 2004-06-18 | 2006-02-21 | International Business Machines Corporation | Thermal interposer for thermal management of semiconductor devices |
US7538424B2 (en) * | 2004-07-08 | 2009-05-26 | Rambus Inc. | System and method for dissipating heat from a semiconductor module |
US7235880B2 (en) * | 2004-09-01 | 2007-06-26 | Intel Corporation | IC package with power and signal lines on opposing sides |
DE102004050792A1 (de) * | 2004-10-19 | 2006-04-20 | Robert Bosch Gmbh | Bauelemente-Modul für Hochtemperaturanwendungen und Verfahren zum Herstellen eines derartigen Bauelemente-Moduls |
-
2007
- 2007-05-03 US US11/799,916 patent/US7659615B2/en active Active
-
2008
- 2008-04-02 EP EP08153955A patent/EP1988571B1/de active Active
- 2008-04-02 AT AT08153955T patent/ATE535017T1/de active
Also Published As
Publication number | Publication date |
---|---|
US20080272483A1 (en) | 2008-11-06 |
EP1988571A3 (de) | 2010-07-21 |
US7659615B2 (en) | 2010-02-09 |
EP1988571B1 (de) | 2011-11-23 |
EP1988571A2 (de) | 2008-11-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
ATE535017T1 (de) | Hochleistungshalbleitergehäuse mit zweiseitiger kühlung | |
JP5784261B2 (ja) | 冷却装置及びこれを用いた冷却装置付きパワーモジュール | |
TW200802757A (en) | Heat sink, integrated circuit package and the method of fabricating thereof | |
TW200607127A (en) | Thermoelectric module | |
US8549739B2 (en) | Method of making circuit board module | |
CN100581333C (zh) | 一种微热管散热基板 | |
EP1821586A4 (de) | Leiterplatte und leiterplatten-herstellungsverfahren | |
TW200727515A (en) | Semiconductor light source device | |
SE0402262D0 (sv) | Circuit arrangement for cooling of surface mounted semi-conductors | |
TW200631136A (en) | Method and device for heat dissipation in semiconductor modules | |
US10043729B1 (en) | Power electronics module | |
TW200635013A (en) | Stacked semiconductor package | |
JP2014053603A5 (de) | ||
TW200704354A (en) | Printed circuit board with improved thermal dissipating structure and electronic device with the same | |
TWI651874B (zh) | 發光裝置及其製造方法 | |
US20120002371A1 (en) | Electronic device with heat dissipation apparatus | |
TWI496517B (zh) | 線路板結構 | |
US20060181855A1 (en) | Heat generation assembly with cooling structure | |
TW200729437A (en) | Package casing for semiconductor chip and heat dissipation structure thereof | |
JP2009059760A (ja) | 電子回路基板の放熱構造体 | |
KR100756535B1 (ko) | 피씨비 생산 기법을 응용한 고효율 방열기 구조 및 이를이용한 방열기 일체형 열전소자 구조. | |
TW200725841A (en) | Thermally enhanced thin flip-chip package | |
KR20130004547U (ko) | Led 방열모듈 | |
JP2004228485A5 (de) | ||
CN201884987U (zh) | 高导热的集成led结构 |