ATE531000T1 - Verfahren zur herstellung einer mikrochipkarte - Google Patents

Verfahren zur herstellung einer mikrochipkarte

Info

Publication number
ATE531000T1
ATE531000T1 AT06847124T AT06847124T ATE531000T1 AT E531000 T1 ATE531000 T1 AT E531000T1 AT 06847124 T AT06847124 T AT 06847124T AT 06847124 T AT06847124 T AT 06847124T AT E531000 T1 ATE531000 T1 AT E531000T1
Authority
AT
Austria
Prior art keywords
producing
microchip card
microcircuit
card
microchip
Prior art date
Application number
AT06847124T
Other languages
English (en)
Inventor
Francois Launay
Original Assignee
Oberthur Technologies
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oberthur Technologies filed Critical Oberthur Technologies
Application granted granted Critical
Publication of ATE531000T1 publication Critical patent/ATE531000T1/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745Mounting details of integrated circuit chips
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29CSHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C39/00Shaping by casting, i.e. introducing the moulding material into a mould or between confining surfaces without significant moulding pressure; Apparatus therefor
    • B29C39/02Shaping by casting, i.e. introducing the moulding material into a mould or between confining surfaces without significant moulding pressure; Apparatus therefor for making articles of definite length, i.e. discrete articles
    • B29C39/021Shaping by casting, i.e. introducing the moulding material into a mould or between confining surfaces without significant moulding pressure; Apparatus therefor for making articles of definite length, i.e. discrete articles by casting in several steps
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29CSHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C39/00Shaping by casting, i.e. introducing the moulding material into a mould or between confining surfaces without significant moulding pressure; Apparatus therefor
    • B29C39/02Shaping by casting, i.e. introducing the moulding material into a mould or between confining surfaces without significant moulding pressure; Apparatus therefor for making articles of definite length, i.e. discrete articles
    • B29C39/10Shaping by casting, i.e. introducing the moulding material into a mould or between confining surfaces without significant moulding pressure; Apparatus therefor for making articles of definite length, i.e. discrete articles incorporating preformed parts or layers, e.g. casting around inserts or for coating articles
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29CSHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C70/00Shaping composites, i.e. plastics material comprising reinforcements, fillers or preformed parts, e.g. inserts
    • B29C70/68Shaping composites, i.e. plastics material comprising reinforcements, fillers or preformed parts, e.g. inserts by incorporating or moulding on preformed parts, e.g. inserts or layers, e.g. foam blocks
    • B29C70/72Encapsulating inserts having non-encapsulated projections, e.g. extremities or terminal portions of electrical components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565Moulds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49855Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Mechanical Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Composite Materials (AREA)
  • Credit Cards Or The Like (AREA)
  • Casting Or Compression Moulding Of Plastics Or The Like (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Laminated Bodies (AREA)
AT06847124T 2005-12-26 2006-12-22 Verfahren zur herstellung einer mikrochipkarte ATE531000T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0513319A FR2895547B1 (fr) 2005-12-26 2005-12-26 Procede de fabrication d'une carte a microcircuit
PCT/FR2006/002854 WO2007077355A1 (fr) 2005-12-26 2006-12-22 Procede de fabrication d’une carte a microcircuit

Publications (1)

Publication Number Publication Date
ATE531000T1 true ATE531000T1 (de) 2011-11-15

Family

ID=36778196

Family Applications (1)

Application Number Title Priority Date Filing Date
AT06847124T ATE531000T1 (de) 2005-12-26 2006-12-22 Verfahren zur herstellung einer mikrochipkarte

Country Status (7)

Country Link
US (1) US20080272519A1 (de)
EP (1) EP1966744B1 (de)
CN (1) CN101346736B (de)
AT (1) ATE531000T1 (de)
ES (1) ES2375741T3 (de)
FR (1) FR2895547B1 (de)
WO (1) WO2007077355A1 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1923821B1 (de) * 2006-11-17 2012-03-28 Oberthur Technologies Verfahren zur Herstellung einer Entität und entsprechende Vorrichtung
EP2767935A1 (de) 2013-02-18 2014-08-20 NagraID S.A. Plastikschicht für elektronische Karte
FR3073307B1 (fr) * 2017-11-08 2021-05-28 Oberthur Technologies Dispositif de securite tel qu'une carte a puce

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4470786A (en) * 1981-07-28 1984-09-11 Omron Tateisi Electronics Co. Molding apparatus with retractable preform support pins
FR2580416B1 (fr) * 1985-04-12 1987-06-05 Radiotechnique Compelec Procede et dispositif pour fabriquer une carte d'identification electronique
FR2609821B1 (fr) * 1987-01-16 1989-03-31 Flonic Sa Procede de realisation de cartes a memoire et cartes obtenues par la mise en oeuvre dudit procede
FR2702067B1 (fr) * 1993-02-23 1995-04-14 Schlumberger Ind Sa Procédé et dispositif de fabrication de cartes à mémoire.
DE4435802A1 (de) * 1994-10-06 1996-04-11 Giesecke & Devrient Gmbh Verfahren zur Herstellung von Datenträgern mit eingebetteten Elementen und Vorrichtung zur Durchführung des Verfahrens
FR2730576B1 (fr) * 1995-02-15 1997-04-04 Gemplus Card Int Procede de fabrication de cartes electroniques et cartes obtenues par un tel procede
FR2736740A1 (fr) * 1995-07-11 1997-01-17 Trt Telecom Radio Electr Procede de production et d'assemblage de carte a circuit integre et carte ainsi obtenue
WO1998009252A1 (de) * 1996-08-26 1998-03-05 Tomas Meinen Verfahren zur herstellung von chipkarten
DE19716912B4 (de) * 1997-04-22 2006-06-08 Assa Abloy Identification Technology Group Ab Verfahren zur Fixierung eines Chipmoduls in einer Chipkarte
FR2780847B1 (fr) * 1998-07-03 2000-09-22 Rue Cartes Et Systemes De Procede de fabrication d'une carte a microcircuit incluant une antenne et carte a microcircuit ainsi obtenue
DE10148105A1 (de) * 2001-09-28 2003-04-17 Orga Kartensysteme Gmbh Verfahren zur Herstellung einer elektrischen Verbindung zwischen Bauelementen einer Datenträgerkarte
DE10216652A1 (de) * 2002-04-15 2003-10-23 Orga Kartensysteme Gmbh Spritzgussverfahren zur Herstellung einer Chipkarte und nach diesem Verfahren hergestellte Chipkarte
DE10334578A1 (de) * 2003-07-28 2005-03-10 Infineon Technologies Ag Chipkarte, Chipkartenmodul sowie Verfahren zur Herstellung eines Chipkartenmoduls

Also Published As

Publication number Publication date
WO2007077355A1 (fr) 2007-07-12
ES2375741T3 (es) 2012-03-05
EP1966744B1 (de) 2011-10-26
CN101346736A (zh) 2009-01-14
US20080272519A1 (en) 2008-11-06
FR2895547A1 (fr) 2007-06-29
CN101346736B (zh) 2012-07-04
FR2895547B1 (fr) 2008-06-06
EP1966744A1 (de) 2008-09-10

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Legal Events

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RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties