ATE493013T1 - Elektronische baugruppe mit zusammengesetzten elektronischen kontakten zur anbringung eines kapselungssubstrats an einer leiterplatte - Google Patents

Elektronische baugruppe mit zusammengesetzten elektronischen kontakten zur anbringung eines kapselungssubstrats an einer leiterplatte

Info

Publication number
ATE493013T1
ATE493013T1 AT03713230T AT03713230T ATE493013T1 AT E493013 T1 ATE493013 T1 AT E493013T1 AT 03713230 T AT03713230 T AT 03713230T AT 03713230 T AT03713230 T AT 03713230T AT E493013 T1 ATE493013 T1 AT E493013T1
Authority
AT
Austria
Prior art keywords
circuit board
attaching
electronic
encapsulating substrate
contacts
Prior art date
Application number
AT03713230T
Other languages
English (en)
Inventor
Edward Martin
Larry Biggs
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of ATE493013T1 publication Critical patent/ATE493013T1/de

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/11334—Manufacturing methods by local deposition of the material of the bump connector in solid form using preformed bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/642—Capacitive arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19106—Disposition of discrete passive components in a mirrored arrangement on two different side of a common die mounting substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
    • H05K1/0231—Capacitors or dielectric substances
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203—Fillers and particles
    • H05K2201/0206—Materials
    • H05K2201/0212—Resin particles
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10234—Metallic balls
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
AT03713230T 2002-02-04 2003-01-10 Elektronische baugruppe mit zusammengesetzten elektronischen kontakten zur anbringung eines kapselungssubstrats an einer leiterplatte ATE493013T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/068,494 US7053491B2 (en) 2002-02-04 2002-02-04 Electronic assembly having composite electronic contacts for attaching a package substrate to a printed circuit board
PCT/US2003/000885 WO2003067946A1 (en) 2002-02-04 2003-01-10 Electronic assembly having composite electronic contacts for attaching a package substrate to a printed circuit board

Publications (1)

Publication Number Publication Date
ATE493013T1 true ATE493013T1 (de) 2011-01-15

Family

ID=27659048

Family Applications (1)

Application Number Title Priority Date Filing Date
AT03713230T ATE493013T1 (de) 2002-02-04 2003-01-10 Elektronische baugruppe mit zusammengesetzten elektronischen kontakten zur anbringung eines kapselungssubstrats an einer leiterplatte

Country Status (8)

Country Link
US (1) US7053491B2 (de)
EP (1) EP1472916B1 (de)
CN (1) CN1729731B (de)
AT (1) ATE493013T1 (de)
AU (1) AU2003217194A1 (de)
DE (1) DE60335448D1 (de)
MY (1) MY131914A (de)
WO (1) WO2003067946A1 (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20050042060A (ko) * 2002-09-27 2005-05-04 가부시키가이샤 네오맥스 땜납 피복 볼 및 그 제조방법과 반도체 접속구조의 형성방법
US7339263B2 (en) * 2004-06-28 2008-03-04 Intel Corporation Integrated circuit packages, systems, and methods
JP4040644B2 (ja) * 2005-07-28 2008-01-30 シャープ株式会社 半田付け実装構造の製造方法および半田付け実装方法
BRPI0710244B1 (pt) * 2006-04-10 2022-02-08 Innovatier, Inc Inlay eletrônico e cartão eletrônico e métodos para fabricar os mesmos
US20070290048A1 (en) * 2006-06-20 2007-12-20 Innovatier, Inc. Embedded electronic device and method for manufacturing an embedded electronic device
US20080160397A1 (en) * 2006-08-25 2008-07-03 Innovatier, Inc Battery powered device having a protective frame
US20080055824A1 (en) * 2006-08-25 2008-03-06 Innovatier, Inc. Battery powered device having a protective frame
US20110278725A1 (en) * 2007-01-31 2011-11-17 Nichepac Technology Inc. Stacking of transfer carriers with aperture arrays as interconnection joints
KR20100015378A (ko) * 2007-03-23 2010-02-12 이노배티어, 인코프레이티드 스텝 카드 및 스텝 카드를 제조하는 방법
US7786001B2 (en) * 2007-04-11 2010-08-31 International Business Machines Corporation Electrical interconnect structure and method
US20080282540A1 (en) * 2007-05-14 2008-11-20 Innovatier, Inc. Method for making advanced smart cards with integrated electronics using isotropic thermoset adhesive materials with high quality exterior surfaces
US20090096614A1 (en) * 2007-10-15 2009-04-16 Innovatier, Inc. Rfid power bracelet and method for manufacturing a rfid power bracelet
US20090181215A1 (en) * 2008-01-15 2009-07-16 Innovatier, Inc. Plastic card and method for making a plastic card
DE102010003562B4 (de) * 2010-03-31 2021-11-04 Taiwan Semiconductor Manufacturing Company, Ltd. Verfahren und Wiederaufschmelzsystem zum Verbinden eines Halbleiterchips mit einem Gehäusesubstrat
CN102569211A (zh) * 2011-12-10 2012-07-11 中国振华集团永光电子有限公司 晶体管焊接层厚度的控制方法及焊接层结构
US9768137B2 (en) 2012-04-30 2017-09-19 Taiwan Semiconductor Manufacturing Company, Ltd. Stud bump structure for semiconductor package assemblies
JP5692314B2 (ja) * 2013-09-03 2015-04-01 千住金属工業株式会社 バンプ電極、バンプ電極基板及びその製造方法
CN106304825B (zh) * 2015-06-24 2019-01-22 启碁科技股份有限公司 电子装置及雷达装置
KR102420126B1 (ko) 2016-02-01 2022-07-12 삼성전자주식회사 반도체 소자
CN106229721B (zh) * 2016-07-22 2019-05-14 广东小天才科技有限公司 连接触点、充电数据线、电子设备及连接触点的制备方法
CN107335879B (zh) * 2017-06-21 2019-11-08 深圳市汉尔信电子科技有限公司 一种面阵列的封装方法
US11664300B2 (en) * 2019-12-26 2023-05-30 Taiwan Semiconductor Manufacturing Co., Ltd. Fan-out packages and methods of forming the same

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3303393A (en) 1963-12-27 1967-02-07 Ibm Terminals for microminiaturized devices and methods of connecting same to circuit panels
US5536637A (en) * 1993-04-07 1996-07-16 Genetics Institute, Inc. Method of screening for cDNA encoding novel secreted mammalian proteins in yeast
CA2154409C (en) 1994-07-22 1999-12-14 Yuzo Shimada Connecting member and a connecting method using the same
US5801446A (en) * 1995-03-28 1998-09-01 Tessera, Inc. Microelectronic connections with solid core joining units
US5931371A (en) * 1997-01-16 1999-08-03 Ford Motor Company Standoff controlled interconnection
US5841198A (en) 1997-04-21 1998-11-24 Lsi Logic Corporation Ball grid array package employing solid core solder balls
JP3420917B2 (ja) * 1997-09-08 2003-06-30 富士通株式会社 半導体装置
US6002168A (en) * 1997-11-25 1999-12-14 Tessera, Inc. Microelectronic component with rigid interposer
US6303408B1 (en) * 1998-02-03 2001-10-16 Tessera, Inc. Microelectronic assemblies with composite conductive elements
US6271111B1 (en) 1998-02-25 2001-08-07 International Business Machines Corporation High density pluggable connector array and process thereof
US6324754B1 (en) * 1998-03-25 2001-12-04 Tessera, Inc. Method for fabricating microelectronic assemblies
US6158644A (en) 1998-04-30 2000-12-12 International Business Machines Corporation Method for enhancing fatigue life of ball grid arrays
US6076726A (en) 1998-07-01 2000-06-20 International Business Machines Corporation Pad-on-via assembly technique
US6184062B1 (en) * 1999-01-19 2001-02-06 International Business Machines Corporation Process for forming cone shaped solder for chip interconnection
TW445612B (en) * 2000-08-03 2001-07-11 Siliconware Precision Industries Co Ltd Solder ball array structure to control the degree of collapsing
US6610591B1 (en) * 2000-08-25 2003-08-26 Micron Technology, Inc. Methods of ball grid array

Also Published As

Publication number Publication date
DE60335448D1 (de) 2011-02-03
US7053491B2 (en) 2006-05-30
EP1472916A1 (de) 2004-11-03
US20030146505A1 (en) 2003-08-07
EP1472916B1 (de) 2010-12-22
MY131914A (en) 2007-09-28
CN1729731B (zh) 2010-05-12
AU2003217194A1 (en) 2003-09-02
WO2003067946A1 (en) 2003-08-14
CN1729731A (zh) 2006-02-01

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