ATE492885T1 - Testvorrichtung für speicher - Google Patents

Testvorrichtung für speicher

Info

Publication number
ATE492885T1
ATE492885T1 AT06392009T AT06392009T ATE492885T1 AT E492885 T1 ATE492885 T1 AT E492885T1 AT 06392009 T AT06392009 T AT 06392009T AT 06392009 T AT06392009 T AT 06392009T AT E492885 T1 ATE492885 T1 AT E492885T1
Authority
AT
Austria
Prior art keywords
memory
memory test
dut
automatic tester
test engine
Prior art date
Application number
AT06392009T
Other languages
English (en)
Inventor
Hans Martin Vonstaudt
Original Assignee
Dialog Semiconductor Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dialog Semiconductor Gmbh filed Critical Dialog Semiconductor Gmbh
Application granted granted Critical
Publication of ATE492885T1 publication Critical patent/ATE492885T1/de

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/003Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation in serial memories
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/3167Testing of combined analog and digital circuits
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/31903Tester hardware, i.e. output processing circuits tester configuration
    • G01R31/31905Interface with the device under test [DUT], e.g. arrangements between the test head and the DUT, mechanical aspects, fixture
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/31903Tester hardware, i.e. output processing circuits tester configuration
    • G01R31/31908Tester set-up, e.g. configuring the tester to the device under test [DUT], down loading test patterns
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/31917Stimuli generation or application of test patterns to the device under test [DUT]
    • G01R31/31926Routing signals to or from the device under test [DUT], e.g. switch matrix, pin multiplexing
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/48Arrangements in static stores specially adapted for testing by means external to the store, e.g. using direct memory access [DMA] or using auxiliary access paths
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C2029/0401Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals in embedded memories
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50Marginal testing, e.g. race, voltage or current testing
    • G11C2029/5002Characteristic
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • G11C2029/5602Interface to device under test
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02Detection or location of defective auxiliary circuits, e.g. defective refresh counters

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Saccharide Compounds (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
AT06392009T 2006-05-18 2006-05-18 Testvorrichtung für speicher ATE492885T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP06392009A EP1858028B1 (de) 2006-05-18 2006-05-18 Testvorrichtung für Speicher

Publications (1)

Publication Number Publication Date
ATE492885T1 true ATE492885T1 (de) 2011-01-15

Family

ID=37188933

Family Applications (1)

Application Number Title Priority Date Filing Date
AT06392009T ATE492885T1 (de) 2006-05-18 2006-05-18 Testvorrichtung für speicher

Country Status (4)

Country Link
US (1) US7395169B2 (de)
EP (1) EP1858028B1 (de)
AT (1) ATE492885T1 (de)
DE (1) DE602006019069D1 (de)

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US20070127052A1 (en) * 2005-12-06 2007-06-07 Mediatek Inc. Electronic recovery system and method
US7797598B1 (en) * 2006-11-14 2010-09-14 Xilinx, Inc. Dynamic timer for testbench interface synchronization
KR20100062326A (ko) * 2008-12-02 2010-06-10 삼성전자주식회사 반도체 디바이스 테스트 장치
KR101535228B1 (ko) * 2009-05-13 2015-07-08 삼성전자주식회사 빌트 오프 테스트 장치
CN101963930B (zh) * 2009-07-21 2013-06-12 纬创资通股份有限公司 自动化测试装置
US11009550B2 (en) 2013-02-21 2021-05-18 Advantest Corporation Test architecture with an FPGA based test board to simulate a DUT or end-point
US10162007B2 (en) * 2013-02-21 2018-12-25 Advantest Corporation Test architecture having multiple FPGA based hardware accelerator blocks for testing multiple DUTs independently
US10161993B2 (en) * 2013-02-21 2018-12-25 Advantest Corporation Tester with acceleration on memory and acceleration for automatic pattern generation within a FPGA block
US9952276B2 (en) 2013-02-21 2018-04-24 Advantest Corporation Tester with mixed protocol engine in a FPGA block
US20210117298A1 (en) * 2013-02-21 2021-04-22 Advantest Corporation Use of host bus adapter to provide protocol flexibility in automated test equipment
US9810729B2 (en) 2013-02-28 2017-11-07 Advantest Corporation Tester with acceleration for packet building within a FPGA block
US10126362B2 (en) * 2014-12-15 2018-11-13 International Business Machines Corporation Controlling a test run on a device under test without controlling the test equipment testing the device under test
CN107024623B (zh) * 2016-02-02 2020-05-22 深圳市汇顶科技股份有限公司 数据采集芯片的测试系统、装置及其控制方法
CN106841993B (zh) * 2017-02-16 2019-09-06 泰州镭昇光电科技有限公司 一种lcd检测装置及方法
US10976361B2 (en) 2018-12-20 2021-04-13 Advantest Corporation Automated test equipment (ATE) support framework for solid state device (SSD) odd sector sizes and protection modes
US11137910B2 (en) 2019-03-04 2021-10-05 Advantest Corporation Fast address to sector number/offset translation to support odd sector size testing
US11237202B2 (en) 2019-03-12 2022-02-01 Advantest Corporation Non-standard sector size system support for SSD testing
US10884847B1 (en) 2019-08-20 2021-01-05 Advantest Corporation Fast parallel CRC determination to support SSD testing
US11899550B2 (en) 2020-03-31 2024-02-13 Advantest Corporation Enhanced auxiliary memory mapped interface test systems and methods

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US4481627A (en) * 1981-10-30 1984-11-06 Honeywell Information Systems Inc. Embedded memory testing method and apparatus
US4873705A (en) 1988-01-27 1989-10-10 John Fluke Mfg. Co., Inc. Method of and system for high-speed, high-accuracy functional testing of memories in microprocessor-based units
CA2212089C (en) 1997-07-31 2006-10-24 Mosaid Technologies Incorporated Bist memory test system
US6286115B1 (en) 1998-06-29 2001-09-04 Micron Technology, Inc. On-chip testing circuit and method for integrated circuits
US6072737A (en) 1998-08-06 2000-06-06 Micron Technology, Inc. Method and apparatus for testing embedded DRAM
US6449741B1 (en) * 1998-10-30 2002-09-10 Ltx Corporation Single platform electronic tester
US6587979B1 (en) 1999-10-18 2003-07-01 Credence Systems Corporation Partitionable embedded circuit test system for integrated circuit
US6331770B1 (en) * 2000-04-12 2001-12-18 Advantest Corp. Application specific event based semiconductor test system
DE10034855B4 (de) 2000-07-18 2006-05-11 Infineon Technologies Ag System zum Test von schnellen integrierten Digitalschaltungen und BOST-Halbleiterschaltungsbaustein als Testschaltkreis
US6829728B2 (en) 2000-11-13 2004-12-07 Wu-Tung Cheng Full-speed BIST controller for testing embedded synchronous memories
JP2002236143A (ja) 2001-02-08 2002-08-23 Mitsubishi Electric Corp 半導体装置の試験に用いる外部試験補助装置およびその装置を用いた半導体装置の試験方法
US6631340B2 (en) * 2001-10-15 2003-10-07 Advantest Corp. Application specific event based semiconductor memory test system
EP1345197A1 (de) * 2002-03-11 2003-09-17 Dialog Semiconductor GmbH LCD Modulkennung
DE10330042A1 (de) * 2003-06-30 2005-02-03 Infineon Technologies Ag Halbleiter-Bauelement-Test-Verfahren, sowie Test-System zum Testen von Halbleiter-Bauelementen
US8581610B2 (en) * 2004-04-21 2013-11-12 Charles A Miller Method of designing an application specific probe card test system

Also Published As

Publication number Publication date
US7395169B2 (en) 2008-07-01
EP1858028A1 (de) 2007-11-21
DE602006019069D1 (de) 2011-02-03
US20070271059A1 (en) 2007-11-22
EP1858028B1 (de) 2010-12-22

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