ATE487296T1 - System und verfahren zur leistungsverbesserung digitaler systeme - Google Patents

System und verfahren zur leistungsverbesserung digitaler systeme

Info

Publication number
ATE487296T1
ATE487296T1 AT03790151T AT03790151T ATE487296T1 AT E487296 T1 ATE487296 T1 AT E487296T1 AT 03790151 T AT03790151 T AT 03790151T AT 03790151 T AT03790151 T AT 03790151T AT E487296 T1 ATE487296 T1 AT E487296T1
Authority
AT
Austria
Prior art keywords
slower
present
computation
clock
faster
Prior art date
Application number
AT03790151T
Other languages
English (en)
Inventor
Augustus Uht
Original Assignee
Rhode Island Education
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rhode Island Education filed Critical Rhode Island Education
Application granted granted Critical
Publication of ATE487296T1 publication Critical patent/ATE487296T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1695—Error detection or correction of the data by redundancy in hardware which are operating with time diversity
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/08—Clock generators with changeable or programmable clock frequency
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1679—Temporal synchronisation or re-synchronisation of redundant processing components at clock signal level
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/1641—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Advance Control (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Hardware Redundancy (AREA)
  • Manipulation Of Pulses (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
AT03790151T 2002-11-27 2003-11-26 System und verfahren zur leistungsverbesserung digitaler systeme ATE487296T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US42973602P 2002-11-27 2002-11-27
PCT/US2003/038010 WO2004051907A2 (en) 2002-11-27 2003-11-26 System and method of digital system performance enhancement

Publications (1)

Publication Number Publication Date
ATE487296T1 true ATE487296T1 (de) 2010-11-15

Family

ID=32469367

Family Applications (1)

Application Number Title Priority Date Filing Date
AT03790151T ATE487296T1 (de) 2002-11-27 2003-11-26 System und verfahren zur leistungsverbesserung digitaler systeme

Country Status (7)

Country Link
EP (1) EP1570599B1 (de)
JP (1) JP4383353B2 (de)
CN (1) CN1830173A (de)
AT (1) ATE487296T1 (de)
AU (1) AU2003293162A1 (de)
DE (1) DE60334837D1 (de)
WO (1) WO2004051907A2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4510052B2 (ja) * 2007-05-23 2010-07-21 株式会社東芝 半導体集積回路装置及びデューティ制御方法
JP5834936B2 (ja) * 2012-01-17 2015-12-24 ソニー株式会社 情報処理装置および情報処理装置の制御方法
JP5775896B2 (ja) * 2013-03-25 2015-09-09 株式会社日立システムズ 論理演算処理装置
JP5775897B2 (ja) * 2013-03-25 2015-09-09 株式会社日立システムズ 複数の再構成可能論理回路を環状直列に接続して、パイプライン処理を実現する論理処理装置
CN111765286A (zh) * 2020-06-04 2020-10-13 嘉里粮油(防城港)有限公司 一种灌油房管道防开错系统及方法
WO2022249818A1 (ja) * 2021-05-27 2022-12-01 株式会社日立製作所 保安装置および保安方法
CN115016997B (zh) * 2022-08-08 2022-11-18 南京芯驰半导体科技有限公司 慢时钟域lockstep模块中寄存器的快速诊断系统及方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2993463B2 (ja) * 1997-05-08 1999-12-20 日本電気株式会社 同期回路制御装置
GB2340627B (en) * 1998-08-13 2000-10-04 Plessey Telecomm Data processing system
JP3327256B2 (ja) * 1999-06-17 2002-09-24 日本電気株式会社 クロックリカバリ回路及び位相比較方法
JP3450814B2 (ja) 2000-09-26 2003-09-29 松下電器産業株式会社 情報処理装置

Also Published As

Publication number Publication date
AU2003293162A8 (en) 2004-06-23
JP4383353B2 (ja) 2009-12-16
DE60334837D1 (de) 2010-12-16
WO2004051907A2 (en) 2004-06-17
EP1570599B1 (de) 2010-11-03
EP1570599A2 (de) 2005-09-07
JP2006508615A (ja) 2006-03-09
EP1570599A4 (de) 2009-07-15
CN1830173A (zh) 2006-09-06
AU2003293162A1 (en) 2004-06-23
WO2004051907A3 (en) 2004-10-28

Similar Documents

Publication Publication Date Title
NO20060501L (no) Fremgangsmater og system for a forsta meningen av en kunnskapsenhet ved bruk av informasjon tilknyttet kunnskapsenheten
DE60044300D1 (de) Daten-prozessor
ATE382901T1 (de) Verfahren, einrichtung und system zur durchführung von kalkulationsoperationen
EP1690163A4 (de) Transparentes checkpointing und prozessmigration in einem verteilten system
DE60324992D1 (de) Register für datenuebertragung in einem multithreaded prozessor
ATE554443T1 (de) Anweisungsgesteuerte datenverarbeitungseinrichtung und -verfahren
WO2009085118A3 (en) System and method for architecture-adaptable automatic parallelization of computing code
TW200619972A (en) High performance computing system and method
ATE359559T1 (de) Verfahren und system zur durchf hrung von kalkulationsoperationenund einrichtung
DK2326013T3 (da) Fremgangsmåde og arrangement til aritmetisk indkodning og dekodning med anvendelse af flere tabeller
DE60334837D1 (de) System und verfahren zur leistungsverbesserung digitaler systeme
DE602005005052D1 (de) Verfahren zur auswahl von plug-in-codemodulen in einer datenverarbeitungseinrichtung
SE9700099D0 (sv) Method and apparatus for FFT computation
ATE366011T1 (de) Verfahren zur überwachung von computer systemen
WO2004104918A3 (en) Dna based number system and arithmetic
DE602004009945D1 (de) Integrierte schaltung mit signaturberechnung
ATE420502T1 (de) Kryptographisches verfahren und einrichtungen zur ermöglichung von berechnungen während transaktionen
DE60333009D1 (de) Filterstruktur für iterative signalverarbeitung
ATE429783T1 (de) Verfahren zur reduktion von quantisierungsrauschen
MX2021002644A (es) Método de operación y unidad de control para un sistema de evaluación de datos/señal, sistema de evaluación de datos/señal, sistema de asistencia de operación basado en ultrasonido y dispositivo funcional.
TR201709650A2 (en) COMPUTER APPLIED METHOD, COMPUTER SYSTEM AND COMPUTER PROGRAM PRODUCT READABLE BY COMPUTER
Haghighi et al. Analysis of a two-node task-splitting feedback tandem queue with infinite buffers by functional equation
KR970703559A (ko) 교번 극성 올림수 예측 가산기 회로(alternating polarity carry look ahead adder circuit)
FR2856538B1 (fr) Procede de contre-mesure dans un composant electronique mettant en oeuvre un algorithme cryptographique du type a cle publique
RU2305861C2 (ru) Устройство для округления числа в системе остаточных классов

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties