ATE478472T1 - Umkonfigurierbare analoge zelle und anordnung mit mehreren solchen zellen - Google Patents
Umkonfigurierbare analoge zelle und anordnung mit mehreren solchen zellenInfo
- Publication number
- ATE478472T1 ATE478472T1 AT02735885T AT02735885T ATE478472T1 AT E478472 T1 ATE478472 T1 AT E478472T1 AT 02735885 T AT02735885 T AT 02735885T AT 02735885 T AT02735885 T AT 02735885T AT E478472 T1 ATE478472 T1 AT E478472T1
- Authority
- AT
- Austria
- Prior art keywords
- switches
- terminals
- arrangement
- cells
- several
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H11/00—Networks using active elements
- H03H11/46—One-port networks
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06G—ANALOGUE COMPUTERS
- G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
- G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers
- G06G7/26—Arbitrary function generators
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- Networks Using Active Elements (AREA)
- Logic Circuits (AREA)
- Electronic Switches (AREA)
- Semiconductor Integrated Circuits (AREA)
- Micro-Organisms Or Cultivation Processes Thereof (AREA)
- Amplifiers (AREA)
- Attenuators (AREA)
- Apparatus Associated With Microorganisms And Enzymes (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP01202500 | 2001-06-29 | ||
PCT/IB2002/002339 WO2003005583A2 (en) | 2001-06-29 | 2002-06-20 | A reconfigurable analog cell and an arrangement comprising a plurality of such cell |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE478472T1 true ATE478472T1 (de) | 2010-09-15 |
Family
ID=8180557
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT02735885T ATE478472T1 (de) | 2001-06-29 | 2002-06-20 | Umkonfigurierbare analoge zelle und anordnung mit mehreren solchen zellen |
Country Status (9)
Country | Link |
---|---|
US (1) | US6995608B2 (de) |
EP (1) | EP1405414B1 (de) |
JP (1) | JP4261342B2 (de) |
KR (1) | KR20030045044A (de) |
CN (1) | CN100576739C (de) |
AT (1) | ATE478472T1 (de) |
AU (1) | AU2002309189A1 (de) |
DE (1) | DE60237370D1 (de) |
WO (1) | WO2003005583A2 (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7334199B1 (en) | 2004-03-04 | 2008-02-19 | National Semiconductor Corporation | System and method for breaking a feedback loop using a voltage controlled voltage source terminated subnetwork model |
WO2010052663A2 (en) * | 2008-11-05 | 2010-05-14 | Nxp B.V. | Electrical circuit arrangement and method for designing an electrical circuit arrangement |
EP3985115A1 (de) | 2014-12-12 | 2022-04-20 | The Broad Institute, Inc. | Geschützte guide-rnas (pgrnas) |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB9007492D0 (en) * | 1990-04-03 | 1990-05-30 | Pilkington Micro Electronics | Semiconductor integrated circuit |
US5245646A (en) * | 1992-06-01 | 1993-09-14 | Motorola, Inc. | Tuning circuit for use with an integrated continuous time analog filter |
US5680070A (en) * | 1996-02-05 | 1997-10-21 | Motorola, Inc. | Programmable analog array and method for configuring the same |
US5966047A (en) * | 1997-03-27 | 1999-10-12 | Motorola, Inc. | Programmable analog array and method |
US5991339A (en) * | 1998-01-16 | 1999-11-23 | Intel Corporation | Adaptive equalization using a minimum- jitter criterion |
EP0978944B1 (de) * | 1998-07-06 | 2002-01-02 | Hewlett-Packard Company, A Delaware Corporation | Verdrahtung von Zellen in logischen Feldern |
US6765409B2 (en) * | 2001-09-13 | 2004-07-20 | Extensil Corporation | Very low power, high performance universal connector for reconfigurable macro cell arrays |
-
2002
- 2002-06-20 WO PCT/IB2002/002339 patent/WO2003005583A2/en active Application Filing
- 2002-06-20 AU AU2002309189A patent/AU2002309189A1/en not_active Abandoned
- 2002-06-20 EP EP02735885A patent/EP1405414B1/de not_active Expired - Lifetime
- 2002-06-20 US US10/481,982 patent/US6995608B2/en not_active Expired - Lifetime
- 2002-06-20 DE DE60237370T patent/DE60237370D1/de not_active Expired - Lifetime
- 2002-06-20 JP JP2003511424A patent/JP4261342B2/ja not_active Expired - Fee Related
- 2002-06-20 AT AT02735885T patent/ATE478472T1/de not_active IP Right Cessation
- 2002-06-20 KR KR10-2003-7002915A patent/KR20030045044A/ko not_active Application Discontinuation
- 2002-06-20 CN CN02812913A patent/CN100576739C/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN1520638A (zh) | 2004-08-11 |
US6995608B2 (en) | 2006-02-07 |
EP1405414A2 (de) | 2004-04-07 |
DE60237370D1 (de) | 2010-09-30 |
EP1405414B1 (de) | 2010-08-18 |
WO2003005583A2 (en) | 2003-01-16 |
CN100576739C (zh) | 2009-12-30 |
US20050073873A1 (en) | 2005-04-07 |
AU2002309189A1 (en) | 2003-01-21 |
JP4261342B2 (ja) | 2009-04-30 |
KR20030045044A (ko) | 2003-06-09 |
WO2003005583A3 (en) | 2003-11-06 |
JP2004534475A (ja) | 2004-11-11 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |