ATE440382T1 - Silizium-auf-isolator- hochspannungsbauelementstruktur - Google Patents

Silizium-auf-isolator- hochspannungsbauelementstruktur

Info

Publication number
ATE440382T1
ATE440382T1 AT02765227T AT02765227T ATE440382T1 AT E440382 T1 ATE440382 T1 AT E440382T1 AT 02765227 T AT02765227 T AT 02765227T AT 02765227 T AT02765227 T AT 02765227T AT E440382 T1 ATE440382 T1 AT E440382T1
Authority
AT
Austria
Prior art keywords
stripe
soi
drift
longitudinally
dielectric layer
Prior art date
Application number
AT02765227T
Other languages
English (en)
Inventor
Theodore Letavic
Mark Simpson
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE440382T1 publication Critical patent/ATE440382T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/65—Lateral DMOS [LDMOS] FETs
    • H10D30/657—Lateral DMOS [LDMOS] FETs having substrates comprising insulating layers, e.g. SOI-LDMOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/65—Lateral DMOS [LDMOS] FETs
    • H10D30/658—Lateral DMOS [LDMOS] FETs having trench gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113—Isolations within a component, i.e. internal isolations
    • H10D62/115—Dielectric isolations, e.g. air gaps
    • H10D62/116—Dielectric isolations, e.g. air gaps adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/111—Field plates
    • H10D64/117—Recessed field plates, e.g. trench field plates or buried field plates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H10D62/126—Top-view geometrical layouts of the regions or the junctions
    • H10D62/127—Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149—Source or drain regions of field-effect devices
    • H10D62/151—Source or drain regions of field-effect devices of IGFETs 

Landscapes

  • Thin Film Transistor (AREA)
  • Semiconductor Integrated Circuits (AREA)
AT02765227T 2001-10-01 2002-09-11 Silizium-auf-isolator- hochspannungsbauelementstruktur ATE440382T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/968,121 US6414365B1 (en) 2001-10-01 2001-10-01 Thin-layer silicon-on-insulator (SOI) high-voltage device structure
PCT/IB2002/003737 WO2003030262A2 (en) 2001-10-01 2002-09-11 Silicon-on-insulator high voltage device structure

Publications (1)

Publication Number Publication Date
ATE440382T1 true ATE440382T1 (de) 2009-09-15

Family

ID=25513766

Family Applications (1)

Application Number Title Priority Date Filing Date
AT02765227T ATE440382T1 (de) 2001-10-01 2002-09-11 Silizium-auf-isolator- hochspannungsbauelementstruktur

Country Status (8)

Country Link
US (1) US6414365B1 (de)
EP (1) EP1438752B1 (de)
JP (1) JP2005505136A (de)
KR (1) KR100904785B1 (de)
CN (1) CN1561548B (de)
AT (1) ATE440382T1 (de)
DE (1) DE60233422D1 (de)
WO (1) WO2003030262A2 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100843717B1 (ko) * 2007-06-28 2008-07-04 삼성전자주식회사 플로팅 바디 소자 및 벌크 바디 소자를 갖는 반도체소자 및그 제조방법
JP5154000B2 (ja) * 2005-05-13 2013-02-27 ラピスセミコンダクタ株式会社 半導体装置
US7227233B2 (en) * 2005-09-12 2007-06-05 International Business Machines Corporation Silicon-on-insulator (SOI) Read Only Memory (ROM) array and method of making a SOI ROM
JP4830418B2 (ja) * 2005-09-16 2011-12-07 株式会社デンソー 半導体装置
US7790527B2 (en) * 2006-02-03 2010-09-07 International Business Machines Corporation High-voltage silicon-on-insulator transistors and methods of manufacturing the same
US8368144B2 (en) 2006-12-18 2013-02-05 Infineon Technologies Ag Isolated multigate FET circuit blocks with different ground potentials
CN101916730B (zh) * 2010-07-22 2012-07-11 中国科学院上海微系统与信息技术研究所 一种具有线性缓冲层的soi超结ldmos制作方法
CN101980364B (zh) * 2010-08-31 2011-12-21 电子科技大学 一种薄层soi复合功率器件
US8901676B2 (en) 2011-01-03 2014-12-02 International Business Machines Corporation Lateral extended drain metal oxide semiconductor field effect transistor (LEDMOSFET) having a high drain-to-body breakdown voltage (Vb), a method of forming an LEDMOSFET, and a silicon-controlled rectifier (SCR) incorporating a complementary pair of LEDMOSFETs
US8299547B2 (en) * 2011-01-03 2012-10-30 International Business Machines Corporation Lateral extended drain metal oxide semiconductor field effect transistor (LEDMOSFET) with tapered dielectric plates
US9245960B2 (en) 2013-02-08 2016-01-26 Globalfoundries Inc. Lateral extended drain metal oxide semiconductor field effect transistor (LEDMOSFET) with tapered airgap field plates
US9768028B1 (en) 2016-08-10 2017-09-19 Globalfoundries Inc. Semiconductor structure with a dopant implant region having a linearly graded conductivity level and method of forming the structure
KR102379040B1 (ko) 2020-02-24 2022-03-25 삼육대학교산학협력단 최적 대전 상대 탐색 방법 및 장치

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04348068A (ja) * 1991-03-18 1992-12-03 Toshiba Corp 半導体記憶装置
JP3251778B2 (ja) * 1993-09-27 2002-01-28 三菱電機株式会社 半導体記憶装置およびその製造方法
KR100260560B1 (ko) * 1998-03-18 2000-07-01 윤종용 실리콘-온 인슐레이터 구조를 이용한 반도체 메모리 장치 및 그제조 방법
US6001710A (en) * 1998-03-30 1999-12-14 Spectrian, Inc. MOSFET device having recessed gate-drain shield and method
JP3971062B2 (ja) * 1999-07-29 2007-09-05 株式会社東芝 高耐圧半導体装置
US6313489B1 (en) * 1999-11-16 2001-11-06 Philips Electronics North America Corporation Lateral thin-film silicon-on-insulator (SOI) device having a lateral drift region with a retrograde doping profile, and method of making such a device
US6400015B1 (en) * 2000-03-31 2002-06-04 Intel Corporation Method of creating shielded structures to protect semiconductor devices

Also Published As

Publication number Publication date
EP1438752A2 (de) 2004-07-21
JP2005505136A (ja) 2005-02-17
KR20040037226A (ko) 2004-05-04
DE60233422D1 (de) 2009-10-01
CN1561548A (zh) 2005-01-05
KR100904785B1 (ko) 2009-06-25
WO2003030262A3 (en) 2003-06-05
WO2003030262A2 (en) 2003-04-10
EP1438752B1 (de) 2009-08-19
CN1561548B (zh) 2011-01-19
US6414365B1 (en) 2002-07-02

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Legal Events

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