ATE403187T1 - Verfahren und system zur aufrechterhaltung der einheitlichkeit eines cache-speichers durch mehrere unabhängige prozesse - Google Patents

Verfahren und system zur aufrechterhaltung der einheitlichkeit eines cache-speichers durch mehrere unabhängige prozesse

Info

Publication number
ATE403187T1
ATE403187T1 AT06708695T AT06708695T ATE403187T1 AT E403187 T1 ATE403187 T1 AT E403187T1 AT 06708695 T AT06708695 T AT 06708695T AT 06708695 T AT06708695 T AT 06708695T AT E403187 T1 ATE403187 T1 AT E403187T1
Authority
AT
Austria
Prior art keywords
cache memory
maintaining
uniformity
data
independent processes
Prior art date
Application number
AT06708695T
Other languages
English (en)
Inventor
Frederick Ros
Rudy Daniello
Luc Isnardy
Claudine Reynaud
Wayne Rubenstein
Original Assignee
Amadeus Sas
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Amadeus Sas filed Critical Amadeus Sas
Application granted granted Critical
Publication of ATE403187T1 publication Critical patent/ATE403187T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/084—Multiuser, multiprocessor or multiprocessing cache systems with a shared cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Advance Control (AREA)
AT06708695T 2005-03-16 2006-03-08 Verfahren und system zur aufrechterhaltung der einheitlichkeit eines cache-speichers durch mehrere unabhängige prozesse ATE403187T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US66191305P 2005-03-16 2005-03-16
EP05102054A EP1703404A1 (de) 2005-03-16 2005-03-16 Verfahren und System zur Kohärenzaufrechterhaltung von Cache-Speichern, auf die bei unabhängigen Prozessen zugegriffen wird

Publications (1)

Publication Number Publication Date
ATE403187T1 true ATE403187T1 (de) 2008-08-15

Family

ID=34938990

Family Applications (1)

Application Number Title Priority Date Filing Date
AT06708695T ATE403187T1 (de) 2005-03-16 2006-03-08 Verfahren und system zur aufrechterhaltung der einheitlichkeit eines cache-speichers durch mehrere unabhängige prozesse

Country Status (12)

Country Link
US (1) US7971000B2 (de)
EP (2) EP1703404A1 (de)
JP (1) JP4999833B2 (de)
KR (1) KR101268437B1 (de)
CN (1) CN100594483C (de)
AT (1) ATE403187T1 (de)
AU (1) AU2006224669B2 (de)
BR (1) BRPI0607628A2 (de)
CA (1) CA2596290C (de)
DE (1) DE602006002032D1 (de)
ES (1) ES2312119T3 (de)
WO (1) WO2006097424A1 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100489814C (zh) * 2007-08-01 2009-05-20 杭州华三通信技术有限公司 一种共享缓存系统及实现方法
US9436502B2 (en) * 2010-12-10 2016-09-06 Microsoft Technology Licensing, Llc Eventually consistent storage and transactions in cloud based environment
CN103136080B (zh) * 2013-03-12 2016-07-13 青岛中星微电子有限公司 一种缓存锁定功能的测试方法和装置
US10049078B1 (en) * 2015-06-25 2018-08-14 Amazon Technologies, Inc. Accessing a memory location using a two-stage hash scheme
JP6674092B2 (ja) * 2016-02-10 2020-04-01 富士通株式会社 データ管理プログラム、データ管理装置、及びデータ管理方法
CN106020999B (zh) * 2016-05-31 2017-10-17 广东欧珀移动通信有限公司 一种操作系统内部的通信方法及设备

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7103794B2 (en) * 1998-06-08 2006-09-05 Cacheflow, Inc. Network object cache engine
US6044430A (en) * 1997-12-17 2000-03-28 Advanced Micro Devices Inc. Real time interrupt handling for superscalar processors
US6275832B1 (en) * 1998-09-21 2001-08-14 International Business Machines Corporation Providing transaction undo without logging
US6591347B2 (en) * 1998-10-09 2003-07-08 National Semiconductor Corporation Dynamic replacement technique in a shared cache
US7203709B2 (en) * 2000-05-12 2007-04-10 Oracle International Corporation Transaction-aware caching for access control metadata
US6842832B1 (en) * 2000-08-25 2005-01-11 International Business Machines Corporation Reclaim space reserve for a compressed memory system
KR100832222B1 (ko) * 2001-06-09 2008-05-23 자프 아게 메인 메모리 데이터베이스 시스템의 색인 구조를 위한캐쉬에 최적화된 동시성 제어방법
US7020746B2 (en) * 2003-01-28 2006-03-28 Microsoft Corporation Method and system for an atomically updated, central cache memory
US7558920B2 (en) * 2004-06-30 2009-07-07 Intel Corporation Apparatus and method for partitioning a shared cache of a chip multi-processor
US7590803B2 (en) * 2004-09-23 2009-09-15 Sap Ag Cache eviction

Also Published As

Publication number Publication date
US7971000B2 (en) 2011-06-28
EP1866770B1 (de) 2008-07-30
AU2006224669A1 (en) 2006-09-21
ES2312119T3 (es) 2009-02-16
EP1703404A1 (de) 2006-09-20
WO2006097424A1 (fr) 2006-09-21
CN100594483C (zh) 2010-03-17
JP2008533600A (ja) 2008-08-21
CA2596290A1 (fr) 2006-09-21
EP1866770A1 (de) 2007-12-19
CN101185068A (zh) 2008-05-21
KR101268437B1 (ko) 2013-06-04
BRPI0607628A2 (pt) 2010-04-20
US20080183970A1 (en) 2008-07-31
AU2006224669B2 (en) 2011-09-08
JP4999833B2 (ja) 2012-08-15
DE602006002032D1 (de) 2008-09-11
CA2596290C (fr) 2014-08-19
KR20080023285A (ko) 2008-03-13

Similar Documents

Publication Publication Date Title
ATE403187T1 (de) Verfahren und system zur aufrechterhaltung der einheitlichkeit eines cache-speichers durch mehrere unabhängige prozesse
WO2011068975A3 (en) Dynamic code insertion and removal for static analysis based sandboxes
TW200625101A (en) Backup/restore system and method thereof
BRPI0600777A (pt) método e sistema para a criação, armazenamento, gerenciamento e consumo de dados especìficos de cultura
BR112014013583A8 (pt) método e aparelho para otimização de inicialização confiável
WO2006073633A3 (en) Computer readable medium, method and apparatus for preserving filtering conditions to query multilingual data sources at various locales when regenerating a report
MX2007004061A (es) Uso controlado de software en una arquitectura basada en red.
BRPI0714665A2 (pt) Composto, pró-droga, agente farmacêutico, e, método para a profilaxia ou tratamento do câncer
BR112014007679A2 (pt) sistemas e métodos para a implementação de fluxo de trabalho médico
WO2007005562A3 (en) Shared file system management between independent operating systems
BRPI0608750A2 (pt) método e sistema emitir e processar instruções superescalar e vliw misturadas
NO20075077L (no) Fremgangsmate for a forbedre laering og hukommelse i pattedyr
TW200502954A (en) Cache integrity apparatus, systems, and methods
ATE517376T1 (de) Verfahren zur zugriffskontrolle auf eine automatisierungsanlage
GB2437888A (en) System for restricted cache access during data transfers and method thereof
WO2008108129A1 (ja) メモリアクセス制御システム、メモリアクセス制御方法およびそのプログラム
GT200800154A (es) N-sulfonilacion selectiva de alcoholes 2-amino trifluoroalquilo sustituidos
GB2565023A (en) Method and apparatus for maintaining data coherence in a non-uniform compute device
Secchi et al. Antwerp, territory of a new modernity
WO2006110921A3 (en) System and method for scanning memory for pestware offset signatures
ATE402211T1 (de) Verfahren zur herstellung von farblosen, lagerstabilen biuretgruppenhaltigen polyisocyanaten
ATE551640T1 (de) Verfahren zur dynamischen konfiguration einer bedienoberfläche eines funktionsbausteins
JP2006216027A5 (de)
GB2579329A (en) Cache management
DE602007008804D1 (de) Fernkopien ausführendes Speichersystem

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties