ATE360252T1 - Speichermodulbaugruppe, die teilweise defekte chips verwendet - Google Patents
Speichermodulbaugruppe, die teilweise defekte chips verwendetInfo
- Publication number
- ATE360252T1 ATE360252T1 AT03713706T AT03713706T ATE360252T1 AT E360252 T1 ATE360252 T1 AT E360252T1 AT 03713706 T AT03713706 T AT 03713706T AT 03713706 T AT03713706 T AT 03713706T AT E360252 T1 ATE360252 T1 AT E360252T1
- Authority
- AT
- Austria
- Prior art keywords
- partially
- memory module
- clock
- module assembly
- defective
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/23—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/022—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in I/O circuitry
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/88—Masking faults in memories by using spares or by reconfiguring with partially good memories
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/88—Masking faults in memories by using spares or by reconfiguring with partially good memories
- G11C29/886—Masking faults in memories by using spares or by reconfiguring with partially good memories combining plural defective memory devices to provide a contiguous address range, e.g. one device supplies working blocks to replace defective blocks in another device
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
- G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0286—Programmable, customizable or modifiable circuits
- H05K1/029—Programmable, customizable or modifiable circuits having a programmable lay-out, i.e. adapted for choosing between a few possibilities
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0286—Programmable, customizable or modifiable circuits
- H05K1/0292—Programmable, customizable or modifiable circuits having a modifiable lay-out, i.e. adapted for engineering changes or repair
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W42/00—Arrangements for protection of devices
- H10W42/121—Arrangements for protection of devices protecting against mechanical damage
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10159—Memory
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/16—Inspection; Monitoring; Aligning
- H05K2203/162—Testing a finished product, e.g. heat cycle testing of solder joints
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/581—Auxiliary members, e.g. flow barriers
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- Theoretical Computer Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Computer Hardware Design (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Semiconductor Memories (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Semiconductor Integrated Circuits (AREA)
- Dram (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US36003602P | 2002-02-26 | 2002-02-26 | |
| US10/371,736 US20030161198A1 (en) | 2002-02-26 | 2003-02-20 | Method and apparatus for implementing a selectively operable clock booster for DDR memory or other logic modules which utilize partially-defective memory parts, or a combination of partially-defective and flawless memory parts |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE360252T1 true ATE360252T1 (de) | 2007-05-15 |
Family
ID=27760587
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT03713706T ATE360252T1 (de) | 2002-02-26 | 2003-02-24 | Speichermodulbaugruppe, die teilweise defekte chips verwendet |
Country Status (10)
| Country | Link |
|---|---|
| US (1) | US20030161198A1 (de) |
| EP (2) | EP1699056A1 (de) |
| KR (1) | KR20050002834A (de) |
| AT (1) | ATE360252T1 (de) |
| AU (1) | AU2003217745A1 (de) |
| CA (1) | CA2477754A1 (de) |
| DE (1) | DE60313302T2 (de) |
| DK (1) | DK1483722T3 (de) |
| ES (1) | ES2283760T3 (de) |
| WO (1) | WO2003073356A1 (de) |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0738274B2 (ja) * | 1988-12-22 | 1995-04-26 | 株式会社東芝 | 不揮発性半導体メモリシステム |
| US4922128A (en) * | 1989-01-13 | 1990-05-01 | Ibm Corporation | Boost clock circuit for driving redundant wordlines and sample wordlines |
| US5208178A (en) * | 1990-08-02 | 1993-05-04 | Hitachi, Ltd. | Manufacturing a semiconductor integrated circuit device having on chip logic correction |
| US5655113A (en) * | 1994-07-05 | 1997-08-05 | Monolithic System Technology, Inc. | Resynchronization circuit for a memory system and method of operating same |
| JP3273440B2 (ja) * | 1994-10-19 | 2002-04-08 | マイクロン・テクノロジー・インコーポレーテッド | 部分的に良好なメモリ集積回路から使用可能な部分を得るための効率的な方法 |
| IN188196B (de) * | 1995-05-15 | 2002-08-31 | Silicon Graphics Inc | |
| JPH09282900A (ja) * | 1996-04-11 | 1997-10-31 | Oki Electric Ind Co Ltd | メモリモジュール |
| US6119049A (en) * | 1996-08-12 | 2000-09-12 | Tandon Associates, Inc. | Memory module assembly using partially defective chips |
| US5867448A (en) * | 1997-06-11 | 1999-02-02 | Cypress Semiconductor Corp. | Buffer for memory modules with trace delay compensation |
| US6351827B1 (en) * | 1998-04-08 | 2002-02-26 | Kingston Technology Co. | Voltage and clock margin testing of memory-modules using an adapter board mounted to a PC motherboard |
| US6195762B1 (en) * | 1998-06-24 | 2001-02-27 | Micron Techonology, Inc. | Circuit and method for masking a dormant memory cell |
| US6282210B1 (en) * | 1998-08-12 | 2001-08-28 | Staktek Group L.P. | Clock driver with instantaneously selectable phase and method for use in data communication systems |
| JP4480855B2 (ja) * | 2000-06-08 | 2010-06-16 | 富士通マイクロエレクトロニクス株式会社 | 半導体デバイスを含むモジュール、及びモジュールを含むシステム |
| US6445625B1 (en) * | 2000-08-25 | 2002-09-03 | Micron Technology, Inc. | Memory device redundancy selection having test inputs |
| US6711695B1 (en) * | 2001-01-26 | 2004-03-23 | Hewlett-Packard Development Company, L.P. | PECL voltage DIMM with remote multi-module etch skew compensation |
| US6763444B2 (en) * | 2001-05-08 | 2004-07-13 | Micron Technology, Inc. | Read/write timing calibration of a memory array using a row or a redundant row |
-
2003
- 2003-02-20 US US10/371,736 patent/US20030161198A1/en not_active Abandoned
- 2003-02-24 KR KR10-2004-7013211A patent/KR20050002834A/ko not_active Withdrawn
- 2003-02-24 DE DE60313302T patent/DE60313302T2/de not_active Expired - Fee Related
- 2003-02-24 WO PCT/US2003/005845 patent/WO2003073356A1/en not_active Ceased
- 2003-02-24 CA CA002477754A patent/CA2477754A1/en not_active Abandoned
- 2003-02-24 DK DK03713706T patent/DK1483722T3/da active
- 2003-02-24 EP EP06115412A patent/EP1699056A1/de not_active Withdrawn
- 2003-02-24 AU AU2003217745A patent/AU2003217745A1/en not_active Abandoned
- 2003-02-24 AT AT03713706T patent/ATE360252T1/de not_active IP Right Cessation
- 2003-02-24 EP EP03713706A patent/EP1483722B1/de not_active Expired - Lifetime
- 2003-02-24 ES ES03713706T patent/ES2283760T3/es not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| AU2003217745A1 (en) | 2003-09-09 |
| EP1483722A1 (de) | 2004-12-08 |
| CA2477754A1 (en) | 2003-09-04 |
| DE60313302D1 (de) | 2007-05-31 |
| DE60313302T2 (de) | 2008-01-03 |
| WO2003073356A8 (en) | 2004-07-29 |
| EP1699056A1 (de) | 2006-09-06 |
| ES2283760T3 (es) | 2007-11-01 |
| US20030161198A1 (en) | 2003-08-28 |
| DK1483722T3 (da) | 2007-06-25 |
| EP1483722A4 (de) | 2005-04-27 |
| WO2003073356A1 (en) | 2003-09-04 |
| AU2003217745A8 (en) | 2003-09-09 |
| KR20050002834A (ko) | 2005-01-10 |
| EP1483722B1 (de) | 2007-04-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6414530B2 (en) | Semiconductor integrated circuit device, semiconductor memory system and clock synchronous circuit | |
| KR102129968B1 (ko) | 반도체 메모리 장치 및 이를 위한 입출력 제어 회로 | |
| WO2003073357A8 (en) | Methods and apparatus for fabricating chip-on-board modules | |
| TW200703354A (en) | Internally generating patterns for testing in an integrated circuit device | |
| AU2002338564A1 (en) | Circuit and method for memory test and repair | |
| TW200721166A (en) | Semiconductor memories with block-dedicated programmable latency register | |
| DE60035810D1 (de) | Flash-Speicher | |
| DE60308183D1 (de) | Pufferanordnung für speicher | |
| EP0813206A3 (de) | Selbstanpassende Leseverstärkerverzögerungsschaltung | |
| KR950020966A (ko) | 동기형 반도체 장치용 파워 관리회로 | |
| TW373179B (en) | Semiconductor memory device | |
| DE60015991D1 (de) | Prüfgerät zum gleichzeitigen testen mehrerer integrierter schaltkreise | |
| TW200502988A (en) | An apparatus and method for a configurable mirror fast sense amplifier | |
| TWI268650B (en) | System and method for reducing short circuit current in a buffer | |
| WO2002075341A8 (fr) | Dispositif semi-conducteur et son procede de test | |
| ATE424582T1 (de) | Verfahren und vorrichtung zum starten von leseoptimierungen in speicher-verbindungen | |
| ATE363715T1 (de) | Speicherbaustein mit mehrfunktions-strobe- anschlüssen | |
| ATE360252T1 (de) | Speichermodulbaugruppe, die teilweise defekte chips verwendet | |
| ATE290744T1 (de) | Anpassbare chipkarte | |
| ATE550734T1 (de) | Chipkarte | |
| KR970072329A (ko) | 반도체 장치 | |
| US6714438B2 (en) | Semiconductor device with high speed latch operation | |
| ATE365996T1 (de) | Vorrichtung und verfahren in einer halbleiterschaltung | |
| TWI256539B (en) | Apparatus and method for generating a clock signal | |
| DE60336461D1 (de) | Lüchtigen speicher in einer integrierten schaltung und integrierte schaltung hierfür |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| UEP | Publication of translation of european patent specification |
Ref document number: 1483722 Country of ref document: EP |
|
| REN | Ceased due to non-payment of the annual fee |