ATE304750T1 - Verfahren und anordnung zur verbesserung des einrastens eines frequenzsynthetisierers durch reduzierung von zyklussprüngen - Google Patents

Verfahren und anordnung zur verbesserung des einrastens eines frequenzsynthetisierers durch reduzierung von zyklussprüngen

Info

Publication number
ATE304750T1
ATE304750T1 AT02396109T AT02396109T ATE304750T1 AT E304750 T1 ATE304750 T1 AT E304750T1 AT 02396109 T AT02396109 T AT 02396109T AT 02396109 T AT02396109 T AT 02396109T AT E304750 T1 ATE304750 T1 AT E304750T1
Authority
AT
Austria
Prior art keywords
signal pulse
received
signal
locking
improving
Prior art date
Application number
AT02396109T
Other languages
English (en)
Inventor
Kalle Asikainen
Sami Rintamaeki
Original Assignee
Nokia Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Corp filed Critical Nokia Corp
Application granted granted Critical
Publication of ATE304750T1 publication Critical patent/ATE304750T1/de

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D13/00Circuits for comparing the phase or frequency of two mutually-independent oscillations
    • H03D13/003Circuits for comparing the phase or frequency of two mutually-independent oscillations in which both oscillations are converted by logic means into pulses which are applied to filtering or integrating means
    • H03D13/004Circuits for comparing the phase or frequency of two mutually-independent oscillations in which both oscillations are converted by logic means into pulses which are applied to filtering or integrating means the logic means delivering pulses at more than one terminal, e.g. up and down pulses
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Transmitters (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
AT02396109T 2001-06-29 2002-07-01 Verfahren und anordnung zur verbesserung des einrastens eines frequenzsynthetisierers durch reduzierung von zyklussprüngen ATE304750T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FI20011422A FI114886B (fi) 2001-06-29 2001-06-29 Menetelmä ja laite taajuussyntetisaattorin tehokkuuden parantamiseksi

Publications (1)

Publication Number Publication Date
ATE304750T1 true ATE304750T1 (de) 2005-09-15

Family

ID=8561551

Family Applications (1)

Application Number Title Priority Date Filing Date
AT02396109T ATE304750T1 (de) 2001-06-29 2002-07-01 Verfahren und anordnung zur verbesserung des einrastens eines frequenzsynthetisierers durch reduzierung von zyklussprüngen

Country Status (6)

Country Link
US (1) US6853224B2 (de)
EP (1) EP1271787B1 (de)
JP (1) JP4405711B2 (de)
AT (1) ATE304750T1 (de)
DE (1) DE60206105T2 (de)
FI (1) FI114886B (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FI113817B (fi) * 2002-05-27 2004-06-15 Nokia Corp Parannettu piirijärjestely vaihelukoksi, vaihelukon toteuttava integroitupiiri, vaihelukkoa hyödyntävä menetelmä ja solukkoverkon päätelaite
KR100456476B1 (ko) * 2002-12-23 2004-11-09 한국전자통신연구원 주파수 호핑 시스템 및 그 방법
US7315601B2 (en) * 2003-03-13 2008-01-01 Texas Instruments Incorporated Low-noise sigma-delta frequency synthesizer
JP2008514163A (ja) * 2004-09-22 2008-05-01 ジーシーティー セミコンダクター インコーポレイテッド 広帯域周波数を発振する装置および方法
US7362185B1 (en) * 2005-01-27 2008-04-22 Cypress Semiconductor Corporation Analog based, state machine controlled, frequency smooth switching method for frequency timing generators
US8483985B2 (en) * 2007-01-05 2013-07-09 Qualcomm, Incorporated PLL loop bandwidth calibration
US8284822B2 (en) * 2007-02-27 2012-10-09 Broadcom Corporation Method and system for utilizing direct digital frequency synthesis to process signals in multi-band applications
US7826550B2 (en) * 2007-02-28 2010-11-02 Broadcom Corp. Method and system for a high-precision frequency generator using a direct digital frequency synthesizer for transmitters and receivers
US8116387B2 (en) * 2007-03-01 2012-02-14 Broadcom Corporation Method and system for a digital polar transmitter

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2174855B (en) 1985-04-29 1989-08-23 Fluke Mfg Co John Wide range digital phase/frequency detector
US4902920A (en) * 1988-09-26 1990-02-20 General Signal Corporation Extended range phase detector
US4952889A (en) * 1989-04-28 1990-08-28 Motorola, Inc. Loop filter modulated synthesizer
US5055803A (en) * 1990-12-14 1991-10-08 Motorola, Inc. Parameter tolerant PLL synthesizer
US5952853A (en) 1997-12-23 1999-09-14 Hewlett-Packard Company Method for extending the output range of pulse-width based phase detectors
EP0991193A1 (de) * 1998-09-29 2000-04-05 Koninklijke Philips Electronics N.V. Funkgerät mit einem Frequenzsynthetisierer und Phasendiskriminator für ein solches Gerät
DE19859515C1 (de) * 1998-12-22 2000-04-20 Siemens Ag Digitaler Phasen-Frequenz-Detektor
US6100721A (en) 1999-02-01 2000-08-08 Motorola, Inc. Circuit and method of extending the linear range of a phase frequency detector
US6265902B1 (en) * 1999-11-02 2001-07-24 Ericsson Inc. Slip-detecting phase detector and method for improving phase-lock loop lock time

Also Published As

Publication number Publication date
FI20011422A (fi) 2002-12-30
EP1271787A2 (de) 2003-01-02
DE60206105D1 (de) 2006-01-26
US20030001681A1 (en) 2003-01-02
JP2003101410A (ja) 2003-04-04
DE60206105T2 (de) 2006-03-23
EP1271787A3 (de) 2003-01-08
FI114886B (fi) 2005-01-14
US6853224B2 (en) 2005-02-08
EP1271787B1 (de) 2005-09-14
JP4405711B2 (ja) 2010-01-27

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