ATE263393T1 - Mikroprozessor mit reduziertem kontextumschaltungsaufwand und verfahren - Google Patents

Mikroprozessor mit reduziertem kontextumschaltungsaufwand und verfahren

Info

Publication number
ATE263393T1
ATE263393T1 AT00922226T AT00922226T ATE263393T1 AT E263393 T1 ATE263393 T1 AT E263393T1 AT 00922226 T AT00922226 T AT 00922226T AT 00922226 T AT00922226 T AT 00922226T AT E263393 T1 ATE263393 T1 AT E263393T1
Authority
AT
Austria
Prior art keywords
dirty bit
registers
microprocessor
working
new
Prior art date
Application number
AT00922226T
Other languages
English (en)
Inventor
Ashley Saulsbury
Daniel S Rice
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Application granted granted Critical
Publication of ATE263393T1 publication Critical patent/ATE263393T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/461—Saving or restoring of program or task context
    • G06F9/463—Program control block organisation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/383—Operand prefetching
    • G06F9/3832—Value prediction for operands; operand history buffers

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Communication Control (AREA)
AT00922226T 1999-04-14 2000-04-14 Mikroprozessor mit reduziertem kontextumschaltungsaufwand und verfahren ATE263393T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/291,811 US6314510B1 (en) 1999-04-14 1999-04-14 Microprocessor with reduced context switching overhead and corresponding method
PCT/US2000/010128 WO2000062165A2 (en) 1999-04-14 2000-04-14 Microprocessor with reduced context switching overhead and corresponding method

Publications (1)

Publication Number Publication Date
ATE263393T1 true ATE263393T1 (de) 2004-04-15

Family

ID=23121949

Family Applications (1)

Application Number Title Priority Date Filing Date
AT00922226T ATE263393T1 (de) 1999-04-14 2000-04-14 Mikroprozessor mit reduziertem kontextumschaltungsaufwand und verfahren

Country Status (6)

Country Link
US (1) US6314510B1 (de)
EP (1) EP1192538B1 (de)
AT (1) ATE263393T1 (de)
AU (1) AU4244600A (de)
DE (1) DE60009496T2 (de)
WO (1) WO2000062165A2 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7546444B1 (en) 1999-09-01 2009-06-09 Intel Corporation Register set used in multithreaded parallel processor architecture
US7257806B1 (en) * 1999-10-21 2007-08-14 Hewlett-Packard Development Company, L.P. System and method for efficiently passing information between compiler and post-compile-time software
EP1785862A3 (de) * 2000-02-29 2007-08-15 Fujitsu Limited Verfahren und Vorrichtung zur Pipeline-Verarbeitung
US7681018B2 (en) 2000-08-31 2010-03-16 Intel Corporation Method and apparatus for providing large register address space while maximizing cycletime performance for a multi-threaded register file set
US7089557B2 (en) * 2001-04-10 2006-08-08 Rusty Shawn Lee Data processing system and method for high-efficiency multitasking
US20030177342A1 (en) * 2002-03-15 2003-09-18 Hitachi Semiconductor (America) Inc. Processor with register dirty bits and special save multiple/return instructions
DE10245367A1 (de) * 2002-09-27 2004-04-15 Infineon Technologies Ag Prozessor mit expliziter Angabe über zu sichernde Informationen bei Unterprogrammsprüngen
US7343480B2 (en) * 2003-10-09 2008-03-11 International Business Machines Corporation Single cycle context switching by swapping a primary latch value and a selected secondary latch value in a register file
US7571284B1 (en) 2004-06-30 2009-08-04 Sun Microsystems, Inc. Out-of-order memory transactions in a fine-grain multithreaded/multi-core processor
US7606363B1 (en) 2005-07-26 2009-10-20 Rockwell Collins, Inc. System and method for context switching of a cryptographic engine
JP5028774B2 (ja) * 2005-09-22 2012-09-19 富士通株式会社 演算処理装置，情報処理装置，及びレジスタファイルの制御方法
US7634642B2 (en) * 2006-07-06 2009-12-15 International Business Machines Corporation Mechanism to save and restore cache and translation trace for fast context switch
US8261028B2 (en) * 2007-12-31 2012-09-04 Intel Corporation Cached dirty bits for context switch consistency checks
KR101996641B1 (ko) * 2012-02-06 2019-07-04 삼성전자주식회사 메모리 오버레이 장치 및 방법
DE102018128045A1 (de) * 2018-11-09 2020-05-14 Infineon Technologies Ag Behandlung von Ausnahmen in einem Programm
US10901878B2 (en) 2018-12-19 2021-01-26 International Business Machines Corporation Reduction of pseudo-random test case generation overhead

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2545789B2 (ja) 1986-04-14 1996-10-23 株式会社日立製作所 情報処理装置
US5745375A (en) 1995-09-29 1998-04-28 Intel Corporation Apparatus and method for controlling power usage
US5838962A (en) * 1997-04-09 1998-11-17 Hewlett-Packard Company Interrupt driven dynamic adjustment of branch predictions
US6145049A (en) * 1997-12-29 2000-11-07 Stmicroelectronics, Inc. Method and apparatus for providing fast switching between floating point and multimedia instructions using any combination of a first register file set and a second register file set
US6205543B1 (en) 1998-12-03 2001-03-20 Sun Microsystems, Inc. Efficient handling of a large register file for context switching

Also Published As

Publication number Publication date
EP1192538A2 (de) 2002-04-03
US6314510B1 (en) 2001-11-06
EP1192538B1 (de) 2004-03-31
DE60009496T2 (de) 2005-03-24
WO2000062165A3 (en) 2001-04-26
AU4244600A (en) 2000-11-14
DE60009496D1 (de) 2004-05-06
WO2000062165A2 (en) 2000-10-19

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Legal Events

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RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties