ATE262698T1 - Verfahren und vorrichtung zur fernüberprüfung von rechnersoftware und ausschaltung von fehlern - Google Patents

Verfahren und vorrichtung zur fernüberprüfung von rechnersoftware und ausschaltung von fehlern

Info

Publication number
ATE262698T1
ATE262698T1 AT00961598T AT00961598T ATE262698T1 AT E262698 T1 ATE262698 T1 AT E262698T1 AT 00961598 T AT00961598 T AT 00961598T AT 00961598 T AT00961598 T AT 00961598T AT E262698 T1 ATE262698 T1 AT E262698T1
Authority
AT
Austria
Prior art keywords
debugger
target computer
host
computer
serial bus
Prior art date
Application number
AT00961598T
Other languages
English (en)
Inventor
Georgios Chrysanthakopoulos
John Nels Fuller
Kenneth S Reneris
Original Assignee
Microsoft Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Microsoft Corp filed Critical Microsoft Corp
Application granted granted Critical
Publication of ATE262698T1 publication Critical patent/ATE262698T1/de

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/40052High-speed IEEE 1394 serial bus
    • H04L12/40058Isochronous transmission
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Preventing errors by testing or debugging software
    • G06F11/362Software debugging
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/40052High-speed IEEE 1394 serial bus
    • H04L12/40104Security; Encryption; Content protection
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/40052High-speed IEEE 1394 serial bus
    • H04L12/40123Interconnection of computers and peripherals

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Debugging And Monitoring (AREA)
AT00961598T 1999-12-02 2000-09-07 Verfahren und vorrichtung zur fernüberprüfung von rechnersoftware und ausschaltung von fehlern ATE262698T1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US16853799P 1999-12-02 1999-12-02
US48801500A 2000-01-20 2000-01-20
PCT/US2000/024469 WO2001040940A2 (en) 1999-12-02 2000-09-07 Method and apparatus for remotely debugging computer software over a serial bus

Publications (1)

Publication Number Publication Date
ATE262698T1 true ATE262698T1 (de) 2004-04-15

Family

ID=26864224

Family Applications (1)

Application Number Title Priority Date Filing Date
AT00961598T ATE262698T1 (de) 1999-12-02 2000-09-07 Verfahren und vorrichtung zur fernüberprüfung von rechnersoftware und ausschaltung von fehlern

Country Status (6)

Country Link
EP (1) EP1234235B1 (de)
AT (1) ATE262698T1 (de)
AU (1) AU7352800A (de)
DE (1) DE60009335T2 (de)
HK (1) HK1046968B (de)
WO (1) WO2001040940A2 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006069491A1 (en) 2004-12-31 2006-07-06 Intel Corporation Remote logging mechanism
US9251039B2 (en) 2012-02-17 2016-02-02 Microsoft Technology Licensing, Llc Remote debugging as a service
US11226755B1 (en) * 2017-09-28 2022-01-18 Amazon Technologies, Inc. Core dump in a storage device
CN115348199A (zh) * 2022-07-07 2022-11-15 株洲中车时代电气股份有限公司 基于mvb总线的车载网络调试系统及方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5911059A (en) * 1996-12-18 1999-06-08 Applied Microsystems, Inc. Method and apparatus for testing software
US5845152A (en) * 1997-03-19 1998-12-01 Apple Computer, Inc. Method for transmission of isochronous data with two cycle look ahead
US5978902A (en) * 1997-04-08 1999-11-02 Advanced Micro Devices, Inc. Debug interface including operating system access of a serial/parallel debug port
US6094530A (en) * 1998-04-29 2000-07-25 Intel Corporation Remotely monitoring execution of a program

Also Published As

Publication number Publication date
HK1046968A1 (en) 2003-01-30
WO2001040940A2 (en) 2001-06-07
WO2001040940A3 (en) 2002-01-10
HK1046968B (zh) 2004-12-03
AU7352800A (en) 2001-06-12
DE60009335T2 (de) 2004-08-12
EP1234235B1 (de) 2004-03-24
EP1234235A2 (de) 2002-08-28
DE60009335D1 (de) 2004-04-29

Similar Documents

Publication Publication Date Title
KR970029043A (ko) 컴퓨터 시스템 및 다수의 기능카드 중 한 개의 기능 카드를 격리하는 방법
CA2349662A1 (en) Interrupt architecture for a non-uniform memory access (numa) data processing system
GB9717760D0 (en) Method and apparatus for correlating logic analyzer state capture data with associated application data structures
KR20100054107A (ko) 인터럽트 검출 장치 및 정보 처리 시스템
US6412028B1 (en) Optimizing serial USB device transfers using virtual DMA techniques to emulate a direct memory access controller in software
EP0953902A3 (de) Anforderungen an PCI-System und Umsetzer nach Rückstellung
WO2008144179A8 (en) Method and apparatus for cache transactions in a data processing system
KR970007655A (ko) 콘트롤러에서의 데이터 전송 방법 및 장치
US9626319B2 (en) Allocating lanes in a peripheral component interconnect express (‘PCIe’) bus
CN114765051A (zh) 内存测试方法及装置、可读存储介质、电子设备
US7793024B2 (en) Method for utilizing a PCI-Express bus to communicate between system chips
ATE262698T1 (de) Verfahren und vorrichtung zur fernüberprüfung von rechnersoftware und ausschaltung von fehlern
WO2022032990A1 (zh) 一种命令信息传输方法、系统、装置及可读存储介质
US20080126632A1 (en) Stimulating and receiving test/debug data from a system under test via a drone card pci bus
EP0982664A3 (de) Verknüpfung eines Hauptprozessors an ein Speicherungsuntersystem
US6735659B1 (en) Method and apparatus for serial communication with a co-processor
JP2008503833A (ja) 並列通信バスに連結された装置内で割込みメッセージを待ち行列に入れるためのコンピュータシステム及び方法
JP5079502B2 (ja) 並列通信バスを介して割り込みメッセージを伝送するためのコンピュータシステムおよび方法
CN113778934A (zh) 基于PCIe的高速实时传输系统
TW200745871A (en) System having bus architecture for improving CPU performance and method thereof
JP4780333B2 (ja) データプリフェッチデバイス、データプリフェッチ方法およびデータプリフェッチプログラム
WO2001040945A3 (en) Method and apparatus for providing secure remote debugging of computer software over a serial bus
CA2140963C (en) Flag-based high-speed i/o data transfer
JP2005301714A (ja) マルチcpuシステム、そのデータ転送方法、及びそのプログラム
CN115827167A (zh) 一种提升SoC或ASIC混合验证的通信速率的方法

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties