ATE184139T1 - Schlüsselgleichungslöseschaltung und verwendung in einem reed-solomon dekoder - Google Patents
Schlüsselgleichungslöseschaltung und verwendung in einem reed-solomon dekoderInfo
- Publication number
- ATE184139T1 ATE184139T1 AT97901128T AT97901128T ATE184139T1 AT E184139 T1 ATE184139 T1 AT E184139T1 AT 97901128 T AT97901128 T AT 97901128T AT 97901128 T AT97901128 T AT 97901128T AT E184139 T1 ATE184139 T1 AT E184139T1
- Authority
- AT
- Austria
- Prior art keywords
- reed
- coefficient
- solomon decoder
- key equation
- equation solution
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
Landscapes
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Algebra (AREA)
- General Physics & Mathematics (AREA)
- Pure & Applied Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
- Detection And Correction Of Errors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9600798A FR2743912B1 (fr) | 1996-01-24 | 1996-01-24 | Circuit de resolution d'equation-cle et decodeur reed-solomon incorporant un tel circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE184139T1 true ATE184139T1 (de) | 1999-09-15 |
Family
ID=9488416
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT97901128T ATE184139T1 (de) | 1996-01-24 | 1997-01-21 | Schlüsselgleichungslöseschaltung und verwendung in einem reed-solomon dekoder |
Country Status (8)
Country | Link |
---|---|
EP (1) | EP0876710B1 (de) |
JP (1) | JP2000504157A (de) |
AT (1) | ATE184139T1 (de) |
AU (1) | AU1448297A (de) |
CA (1) | CA2244004A1 (de) |
DE (1) | DE69700469D1 (de) |
FR (1) | FR2743912B1 (de) |
WO (1) | WO1997027675A1 (de) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1131893B1 (de) | 1998-11-09 | 2004-08-04 | Broadcom Corporation | Vorwärtsfehlerkorrektur |
GB0024808D0 (en) | 2000-10-10 | 2000-11-22 | Smithkline Beecham Plc | Novel compounds |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5325373A (en) * | 1986-12-22 | 1994-06-28 | Canon Kabushiki Kaisha | Apparatus for encoding and decoding reed-solomon code |
JPS63186338A (ja) * | 1987-01-28 | 1988-08-01 | Nec Corp | 誤り訂正回路 |
US4868828A (en) * | 1987-10-05 | 1989-09-19 | California Institute Of Technology | Architecture for time or transform domain decoding of reed-solomon codes |
JPH0827732B2 (ja) * | 1991-01-22 | 1996-03-21 | インターナショナル・ビジネス・マシーンズ・コーポレイション | 線形代数コード復号のためのキー方程式を解く方法 |
US5414719A (en) * | 1992-04-24 | 1995-05-09 | Sharp Kabushiki Kaisha | Operating circuit for galois field |
WO1995012850A1 (en) * | 1993-11-04 | 1995-05-11 | Cirrus Logic, Inc. | Reed-solomon decoder |
-
1996
- 1996-01-24 FR FR9600798A patent/FR2743912B1/fr not_active Expired - Fee Related
-
1997
- 1997-01-21 DE DE69700469T patent/DE69700469D1/de not_active Expired - Lifetime
- 1997-01-21 AU AU14482/97A patent/AU1448297A/en not_active Abandoned
- 1997-01-21 AT AT97901128T patent/ATE184139T1/de not_active IP Right Cessation
- 1997-01-21 CA CA002244004A patent/CA2244004A1/fr not_active Abandoned
- 1997-01-21 JP JP9526594A patent/JP2000504157A/ja active Pending
- 1997-01-21 WO PCT/FR1997/000110 patent/WO1997027675A1/fr active IP Right Grant
- 1997-01-21 EP EP97901128A patent/EP0876710B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
FR2743912B1 (fr) | 1998-04-10 |
AU1448297A (en) | 1997-08-20 |
CA2244004A1 (fr) | 1997-07-31 |
DE69700469D1 (de) | 1999-10-07 |
WO1997027675A1 (fr) | 1997-07-31 |
EP0876710A1 (de) | 1998-11-11 |
JP2000504157A (ja) | 2000-04-04 |
FR2743912A1 (fr) | 1997-07-25 |
EP0876710B1 (de) | 1999-09-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Morii et al. | Efficient bit-serial multiplication and the discrete-time Wiener-Hopf equation over finite fields | |
Blahut | A universal Reed-Solomon decoder | |
US7322004B1 (en) | Efficient high-speed Reed-Solomon decoder | |
US7096409B2 (en) | Reed-solomon decoder and decoding method for errors and erasures decoding | |
EP0152702A2 (de) | Arithmetische Schaltung eines endlichen Feldes | |
US8335808B2 (en) | Method and apparatus for processing multiple decomposed data for calculating key equation polynomials in decoding error correction code | |
JPH10135848A (ja) | リードソロモン符号化装置およびその方法 | |
KR970004515B1 (ko) | 리드-솔로몬 복호기의 오류위치다항식 연산방법 및 장치 | |
US7353449B2 (en) | Method of soft-decision decoding of Reed-Solomon codes | |
ATE184139T1 (de) | Schlüsselgleichungslöseschaltung und verwendung in einem reed-solomon dekoder | |
EP0808029A3 (de) | Gerät zur Feststellung eines Fehlerlokalisierungspolynoms zum Gebrauch in einem Reed-Solomon Dekoder | |
Truong et al. | A new decoding algorithm for correcting both erasures and errors of Reed-Solomon codes | |
US6915478B2 (en) | Method and apparatus for computing Reed-Solomon error magnitudes | |
US6871315B2 (en) | Decoding circuit and decoding method thereof | |
EP1704647B1 (de) | Verfahren zur reed-solomon-codierung und -decodierung | |
US20020042804A1 (en) | Parallel processing syndrome calculating circuit and reed-solomon decoding circuit | |
JPH0476540B2 (de) | ||
US20070011592A1 (en) | Decoder architecture for Reed Solomon codes | |
JP4368020B2 (ja) | データシンボルの操作システム、データシンボルをエンコードするためのエラー訂正システムおよびエラー訂正方法 | |
Jain et al. | Efficient standard basis reed-solomon encoder | |
JPS6355815B2 (de) | ||
JPS63107319A (ja) | 拡張ガロア体上の多項式除算回路 | |
JPH0764810A (ja) | ガロア体演算器 | |
JP3860023B2 (ja) | 復号回路および復号方法 | |
Ramprasad et al. | Decorrelating (DECOR) transformations for low-power adaptive filters |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |