ATE116456T1 - Skalierbares parallel-vektorrechnersystem. - Google Patents

Skalierbares parallel-vektorrechnersystem.

Info

Publication number
ATE116456T1
ATE116456T1 AT91917879T AT91917879T ATE116456T1 AT E116456 T1 ATE116456 T1 AT E116456T1 AT 91917879 T AT91917879 T AT 91917879T AT 91917879 T AT91917879 T AT 91917879T AT E116456 T1 ATE116456 T1 AT E116456T1
Authority
AT
Austria
Prior art keywords
vector
processors
computer system
instructions
communication network
Prior art date
Application number
AT91917879T
Other languages
English (en)
Inventor
Steven M Oberlin
Bricky A Stephenson
Original Assignee
Cray Research Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cray Research Inc filed Critical Cray Research Inc
Application granted granted Critical
Publication of ATE116456T1 publication Critical patent/ATE116456T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors
    • G06F15/8092—Array of vector units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/461—Saving or restoring of program or task context
    • G06F9/462—Saving or restoring of program or task context with multiple register sets

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Complex Calculations (AREA)
  • Multi Processors (AREA)
AT91917879T 1990-10-19 1991-10-04 Skalierbares parallel-vektorrechnersystem. ATE116456T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US60032890A 1990-10-19 1990-10-19

Publications (1)

Publication Number Publication Date
ATE116456T1 true ATE116456T1 (de) 1995-01-15

Family

ID=24403170

Family Applications (1)

Application Number Title Priority Date Filing Date
AT91917879T ATE116456T1 (de) 1990-10-19 1991-10-04 Skalierbares parallel-vektorrechnersystem.

Country Status (6)

Country Link
EP (1) EP0553158B1 (de)
JP (1) JPH06502033A (de)
AT (1) ATE116456T1 (de)
CA (1) CA2094269A1 (de)
DE (1) DE69106384T2 (de)
WO (1) WO1992007335A1 (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5623698A (en) * 1993-04-30 1997-04-22 Cray Research, Inc. Memory interconnect network having separate routing networks for inputs and outputs using switches with FIFO queues and message steering bits
ES2116852B1 (es) * 1994-08-29 1999-03-16 Univ Catalunya Politecnica Sincronizacion del acceso a memoria en multiprocesadores vectoriales.
US6393497B1 (en) 1998-03-20 2002-05-21 Sun Microsystems, Inc. Downloadable smart proxies for performing processing associated with a remote procedure call in a distributed system
US6282652B1 (en) 1998-02-26 2001-08-28 Sun Microsystems, Inc. System for separately designating security requirements for methods invoked on a computer
US5832529A (en) 1996-10-11 1998-11-03 Sun Microsystems, Inc. Methods, apparatus, and product for distributed garbage collection
CN1204809A (zh) * 1997-07-09 1999-01-13 王迪兴 运算、交换、控制、多用平台
US6223208B1 (en) 1997-10-03 2001-04-24 International Business Machines Corporation Moving data in and out of processor units using idle register/storage functional units
JP2002505471A (ja) * 1998-02-26 2002-02-19 サンマイクロシステムズ インコーポレーテッド 遠隔処理の中断および継続の方法と装置
CN1168025C (zh) * 1999-03-10 2004-09-22 国际商业机器公司 用于多线程处理机的指令高速缓存器
GB2348984B (en) * 1999-04-09 2004-05-12 Pixelfusion Ltd Parallel data processing systems
US7627736B2 (en) 1999-04-09 2009-12-01 Clearspeed Technology Plc Thread manager to control an array of processing elements
US7526630B2 (en) 1999-04-09 2009-04-28 Clearspeed Technology, Plc Parallel data processing apparatus
US7506136B2 (en) 1999-04-09 2009-03-17 Clearspeed Technology Plc Parallel data processing apparatus
SE9901605L (sv) * 1999-05-04 2000-11-05 Net Insight Ab Förfarande och anordning för bufferthantering
US7421572B1 (en) * 1999-09-01 2008-09-02 Intel Corporation Branch instruction for processor with branching dependent on a specified bit in a register
US8082491B1 (en) 2000-05-09 2011-12-20 Oracle America, Inc. Dynamic displays in a distributed computing environment
US6862594B1 (en) 2000-05-09 2005-03-01 Sun Microsystems, Inc. Method and apparatus to discover services using flexible search criteria
US6934755B1 (en) 2000-06-02 2005-08-23 Sun Microsystems, Inc. System and method for migrating processes on a network
US6925643B2 (en) * 2002-10-11 2005-08-02 Sandbridge Technologies, Inc. Method and apparatus for thread-based memory access in a multithreaded processor
GB2451845B (en) * 2007-08-14 2010-03-17 Imagination Tech Ltd Compound instructions in a multi-threaded processor
US10452585B2 (en) 2016-09-16 2019-10-22 Hewlett Packard Enterprise Development Lp Crossbar switch with pipeline delay registers
CN116991764B (zh) * 2023-08-03 2024-04-05 广州安凯微电子股份有限公司 一种高性能的Flash控制器和嵌入式系统

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3676852A (en) * 1970-07-20 1972-07-11 Ibm Multiple program digital computer
EP0325384B1 (de) * 1988-01-15 1993-09-29 Quantel Limited Datenverarbeitung und -übertragung

Also Published As

Publication number Publication date
DE69106384D1 (de) 1995-02-09
DE69106384T2 (de) 1995-08-10
EP0553158B1 (de) 1994-12-28
WO1992007335A1 (en) 1992-04-30
EP0553158A1 (de) 1993-08-04
JPH06502033A (ja) 1994-03-03
CA2094269A1 (en) 1992-04-20

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Legal Events

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RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties