ATA594271A - Halbleitervorrichtung mit isolierzonen aus versenktem siliziumoxyd und mit einem transistor - Google Patents

Halbleitervorrichtung mit isolierzonen aus versenktem siliziumoxyd und mit einem transistor

Info

Publication number
ATA594271A
ATA594271A AT594271A AT594271A ATA594271A AT A594271 A ATA594271 A AT A594271A AT 594271 A AT594271 A AT 594271A AT 594271 A AT594271 A AT 594271A AT A594271 A ATA594271 A AT A594271A
Authority
AT
Austria
Prior art keywords
transistor
semi
conductor device
insulating zones
zones made
Prior art date
Application number
AT594271A
Other languages
English (en)
Other versions
AT339961B (de
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Publication of ATA594271A publication Critical patent/ATA594271A/de
Application granted granted Critical
Publication of AT339961B publication Critical patent/AT339961B/de

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W15/00Highly-doped buried regions of integrated devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H10D84/613Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
    • H10D84/615Combinations of vertical BJTs and one or more of resistors or capacitors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01Manufacture or treatment
    • H10W10/011Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • H10W10/0125Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics
    • H10W10/0126Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics introducing electrical active impurities in local oxidation regions to create channel stoppers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • H10W10/13Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W15/00Highly-doped buried regions of integrated devices
    • H10W15/01Manufacture or treatment
AT594271A 1970-09-10 1971-07-08 Halbleitervorrichtung mit isolierzonen aus versenktem siliziumoxyd und mit einem transistor AT339961B (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7013365.A NL159819B (nl) 1970-09-10 1970-09-10 Halfgeleiderinrichting met een halfgeleiderlichaam, bevat- tende een transistor, waarbij een in het halfgeleiderli- chaam verzonken patroon van isolerend materiaal, dat door plaatselijke oxydatie van het halfgeleiderlichaam gevormd is, aanwezig is.

Publications (2)

Publication Number Publication Date
ATA594271A true ATA594271A (de) 1977-03-15
AT339961B AT339961B (de) 1977-11-25

Family

ID=19811004

Family Applications (1)

Application Number Title Priority Date Filing Date
AT594271A AT339961B (de) 1970-09-10 1971-07-08 Halbleitervorrichtung mit isolierzonen aus versenktem siliziumoxyd und mit einem transistor

Country Status (2)

Country Link
AT (1) AT339961B (de)
NL (1) NL159819B (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3648125A (en) * 1971-02-02 1972-03-07 Fairchild Camera Instr Co Method of fabricating integrated circuits with oxidized isolation and the resulting structure

Also Published As

Publication number Publication date
NL7013365A (de) 1972-03-14
AT339961B (de) 1977-11-25
NL159819B (nl) 1979-03-15

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Legal Events

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