AT519921A3 - Verfahren und vorrichtung zum ausrichten eines ersten substrats zu einem zweiten substrat - Google Patents

Verfahren und vorrichtung zum ausrichten eines ersten substrats zu einem zweiten substrat Download PDF

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Publication number
AT519921A3
AT519921A3 ATA50329/2018A AT503292018A AT519921A3 AT 519921 A3 AT519921 A3 AT 519921A3 AT 503292018 A AT503292018 A AT 503292018A AT 519921 A3 AT519921 A3 AT 519921A3
Authority
AT
Austria
Prior art keywords
substrate
aligning
image
positioning device
pixels
Prior art date
Application number
ATA50329/2018A
Other languages
English (en)
Other versions
AT519921A2 (de
Original Assignee
Suss Microtec Lithography Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suss Microtec Lithography Gmbh filed Critical Suss Microtec Lithography Gmbh
Publication of AT519921A2 publication Critical patent/AT519921A2/de
Publication of AT519921A3 publication Critical patent/AT519921A3/de

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H01L21/681—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/38—Masks having auxiliary features, e.g. special coatings or marks for alignment or testing; Preparation thereof
    • G03F1/42—Alignment or registration features, e.g. alignment marks on the mask substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J9/00—Adhesives characterised by their physical nature or the effects produced, e.g. glue sticks
    • C09J9/02—Electrically-conducting adhesives
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7003—Alignment type or strategy, e.g. leveling, global alignment
    • G03F9/7038—Alignment for proximity or contact printer
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7088—Alignment mark detection, e.g. TTR, TTL, off-axis detection, array detector, video detection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185—Joining of semiconductor bodies for junction formation
    • H01L21/187—Joining of semiconductor bodies for junction formation by direct bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
    • H01L21/682—Mask-wafer alignment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0093—Wafer bonding; Removal of the growth substrate
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7003—Alignment type or strategy, e.g. leveling, global alignment
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7003—Alignment type or strategy, e.g. leveling, global alignment
    • G03F9/7046—Strategy, e.g. mark, sensor or wavelength selection
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7049—Technique, e.g. interferometric
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Multimedia (AREA)
  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

Die Erfindung betrifft ein Verfahren (100) zum Aus-richten eines ersten Substrats (201), insbesondere einer Maske, zu einem zweiten Substrat (203), insbesondere einem Wafer, mit: Einsetzen (101) des ersten Substrats (201) und des zweiten Substrats (203) in eine Positionierungseinrichtung (205); Aufnehmen (103) zumindest eines gemeinsamen Bildes (301) des ersten Substrats (201) und des zweiten Substrats (203); Anzeigen (105) des Bildes (301); Markieren (107) einer Vielzahl von Bildpunkten im Bild (301) durch einen Benutzer; und Ermitteln (109) eines Steuerbefehls zum Ansteuern der Positionierungseinrichtung (205) auf der Basis der markierten Bildpunkte, so dass die Substrate (201, 203) zueinander ausgerichtet werden.
ATA50329/2018A 2017-05-05 2018-04-19 Verfahren und vorrichtung zum ausrichten eines ersten substrats zu einem zweiten substrat AT519921A3 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL2018856A NL2018856B1 (en) 2017-05-05 2017-05-05 Method and device for aligning a first substrate with a second substrate

Publications (2)

Publication Number Publication Date
AT519921A2 AT519921A2 (de) 2018-11-15
AT519921A3 true AT519921A3 (de) 2020-02-15

Family

ID=59812066

Family Applications (1)

Application Number Title Priority Date Filing Date
ATA50329/2018A AT519921A3 (de) 2017-05-05 2018-04-19 Verfahren und vorrichtung zum ausrichten eines ersten substrats zu einem zweiten substrat

Country Status (8)

Country Link
US (1) US20180323069A1 (de)
JP (1) JP2018189953A (de)
KR (1) KR20180122953A (de)
CN (1) CN108807252A (de)
AT (1) AT519921A3 (de)
DE (1) DE102018108948A1 (de)
NL (1) NL2018856B1 (de)
TW (1) TW201843761A (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10847369B2 (en) * 2018-12-26 2020-11-24 Samsung Electronics Co., Ltd. Wafer bonding method, method for manufacturing semiconductor device, and apparatus therefor
FR3105876B1 (fr) * 2019-12-30 2021-11-26 Soitec Silicon On Insulator Procédé de fabrication d’une structure composite comprenant une couche mince en SiC monocristallin sur un substrat support
CN115274528B (zh) * 2022-09-22 2022-12-06 西北电子装备技术研究所(中国电子科技集团公司第二研究所) 一种芯片倒装键合用标定玻璃片
US20240258141A1 (en) * 2023-01-26 2024-08-01 Applied Materials, Inc. Methods and apparatus for calibration of substrate processing chamber placement via imaging

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030092244A1 (en) * 2000-04-28 2003-05-15 Hiroyuki Oi Method and apparatus for producing bonded dielectric separation wafer
US6856029B1 (en) * 2001-06-22 2005-02-15 Lsi Logic Corporation Process independent alignment marks
US20110134235A1 (en) * 2008-10-30 2011-06-09 Mitsubishi Heavy Industries, Ltd. Alignment unit control apparatus and alignment method
WO2014112512A1 (ja) * 2013-01-15 2014-07-24 株式会社アルバック アラインメント装置、及びアラインメント方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4052603A (en) * 1974-12-23 1977-10-04 International Business Machines Corporation Object positioning process and apparatus
EP1253817A3 (de) * 2001-04-23 2003-07-09 Liconic Ag Einrichtung zum Aufnehmen und Plazieren von kleinen Gegenständen
CN100337089C (zh) * 2002-09-20 2007-09-12 Asml荷兰有限公司 器件检验
US7259828B2 (en) * 2004-05-14 2007-08-21 Asml Netherlands B.V. Alignment system and method and device manufactured thereby
JP2010045099A (ja) * 2008-08-11 2010-02-25 Adwelds:Kk アライメントマーク画像の表示方法およびアライメント装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030092244A1 (en) * 2000-04-28 2003-05-15 Hiroyuki Oi Method and apparatus for producing bonded dielectric separation wafer
US6856029B1 (en) * 2001-06-22 2005-02-15 Lsi Logic Corporation Process independent alignment marks
US20110134235A1 (en) * 2008-10-30 2011-06-09 Mitsubishi Heavy Industries, Ltd. Alignment unit control apparatus and alignment method
WO2014112512A1 (ja) * 2013-01-15 2014-07-24 株式会社アルバック アラインメント装置、及びアラインメント方法

Also Published As

Publication number Publication date
AT519921A2 (de) 2018-11-15
TW201843761A (zh) 2018-12-16
CN108807252A (zh) 2018-11-13
NL2018856B1 (en) 2018-11-14
US20180323069A1 (en) 2018-11-08
KR20180122953A (ko) 2018-11-14
JP2018189953A (ja) 2018-11-29
DE102018108948A1 (de) 2018-11-08

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Effective date: 20210515