AR011508A1 - Circuito interfaz de linea para banda ancha - Google Patents

Circuito interfaz de linea para banda ancha

Info

Publication number
AR011508A1
AR011508A1 ARP970104559A ARP970104559A AR011508A1 AR 011508 A1 AR011508 A1 AR 011508A1 AR P970104559 A ARP970104559 A AR P970104559A AR P970104559 A ARP970104559 A AR P970104559A AR 011508 A1 AR011508 A1 AR 011508A1
Authority
AR
Argentina
Prior art keywords
block
interface circuit
line interface
wide band
module
Prior art date
Application number
ARP970104559A
Other languages
English (en)
Original Assignee
Telefonica Sa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonica Sa filed Critical Telefonica Sa
Publication of AR011508A1 publication Critical patent/AR011508A1/es

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
    • H04J3/1605—Fixed allocated frame structures
    • H04J3/1611—Synchronous digital hierarchy [SDH] or SONET
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M9/00—Parallel/series conversion or vice versa
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/04—Distributors combined with modulators or demodulators
    • H04J3/047—Distributors with transistors or integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Theoretical Computer Science (AREA)
  • Communication Control (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

Circuito interfaz de línea para banda ancha, que consiste en un modulo de transmision y en un modulo de recepcion, estando formado el modulo detransmision por un bloque conversor de formato paralelo a serie (11), que recibe datos de un bloquemultiplexor (14), un bloque aleatorizador (15)y un bloque de generacion de reloj de transmision (12), estando interconectados los bloques de generacion de paridad (13), el bloquealeatorizador (15) y el bloque multiplexor (14), mientras que el modulo receptor está constituido a partir de un bloque conversor de formato serie aparalelo (33), que recibe datos de un bloque de generacion de reloj de recepcion (34) y envía datos a un bloque demultiplexor (36) y a un bloquede verificacion de paridad (32), así como a un bloque desaleatorizador (37) que se conecta al bloque demultiplexor (36).
ARP970104559A 1996-11-19 1997-10-03 Circuito interfaz de linea para banda ancha AR011508A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ES09602435A ES2119707B1 (es) 1996-11-19 1996-11-19 Circuito interfaz de linea para banda ancha.

Publications (1)

Publication Number Publication Date
AR011508A1 true AR011508A1 (es) 2000-08-30

Family

ID=8296723

Family Applications (1)

Application Number Title Priority Date Filing Date
ARP970104559A AR011508A1 (es) 1996-11-19 1997-10-03 Circuito interfaz de linea para banda ancha

Country Status (9)

Country Link
US (1) US6134247A (es)
EP (1) EP0843434A3 (es)
AR (1) AR011508A1 (es)
BR (1) BR9705355A (es)
CO (1) CO4600719A1 (es)
ES (1) ES2119707B1 (es)
MA (1) MA24365A1 (es)
PE (1) PE3299A1 (es)
UY (1) UY24727A1 (es)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6578153B1 (en) * 2000-03-16 2003-06-10 Fujitsu Network Communications, Inc. System and method for communications link calibration using a training packet
EP1278321A1 (en) * 2001-07-17 2003-01-22 Alcatel Different type payload transport interface for line applications at high frequency
US7069464B2 (en) * 2001-11-21 2006-06-27 Interdigital Technology Corporation Hybrid parallel/serial bus interface
EP1446723B1 (en) * 2001-11-21 2007-07-18 Interdigital Technology Corporation Method employed by a base station for transferring data
US20050002728A1 (en) * 2003-07-01 2005-01-06 Isaac Weiser Plastic connector for connecting parts and method therefor
US7768306B2 (en) * 2006-09-20 2010-08-03 Mediatek Inc. Low to high voltage conversion output driver

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4377843A (en) * 1979-04-19 1983-03-22 Wescom Switching, Inc. Data distribution interface
US4907186A (en) * 1987-02-09 1990-03-06 The United States Of America As Represented By The Secretary Of Commerce Data direct ingest system
EP0289400A3 (en) * 1987-04-30 1990-01-24 Fairchild Weston Systems Inc. High speed asynchronous data multiplexer/demultiplexer
US4827477A (en) * 1987-05-15 1989-05-02 Grumman Aerospace Corporation Bus interface unit
US5040170A (en) * 1988-12-09 1991-08-13 Transwitch Corporation System for cross-connecting high speed digital signals
EP0403663B1 (en) * 1989-01-09 1996-07-17 Fujitsu Limited Digital signal multiplexer and separator
US5185736A (en) * 1989-05-12 1993-02-09 Alcatel Na Network Systems Corp. Synchronous optical transmission system
FI83007C (fi) * 1989-10-05 1991-05-10 Nokia Data Systems Digitalt dataoeverfoeringssystem.
DE3934248A1 (de) * 1989-10-13 1991-04-18 Standard Elektrik Lorenz Ag Multiplexer und demultiplexer, insbesondere fuer nachrichtenuebertragungs-netze mit einer synchronen hierarchie der digitalsignale
US5189410A (en) * 1989-12-28 1993-02-23 Fujitsu Limited Digital cross connect system
JP2682334B2 (ja) * 1992-05-29 1997-11-26 日本電気株式会社 画像信号の符号化伝送方法
US5384774A (en) * 1993-01-11 1995-01-24 At&T Corp. Asynchronous transfer mode (ATM) payload synchronizer
KR100295729B1 (ko) * 1995-04-15 2001-08-07 포만 제프리 엘 동기형디지털계층/동기형광통신망인터페이스

Also Published As

Publication number Publication date
US6134247A (en) 2000-10-17
EP0843434A3 (en) 2001-03-28
MX9707576A (es) 1998-06-28
MA24365A1 (fr) 1998-07-01
ES2119707A1 (es) 1998-10-01
BR9705355A (pt) 1999-01-19
EP0843434A2 (en) 1998-05-20
UY24727A1 (es) 1998-03-17
ES2119707B1 (es) 1999-06-16
CO4600719A1 (es) 1998-05-08
PE3299A1 (es) 1999-02-03

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