JPS648853U - - Google Patents
Info
- Publication number
- JPS648853U JPS648853U JP10375887U JP10375887U JPS648853U JP S648853 U JPS648853 U JP S648853U JP 10375887 U JP10375887 U JP 10375887U JP 10375887 U JP10375887 U JP 10375887U JP S648853 U JPS648853 U JP S648853U
- Authority
- JP
- Japan
- Prior art keywords
- output signal
- signal
- state
- input
- transitioning
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000007704 transition Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Transceivers (AREA)
Description
第１図は本考案の一実施例である信号処理回路
の構成を示すブロツク図、第２図は第１図に示し
た信号処理回路の動作を説明するためのタイミン
グチヤートである。
３……遅延回路、８……フリツプフロツプ、１
０……パワーオンリセツト回路、１００……第１
の手段、２００……第２の手段、３００……第３
の手段。
FIG. 1 is a block diagram showing the configuration of a signal processing circuit according to an embodiment of the present invention, and FIG. 2 is a timing chart for explaining the operation of the signal processing circuit shown in FIG. 3...Delay circuit, 8...Flip-flop, 1
0...Power-on reset circuit, 100...1st
means, 200...second means, 300...third
means of.
Claims (1)
これに代えて第１の出力信号と第２の出力信号と
を送出する信号処理回路において、前記第１の入
力信号が初期状態から遷移すると前記第１の出力
信号と前記第２の出力信号との状態を遷移させる
第１の手段と、前記第１の出力信号と前記第２の
出力信号との状態に前記遷移が生じた後に前記第
２の入力信号が初期状態から遷移すると前記第２
の出力信号を復旧させる第２の手段と、この第２
の出力信号が復旧された後に前記第２の入力信号
が復旧すると前記第１の出力信号を復旧させる第
３の手段とを具備することを特徴とする信号処理
回路。 taking in a first input signal and a second input signal;
Alternatively, in a signal processing circuit that sends out a first output signal and a second output signal, when the first input signal transitions from an initial state, the first output signal and the second output signal a first means for transitioning the state of the first output signal and the second output signal, and a first means for transitioning the state of the first output signal and the second output signal;
a second means for restoring the output signal of the second means;
and third means for restoring the first output signal when the second input signal is restored after the output signal of is restored.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10375887U JPS648853U (en) | 1987-07-06 | 1987-07-06 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10375887U JPS648853U (en) | 1987-07-06 | 1987-07-06 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS648853U true JPS648853U (en) | 1989-01-18 |
Family
ID=31334874
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10375887U Pending JPS648853U (en) | 1987-07-06 | 1987-07-06 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS648853U (en) |
-
1987
- 1987-07-06 JP JP10375887U patent/JPS648853U/ja active Pending
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