JPH0163224U - - Google Patents
Info
- Publication number
- JPH0163224U JPH0163224U JP1987157381U JP15738187U JPH0163224U JP H0163224 U JPH0163224 U JP H0163224U JP 1987157381 U JP1987157381 U JP 1987157381U JP 15738187 U JP15738187 U JP 15738187U JP H0163224 U JPH0163224 U JP H0163224U
- Authority
- JP
- Japan
- Prior art keywords
- gate
- output
- holds
- receives
- clock signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Manipulation Of Pulses (AREA)
- Dc Digital Transmission (AREA)
Description
第１図はこの考案による実施例の構成図、第２
図は従来技術の構成図、第３図は第２図の波形図
、第４図は第１図の波形図である。
１……データ入力端子、２……クロツク入力端
子、３……ＦＦ、４……ＦＦ、５……ゲート、６
……出力端子、７……ゲート、８……ＦＦ、９…
…出力端子。
Figure 1 is a configuration diagram of an embodiment according to this invention, Figure 2
3 is a waveform diagram of FIG. 2, and FIG. 4 is a waveform diagram of FIG. 1. 1...Data input terminal, 2...Clock input terminal, 3...FF, 4...FF, 5...gate, 6
...Output terminal, 7...Gate, 8...FF, 9...
...Output terminal.
Claims (1)
Ｆと、 前記クロツク信号で第１のＦＦのセツト出力を
保持する第２のＦＦと、 第１のＦＦと第２のＦＦのセツト出力を入力と
する第１のゲートと、 第１のＦＦと第２のＦＦのリセツト出力を入力
とする第２のゲートと、 第１のゲートの出力をＳ端子入力とし、第２の
ゲートの出力をＲ端子入力とする第３のＦＦを備
えることを特徴とするパルス性ノイズ除去回路。[Claims for Utility Model Registration] First F that holds a data signal using a clock signal
F, a second FF that holds the set output of the first FF in response to the clock signal, a first gate that receives the set outputs of the first FF and the second FF, and a first FF. A second gate that receives the reset output of the second FF as an input, and a third FF that uses the output of the first gate as an S terminal input and the output of the second gate as an R terminal input. Pulse noise removal circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987157381U JPH0163224U (en) | 1987-10-14 | 1987-10-14 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987157381U JPH0163224U (en) | 1987-10-14 | 1987-10-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0163224U true JPH0163224U (en) | 1989-04-24 |
Family
ID=31436771
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987157381U Pending JPH0163224U (en) | 1987-10-14 | 1987-10-14 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0163224U (en) |
-
1987
- 1987-10-14 JP JP1987157381U patent/JPH0163224U/ja active Pending
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