JPS6461148A - Flow control system - Google Patents
Flow control systemInfo
- Publication number
- JPS6461148A JPS6461148A JP21881187A JP21881187A JPS6461148A JP S6461148 A JPS6461148 A JP S6461148A JP 21881187 A JP21881187 A JP 21881187A JP 21881187 A JP21881187 A JP 21881187A JP S6461148 A JPS6461148 A JP S6461148A
- Authority
- JP
- Japan
- Prior art keywords
- buf
- stored
- order threshold
- window
- low
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE:To realize high speed packet communication, by allowing a data transmitter to receive a receptible packet, calculating a window upper limit according to a given window updating number and controlling the transmission according to the comparison between the window upper limit and the transmission order number. CONSTITUTION:When a data reception 5 receives a data, a buf adder means 7 increments the buf stored in a buf storage means 6 by 1. In receiving a RR transmission instruction from a reception control 8, the buf decrement means 9 decrements the bus stored in the buf storage means 6 by 1 and a high-order threshold comparison means 10 compares the buf value stored in the means 6 with the high-order threshold value (n) of the reception buffer stored in the high-order threshold means 11 and the low-order threshold comparison means 12 compares the buf value stored in the means 6 with the low-order threshold value 0 of the reception buffer stored in the low-order threshold value comparison means 13, a window updating number updating means 14 updates the window updating number wk stored in a window updating number storage means 15 according to the result.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21881187A JPS6461148A (en) | 1987-08-31 | 1987-08-31 | Flow control system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP21881187A JPS6461148A (en) | 1987-08-31 | 1987-08-31 | Flow control system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6461148A true JPS6461148A (en) | 1989-03-08 |
Family
ID=16725713
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP21881187A Pending JPS6461148A (en) | 1987-08-31 | 1987-08-31 | Flow control system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6461148A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5519835A (en) * | 1990-12-20 | 1996-05-21 | Fujitsu Limited | Method and apparatus for controlling the flow of data transmissions by generating a succession of ready signals to a high-performance parallel interface(HIPPI) terminal connected to a broadband integrated services digital network (B-ISDN) |
US8850025B2 (en) | 2005-05-25 | 2014-09-30 | Microsoft Corporation | Data communication coordination with sequence numbers |
US8856582B2 (en) | 2011-06-30 | 2014-10-07 | Microsoft Corporation | Transparent failover |
US9331955B2 (en) | 2011-06-29 | 2016-05-03 | Microsoft Technology Licensing, Llc | Transporting operations of arbitrary size over remote direct memory access |
US10630781B2 (en) | 2011-09-09 | 2020-04-21 | Microsoft Technology Licensing, Llc | SMB2 scaleout |
-
1987
- 1987-08-31 JP JP21881187A patent/JPS6461148A/en active Pending
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5519835A (en) * | 1990-12-20 | 1996-05-21 | Fujitsu Limited | Method and apparatus for controlling the flow of data transmissions by generating a succession of ready signals to a high-performance parallel interface(HIPPI) terminal connected to a broadband integrated services digital network (B-ISDN) |
US5710942A (en) * | 1990-12-20 | 1998-01-20 | Fujitsu Limited | Adapter monitoring storage capacity of its buffer and sequentially generating ready signals to notify a terminal to transfer more burst data to the buffer |
US8850025B2 (en) | 2005-05-25 | 2014-09-30 | Microsoft Corporation | Data communication coordination with sequence numbers |
US9071661B2 (en) | 2005-05-25 | 2015-06-30 | Microsoft Technology Licensing, Llc | Data communication coordination with sequence numbers |
US9332089B2 (en) | 2005-05-25 | 2016-05-03 | Microsoft Technology Licensing, Llc | Data communication coordination with sequence numbers |
US9438696B2 (en) | 2005-05-25 | 2016-09-06 | Microsoft Technology Licensing, Llc | Data communication protocol |
US9331955B2 (en) | 2011-06-29 | 2016-05-03 | Microsoft Technology Licensing, Llc | Transporting operations of arbitrary size over remote direct memory access |
US10284626B2 (en) | 2011-06-29 | 2019-05-07 | Microsoft Technology Licensing, Llc | Transporting operations of arbitrary size over remote direct memory access |
US8856582B2 (en) | 2011-06-30 | 2014-10-07 | Microsoft Corporation | Transparent failover |
US9462039B2 (en) | 2011-06-30 | 2016-10-04 | Microsoft Technology Licensing, Llc | Transparent failover |
US10630781B2 (en) | 2011-09-09 | 2020-04-21 | Microsoft Technology Licensing, Llc | SMB2 scaleout |
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