JPS5569836A - Channel control system - Google Patents

Channel control system

Info

Publication number
JPS5569836A
JPS5569836A JP14388578A JP14388578A JPS5569836A JP S5569836 A JPS5569836 A JP S5569836A JP 14388578 A JP14388578 A JP 14388578A JP 14388578 A JP14388578 A JP 14388578A JP S5569836 A JPS5569836 A JP S5569836A
Authority
JP
Japan
Prior art keywords
control
channel
memory unit
main memory
peripheral units
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14388578A
Other languages
Japanese (ja)
Other versions
JPS598845B2 (en
Inventor
Nobuhiko Yamagami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP14388578A priority Critical patent/JPS598845B2/en
Publication of JPS5569836A publication Critical patent/JPS5569836A/en
Publication of JPS598845B2 publication Critical patent/JPS598845B2/en
Expired legal-status Critical Current

Links

Abstract

PURPOSE: To absorb easily a difference in channel control word due to a difference between a central arithmetic processor and main memory unit or that in function between peripheral units, by adding a simple function into a channel.
CONSTITUTION: Input-output bus 1 makes a connection among a central arithmetic processor, main memory unit, and channels 3 and 4. Channel 3 exercises control 5 over channel control words transmitted to and received from the main memory unit, and central control part 6 decides on a needed control method by controlled requests from several channels 4 and read channel control word 5, commands each function block to perform request operation, and also attains input-output control over a buffer and conversion of channel control words to be sent to peripheral units. Further, decision 7 on priority levels of controlled requests to respective channels 4 is made and control part 6 is informed of them on preference basis. Under the time-division general control of channel 3, respective channels 4 perform data input-output processing control of corresponding peripheral units through bus 1.
COPYRIGHT: (C)1980,JPO&Japio
JP14388578A 1978-11-21 1978-11-21 Channel control method Expired JPS598845B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14388578A JPS598845B2 (en) 1978-11-21 1978-11-21 Channel control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14388578A JPS598845B2 (en) 1978-11-21 1978-11-21 Channel control method

Publications (2)

Publication Number Publication Date
JPS5569836A true JPS5569836A (en) 1980-05-26
JPS598845B2 JPS598845B2 (en) 1984-02-28

Family

ID=15349280

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14388578A Expired JPS598845B2 (en) 1978-11-21 1978-11-21 Channel control method

Country Status (1)

Country Link
JP (1) JPS598845B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58105321A (en) * 1981-12-16 1983-06-23 Nec Corp Peripheral controller
JPS5916037A (en) * 1982-04-21 1984-01-27 デイジタル・イクイプメント・コ−ポレ−シヨン Data transfer unit and data processor
JPS59225430A (en) * 1983-06-07 1984-12-18 Fujitsu Ltd Channel processing unit

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0281241U (en) * 1988-12-12 1990-06-22

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58105321A (en) * 1981-12-16 1983-06-23 Nec Corp Peripheral controller
JPS6223342B2 (en) * 1981-12-16 1987-05-22 Nippon Electric Co
JPS5916037A (en) * 1982-04-21 1984-01-27 デイジタル・イクイプメント・コ−ポレ−シヨン Data transfer unit and data processor
JPS59225430A (en) * 1983-06-07 1984-12-18 Fujitsu Ltd Channel processing unit
JPH0130170B2 (en) * 1983-06-07 1989-06-16 Fujitsu Ltd

Also Published As

Publication number Publication date
JPS598845B2 (en) 1984-02-28

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