JPS6276745A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS6276745A JPS6276745A JP21834185A JP21834185A JPS6276745A JP S6276745 A JPS6276745 A JP S6276745A JP 21834185 A JP21834185 A JP 21834185A JP 21834185 A JP21834185 A JP 21834185A JP S6276745 A JPS6276745 A JP S6276745A
- Authority
- JP
- Japan
- Prior art keywords
- package
- switching
- decoder
- chip
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5382—Adaptable interconnections, e.g. for engineering changes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は半導体装置に係り、特に外部からの操作で機能
の切換えを行なうことのできる半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a semiconductor device, and particularly to a semiconductor device whose functions can be switched by external operation.
〔発明の技術的背景およびその問題点〕最近のしＳｔ製
造技術の進歩により、１つのチップ上に搭載することの
できる論理ゲートの数は急速に増大しており、複雑な回
路の実現も容易となってきている。[Technical background of the invention and its problems] With recent advances in ST manufacturing technology, the number of logic gates that can be mounted on one chip is rapidly increasing, making it easier to realize complex circuits. It is becoming.
細部の機能が異なるのみで機能的にはほとんど同一であ
るような回路の場合、製造コストの面から考えると夫々
別々にその機能通りのものを製造するよりは、両方の機
能を含む同一の回路を製造し、ユーザが必要に応じて機
能を切換えて使用するようにした方が望ましいと考えら
れる。In the case of circuits that are almost the same functionally but differ only in detailed functions, from the viewpoint of manufacturing costs, it is better to manufacture the same circuit that includes both functions than to manufacture each circuit separately with the same function. It would be desirable to manufacture a system and allow the user to switch functions as needed.
このことはまた、既存の集積回路に新規の機能を追加し
ておき、必要に応じてユーザが選択して新旧の機能を使
用したい場合も同様であるが、モード切換え用にピンを
増加させることは、更にパターン設計を複雑化させるこ
とにもなり、実用的ではなかった。This also applies when new functionality is added to an existing integrated circuit and the user wants to select and use the old and new functionality as needed, but increasing the number of pins for mode switching is also the case. This would further complicate the pattern design and was not practical.
本発明は、前記実情に鑑みてなされたもので、パッケー
ジの外側から機能の切換えを行なうことのできる半導体
装置を提供することを目的とする。The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to provide a semiconductor device whose functions can be switched from outside the package.
（発明の概要）
そこで本発明では、パッケージ内に収容せしめられる回
路の１部を露呈せしめ、パッケージの外から切断可能と
なるようにしている。(Summary of the Invention) Therefore, in the present invention, a part of the circuit housed in the package is exposed so that it can be cut from outside the package.
例えば、チップ上に形成されている集積回路パターンの
１部をプルアップ抵抗を介してパッケージに配設された
凹部内に引き出して露出させると共に他方はグランドに
接続させ、外部から切断可能なようにしておく。そして
このプルアップ抵抗と露出部との間の電位信号をデコー
ドし、集積回路内の動作機能選択信号を作成するように
している。For example, one part of the integrated circuit pattern formed on the chip is pulled out and exposed through a pull-up resistor into a recess provided in the package, and the other part is connected to ground so that it can be disconnected from the outside. I'll keep it. The potential signal between this pull-up resistor and the exposed portion is decoded to create an operation function selection signal within the integrated circuit.
従って、この露出部を切断すれば電位信号は論理的には
１となる。一方接続していれば電位信号は０となる。こ
のようにして、この動作機能選択信号の組み合わせによ
って、チップ内の回路の機能がビンとは無関係に選択可
能となる。Therefore, if this exposed portion is cut off, the potential signal becomes logically 1. If one is connected, the potential signal becomes 0. In this way, this combination of operational function selection signals allows the functions of the circuits within the chip to be selected independently of the bins.
本発明によれば、はとんどの機能が同じで１部のみの異
なる集積回路装置を形成するに際し、すべての機能を含
む集積回路を１チツプ上に搭載しパッケージングしてお
き、必要に応じて外部から自由に機能の選択を行なうこ
とができる。According to the present invention, when forming an integrated circuit device that has most of the same functions but only one different part, an integrated circuit including all the functions is mounted on one chip and packaged, and as needed. You can freely select functions from the outside.
このようにすることにより、多種類のチップを製造する
ことなく単一種類のチップを製造すればよいため、製造
コストを大幅に低減することができる。By doing so, it is sufficient to manufacture a single type of chip without having to manufacture many types of chips, so that manufacturing costs can be significantly reduced.
以下、本発明の実施例について図面を参照しつつ詳細に
説明する。Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
第１図は、本発明実施例の半導体集積回路装置（ＩＣ）
の外形を示す図である。FIG. 1 shows a semiconductor integrated circuit device (IC) according to an embodiment of the present invention.
FIG.
このＩＣは、４種の特殊機能回路に１〜に４の選択が可
能なように構成されたもので、パッケージ１の上部に形
成された凹部２内にわずかの空隙が形成され、この空隙
から、切換え回路に接続された第１の切換え用導体２１
．第２の切換え用導体２２が露呈するようにコの字状に
曲げて取り出されており、外部から切断゛可能であるよ
うに形成されている。This IC has four types of special function circuits that can be selected from 1 to 4. A small gap is formed in a recess 2 formed at the top of a package 1, and the , a first switching conductor 21 connected to the switching circuit
．． The second switching conductor 22 is bent into a U-shape and taken out to be exposed, and is formed so that it can be cut from the outside.
そしてこの第１の切換え用導体２１および第２の切換え
用導体２２は、パッケージ内の１部を第２図に示すよう
に、リードビン３１〜３８と同様にワイヤＷによって集
積回路チップ４の周縁に形成されたポンディングパッド
に接続されている。As shown in FIG. 2, the first switching conductor 21 and the second switching conductor 22 are connected to the periphery of the integrated circuit chip 4 by wires W, similar to the lead bins 31 to 38, as shown in FIG. connected to a formed bonding pad.
この集積回路チップ４には、主要回路の他上記４種の特
殊機能回路に１〜に４と、切換え回路とが搭載されてお
り、切換え回路は、第３図に等両回路を示す如く、第１
および第２の切換え用導体の１端にある端子２１Ａ、２
２Ａに接続されたプルアップ抵抗４１．４２と、この端
子２１Ａ。In addition to the main circuit, this integrated circuit chip 4 is equipped with the above-mentioned four types of special function circuits 1 to 4, and a switching circuit, as shown in FIG. 1st
and terminals 21A, 2 at one end of the second switching conductor.
A pull-up resistor 41.42 connected to 2A and this terminal 21A.
２２Ａに入力側端子５１．５２が接続されると共に４個
の前記特殊機能回路に１〜に４に夫々選択信号を出力す
るように形成されたデコーダ５とを具えており、この切
換え用導体は夫々、該プルアップ抵抗４１．４２を介し
て電源ＶＤＤに接続されると共に、他端２１Ｂ、２２Ｂ
をグランドに接続したものである。Input side terminals 51 and 52 are connected to 22A, and a decoder 5 is formed to output a selection signal to each of the four special function circuits 1 to 4, and this switching conductor is They are connected to the power supply VDD via the pull-up resistors 41 and 42, respectively, and the other ends 21B and 22B
is connected to ground.
ところで切換え用導体２１．２２が夫々そのままつなが
った状態であれば、デコーダ５の入力側端子５１．５２
の電位はアース電位であり、切断されておれば、電源電
位にほぼ等しくなる。この入力側端子５１．５２の電位
がアース電位であるか電源電位であるかの組合わせによ
って、デコーダ５を介して、４種類のモードが選択され
、夫々の特殊機能回路に１〜に４の機能選択信号が出力
される。By the way, if the switching conductors 21 and 22 are connected as they are, the input terminals 51 and 52 of the decoder 5
The potential is the ground potential, and if it is disconnected, it will be approximately equal to the power supply potential. Depending on the combination of whether the potential of the input side terminals 51 and 52 is the ground potential or the power supply potential, four types of modes are selected via the decoder 5, and 1 to 4 modes are selected for each special function circuit. A function selection signal is output.
このようにして集積回路は、これらの信号に従って動作
し、所望の機能を実現する。The integrated circuit thus operates according to these signals to achieve the desired functionality.
このＩＣによれば、同じ半導体チップによってユーザは
必要に応じて４種類の異なる機能を発揮させることがで
きる。従って、４種類の半導体チップを夫々に作製して
いた場合に比べ、すべて、同一工程で天吊生産すること
ができるため、製造コストが大幅に低減されることにな
る。According to this IC, the user can use the same semiconductor chip to perform four different functions as needed. Therefore, compared to the case where four types of semiconductor chips were manufactured individually, all of them can be hung in the same process and the manufacturing cost can be significantly reduced.
なお、実施例では、第１および第２の切換え用導体２１
．２２は、パッケージ１の凹部からコの字状に曲げて取
り出されているが、第４図に示す如く、凹部２′を深く
形成することにより、リードフレーム面を曲げることな
くそのまま使用することができ、製造が容易となる。In addition, in the embodiment, the first and second switching conductors 21
．． 22 is bent into a U-shape and taken out from the recess of the package 1, but as shown in FIG. 4, by forming the recess 2' deeply, it is possible to use the lead frame as it is without bending the surface. This makes manufacturing easier.
第１図は、本発明実施例の半導体集積回路装置（ＩＣ）
の外形を示す図、第２図は、同ＩＣの内部を示す図、第
３図は、同ＩＣの切換え回路の等価回路図、第４図は、
同ＩＣの変形例を示す図である。
Ｋ１−に４・・・特殊機能回路、１・・・パッケージ、
２・・・凹部、２１・・・第１の切換え用導体、２２・
・・第２の切換え用導体、Ｗ・・・ワイヤ、３１〜３８
・・・リードビン、４・・・チップ、４１．４２・・・
プルアップ抵抗、５・・・デコーダ。
第１図
第２図FIG. 1 shows a semiconductor integrated circuit device (IC) according to an embodiment of the present invention.
2 is a diagram showing the inside of the IC, FIG. 3 is an equivalent circuit diagram of the switching circuit of the IC, and FIG. 4 is a diagram showing the inside of the IC.
It is a figure which shows the modification of the same IC. K1- to 4...Special function circuit, 1...Package,
2... Recessed portion, 21... First switching conductor, 22.
...Second switching conductor, W...wire, 31-38
...Lead bin, 4...Chip, 41.42...
Pull-up resistor, 5...decoder. Figure 1 Figure 2
Claims (3)
ら切断することによって機能選択を可能とする切換え部
を具えた切換え回路を配設したことを特徴とする半導体
装置。(1) A semiconductor device characterized in that a switching circuit is provided, which includes a switching section that enables function selection by exposing a part of the circuit inside the package and disconnecting it from the outside.
配設されるようにしたことを特徴とする特許請求の範囲
第（１）項記載の半導体装置。(2) The semiconductor device according to claim (1), wherein the switching section is disposed within a recess formed in a package.
うにしたことを特徴とする特許請求の範囲第（１）項記
載の半導体装置。(3) The semiconductor device according to claim (1), wherein the switching circuit includes a plurality of switching sections.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21834185A JPS6276745A (en) | 1985-09-30 | 1985-09-30 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21834185A JPS6276745A (en) | 1985-09-30 | 1985-09-30 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6276745A true JPS6276745A (en) | 1987-04-08 |
Family
ID=16718347
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP21834185A Pending JPS6276745A (en) | 1985-09-30 | 1985-09-30 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6276745A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007062727A (en) * | 2005-08-31 | 2007-03-15 | Magna Car Top Systems Gmbh | Luggage carrier of drawout type for vehicle, in particular passenger car |
-
1985
- 1985-09-30 JP JP21834185A patent/JPS6276745A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007062727A (en) * | 2005-08-31 | 2007-03-15 | Magna Car Top Systems Gmbh | Luggage carrier of drawout type for vehicle, in particular passenger car |
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