JPS62212852A - Storage protecting system - Google Patents

Abstract

PURPOSE:To detect misprogramming by storing a pass word and the length of a prescribed area corresponding to the value of a base register in the prescribed area, and at the execution of a memory updating instruction, checking the pass word and the address range. CONSTITUTION:In a main storage device 1, a base register indicating the base address of a certain area 11 assigned to a certain program is defined as the 4th location (R4) e.g. of a general register. A pass word to use the area and the length information indicating the size of the area are stored in an address having specific relation to the base address. Namely, the length 13 is stored in the address of the base address 4 and the pass word 12 is stored in the address of the base register 8. Consequently, the misspecification of the base register or the specification of a displacement address exceeding an assigned area can be checked.

Description

[Detailed Description of the Invention] [Summary] The present invention relates to memory protection of a main memory device of an electronic computer, etc.
A password and the length of the area are stored in a predetermined area corresponding to the value of the base register, and the password and address range are checked when a memory update instruction is executed.

[Industrial application field]

The present invention relates to memory protection of a main memory device in an information processing device such as an electronic computer or an electronic exchange, and relates to a method for meticulously preventing destruction of stored contents due to program errors or the like.

[Prior art and its problems]

As a memory protection method for the main storage device, checking using a so-called memory protection key is recommended (this is well known, but the unit in which the key is generally assigned is a relatively large unit of area, such as 2 bytes or 4 bytes). It is not always possible to perform sufficient checks.

For example, a well-known software technique is to allocate an arbitrary storage area to the processing unit of a specific user or a specific program, set the start address of that area as a pace address in the base register, and then There are methods in which only displacement addresses from the base address are specified, and methods in which a base register and an index register are combined to enable relative addressing.

In such a case, the size of the allocated area and its boundary address are completely independent of the size and boundary address of the unit area to which the storage protection key is assigned, so for example, if the base register is specified incorrectly due to a program error. In this case, there is no way to check for mistakes, and even if the memory protection keys match, there is a problem in that the memory contents may be destroyed.

[Means to solve problems]

In the present invention, in order to solve the above problems, when allocating a storage area, a password and the length of the area are set in a specific area corresponding to the base address of the area, and when the area is accessed, The password and length are read out based on the specification of the base register, and their validity is checked.

[Effect]

With this configuration, it is possible to check for a base register specification error or a displacement address specified beyond the allocated area.

〔Example〕

FIG. 1 shows a processing flowchart of an embodiment of the present invention,
Further, FIG. 2 shows a block diagram of an embodiment of the present invention.

In FIG. 2, l is the main storage unit (MSU), other circuits are in the central processing unit, and 2 is the instruction register (I).
R), 3 is a group of general-purpose registers, 4 is an adder for address calculation, 5 is an arithmetic unit (ALU), and 6 is a decoder that decodes the instruction code of the instruction register 2 in order to control these circuits. The decoder 6 can be realized by hardware or a microprogram.

OP of instruction register 2 is the instruction code part, R1 is the register designation part of the first operand, B is the base register designation part of the second operand, ■ is the index register designation part of the second operand, and p is the index register designation part of the second operand. This is the displacement address part.

For example, in a register memory type store instruction, the contents of the general-purpose register indicated by R1 above are stored in B, 1. There is an instruction to store in the main memory address determined by D.

In the main memory device I, 11 indicates one area allocated to a certain program, and the base register indicating the base address of this area is, for example, general-purpose register number 4 (hereinafter referred to as R4).

A feature of the present invention is that a password for using this area and length information indicating the size of this area are stored in an address that has a specific relationship with this base address. In the illustrated example, a length 13 is stored at the base address -4, and a password 12 is stored at the base address -8.

It is also assumed that a password unique to each program is set in the RO before each program starts processing.

The operation when an instruction in such a state is set in the instruction register 2 will be explained based on FIG.

■First, when a memory access instruction (or even just a store instruction) is detected by the decoder 6, the general-purpose register 3 is accessed based on the value of the base register specification part B, and the base address is read. The password 12 and length 13 are read out based on the address.

■Next, RO of general-purpose register 3 is read out, and ALU
5, the password is checked.

(2) If the password 12 matches (RO), proceed to the next step, but if they do not match, a program check interrupt is generated.

(2) Next, the adder 4 adds the base address, the index value read by the index register specifying section I, and the displacement address D to obtain the effective address EA.

■Also, set the above base address and the above length 13 to A.
Addition is made in LU5 to find the maximum address MAX of area II.

■The above effective address EA is the above maximum address M
The ALU 5 checks whether it exceeds AX, and if it does, a program check interrupt is generated.

(2) When the effective address EA is less than or equal to the maximum address MAX, the main storage device 1 is accessed by the EA.

It should be noted that the above processes (1) to (2) may be considered to be controlled by the decoder 6 by means such as a microprogram.

Also, the settings for password 12 and length 13 are as follows:
When the control program (O8) allocates an area, for example, if N bytes are allocated from address X in a conventional device, it actually allocates (N+8) bytes from address (X-8) and Set the address and (X-8
) address may be used to store a password, and address (X-4) may be used to store a length N.

Furthermore, in a computer that uses a virtual storage system, it goes without saying that the base address and effective address described above are further converted into real addresses to access the main storage device 1.

〔Effect of the invention〕

As described above, even if the base register is specified incorrectly due to a programming error or a displacement address is specified beyond the range of the allocated area,
This can be detected.

[Brief explanation of drawings]

FIG. 1 is a flow chart of an embodiment of the present invention, and FIG. 2 is a block diagram of an embodiment of the present invention. In the figure, ■ is the main storage unit (MSU), 2 is the instruction register (IR), 3 is a general-purpose register group, 4 is an adder for address calculation, 5 is an arithmetic unit (ALU), and 6 is for controlling these circuits. This is a decoder that decodes the instruction code in the instruction register 2. Uninvented Roasted 9+1 Flowchmart No. 1121

Claims (1)

[Claims] In an information processing device that accesses a main storage device to obtain an effective address based on the contents of a base register specified in an instruction, The password (12) and the length (13) of the storage area specified in the base register are stored, and when the above instruction is executed, the password and length are set based on the base register specified in the instruction. A memory protection method characterized in that the password and the effective address are checked by reading out the password.