JPH05225361A - Register rewriting system - Google Patents

Abstract

PURPOSE:To prevent the contents of a register from being carelessly rewritten and failed into a serious trouble by changing the read out from contents of the register based upon an instruction read out from a specific address of a memory. CONSTITUTION:The memory 2 is provided with an SFR area 7 arranging a register relating to the control of peripheral devices such as an I/O port and a timer in a microcomputer, a RAM area 9, a mode register area R1 arranged in a specific memory space and storing contents especially relating to the control of the operation mode of the micro-computer, and a change instruction storing area R1a including a change instruction for changing the contents of the mode register R1. The area R1a is stored in a specific address PO in the memory 2. The instruction for changing the contents of the register R1 is stored in the specific address PO of the memory 2, and after reading out the instruction from the specific address PO, the contents of the register R1 are changed based upon the instruction.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of rewriting the contents of registers provided in a microcomputer, and particularly prevents erroneous rewriting due to software mistakes, program runaway, etc., and troubles that may occur therewith. The present invention relates to a register rewriting method for.

[0002]

2. Description of the Related Art As shown in FIG. 8, a microcomputer includes a CPU 1, a memory 2, a peripheral device 3 such as a timer, and an I / O.
It is provided with an O port (input / output port) 4, an address bus 5 and a data bus 6 which respectively connect these. In this case, as shown in FIGS. 8 and 7, the memory 2 can read the stored contents by addressing, and the memory space of the memory 2 includes a ROM (area) 8 and a RAM (area) 9, and further, SFR (Special) in which registers related to control of the I / O port 4 and the peripheral device 3 are arranged
It has a function register area 7. The register is a direction register R2 that determines whether the microcomputer port is used in input mode or output mode, and a port register R that exchanges data with the outside using the I / O port 4.
3. There are an AD control register R4 for performing various controls on the AD converter, a UART (input / output control circuit), a register R5 for controlling various timers, etc., but especially as a register relating to control of the operation mode of the microcomputer. There is a mode register R1 of
Various operation modes can be selected by software by changing the contents of.

The various operation modes described above include a single chip mode in which all ports function as programmable input / output terminals, or a memory 2 in an arbitrary area of the address space when the built-in memory 2 and the I / O port 4 are insufficient. There are a memory expansion mode in which the peripheral device 3 and the like can be expanded, and a microprocessor mode in which access to the internal ROM is forcibly prohibited in the memory expansion mode. Among these various modes arranged in the SFR area 7, the mode register R1 in particular has a great influence on the operation of the microcomputer because the functions of some terminals, the memory arrangement, and the address space are different in these modes. Exert.

[0004]

In the conventional microcomputer, the SFR, like the RAM, can be easily accessed by software and does not have the function of protecting the contents of the SFR. In some cases, the contents of the SFR may be changed carelessly. At this time, in particular, if the contents of the register relating to the control of the operation mode of the microcomputer such as the above mode register are rewritten, there is a problem that the microcomputer may cause a serious trouble. For example, when the microcomputer operates in the single chip mode, a part of the input / output port functions as an input terminal, and a signal from an external IC is input, a software mistake, program runaway, etc. The contents of the registers relating to the control of the operation mode of the microcomputer may be changed, and the operation in the single chip mode may be changed to the microprocessor mode. In this case, the input / output port functions as an input port, and then functions as an address output port. When this happens,
There is a case where an output from the external IC is added to the output from the external IC to the input / output port, an overload is generated at the terminal, and a serious trouble such as damage to the chip occurs.

The present invention has been made in order to solve the above problems, and the contents of a register relating to the control of the operation mode of a microcomputer are inadvertently rewritten due to a software mistake or a program runaway, which is serious. It is an object of the present invention to provide a register rewriting method for obtaining a microcomputer capable of preventing a trouble.

[0006]

According to the register rewriting method of the present invention, an instruction for changing the contents of the register R1 is stored in a specific address PO in the memory 2,
After reading the instruction of the specific address PO, the content of the register R1 is changed based on this instruction.

According to the register rewriting method of the second aspect of the present invention, the contents of the register R1 are rewritten when the same data to be written in the register R1 is input a plurality of times.

In the register rewriting method according to the third aspect of the present invention, an instruction for changing the contents of the register R1 is stored in a specific address PO in the memory 2, and the register R1 is stored.
When the same data to be written into is input a plurality of times, after the instruction of the specific address PO is read, the content of the register R1 is rewritten based on this instruction.

In the register rewriting method according to the invention of claim 4, the data to be written in the register R1 is input only when the valid output from the monostable flip-flop 20 initialized by the reset signal exists. The contents of the register R1 are sometimes rewritten.

[0010]

In the invention of claim 1, the content of the register R1 is changed based on the instruction read from the specific address PO in the memory 2.

In the invention of claim 2, the content of the register R1 is rewritten when the same data to be written in the register R1 is input a plurality of times.

In the invention of claim 3, when the same data to be written to the register R1 is input a plurality of times,
The contents of the register R1 are rewritten based on the instruction read from the specific address PO in the memory 2.

In the fourth aspect of the invention, the contents of the register R1 are rewritten only when the valid output from the monostable flip-flop 20 is present and when the data to be written to the register R1 is input.

[0014]

【Example】

Example 1. FIG. 1 is a diagram showing a memory space of a memory 2 provided in a microcomputer adopting a register rewriting method according to an embodiment of the present invention. In this memory 2, 7 is an SFR (area) in which registers relating to control of peripheral devices such as input / output ports and timers in a microcomputer are arranged, 9 is a RAM (area), and R1 is arranged in a specific memory space. In particular, a mode register area for controlling the operation mode of the microcomputer, R1
Reference numeral a is a change instruction storage area including a change instruction for changing the contents of the mode register R1. The change command storage area R1a is stored in the specific address PO of the memory 2 as shown in FIG.
It is provided inside.

FIG. 3 is a block diagram showing the function of the CPU 1 (see FIG. 8) (function of changing the contents of the mode register). In the figure, 13 is a program counter for checking the specific address PO (3), and 14 is a program counter. An AND circuit, R1a is a change instruction storage area, and R1 is a mode register.

Next, the operation of this embodiment will be described.
When changing the contents of the mode register R1 relating to the control of the operation mode, a method different from that for other purpose registers or RAM is used. That is, as shown in FIG. 2, when an instruction for rewriting the contents of the mode register R1 relating to the control of the operation mode is stored in the specific address PO and the contents of the mode register R1 relating to the control of the operation mode are changed, the instruction must be specified. Change command storage area R in address PO
The change instruction stored in 1a must be used. Then, as shown in FIG.
When a write signal for 1 enters the AND circuit 14, the CPU 1 instructs the program counter 13 to check whether or not an instruction for changing the contents of the mode register R1 is arranged at a specific address PO. If the change instruction is in the area within the range of this specific address PO, that is, the change instruction storage area R1a, the instruction in this area R1a is accessed and read, and the content of the mode register R1 relating to the control of the operation mode is used. To change. Only the instruction located at the specific address PO changes the contents of the mode register R1 relating to the control of the operation mode, so that even if the contents of the SFR7 are rewritten due to a software mistake or a program runaway, the operation mode is changed. Only the mode register R1 relating to the control of (1) cannot be easily rewritten like other registers or RAM for other purposes.

In other words, when the CPU 1 receives an instruction to rewrite the contents of the register R1 relating to the control of the operation mode,
The CPU 1 determines whether or not the instruction is placed at a specific address PO (hatched portion in FIG. 2).
Check with 3. If the change instruction is not in the specific address PO, the CPU 1 does not execute the change instruction of the register R1. If the change command is in the specific address PO, the CPU
1 sends the address of the memory 2 in which the instruction is stored to the memory 2 via the address bus 5. Then, an instruction to change the contents of the change instruction storage area R1a in the shaded portion of FIG. 2 is sent to the CPU 1 via the data bus 6. C
In accordance with this instruction, the PU 1 sends the address of the change instruction storage area R1a and the change contents of the area R1a to the memory 2 via the address bus 5 and the data bus 6, respectively. In this way, the mode register R1 relating to the control of the operation mode
Rewrite the contents of. In this way, the mode register R
It is checked whether or not an instruction to change the contents of 1 is contained in the specific address PO, and as a result of this check,
The contents of the mode register R1 are changed based on the change instruction read from the change instruction storage area R1a, and a double write error prevention process is performed.

Example 2. In the first embodiment, when the contents of the mode register R1 relating to the control of the operation mode are changed, only the instruction arranged in the change instruction storage area R1a which is an area of a specific address PO is used to change the mode register R1.
Although the case where the contents of 1 is changed has been described, another method of changing the contents of the mode register R1 is to write the same value to the mode register R1 twice in succession for the first time. The contents may be changed, and in this case, the same effect as that of the first embodiment can be obtained.

FIG. 4 is a CP for explaining the second embodiment.
It is a block diagram showing the function of U, and reference numeral 15 in the figure is a judging means for judging that the same data is continuously input twice. In FIG. 4, first, when the data indicating the address of the mode register R1 and the data 151 to be written to that address are sent, the data 151 for the first time is transferred to the specific register area 15a (area preset in the memory). To store.
Then, when the data indicating the address of the mode register R1 and the second data 152 to be written in that address are sent, the first contents (data 151) stored in the specific register area 15a and the second data Content (Data 1
52) is compared by the judging means 15, and only when the contents are exactly the same, the contents are written in the mode register R1 relating to the control of the operation mode. When the contents of the first data and the contents of the second data are different, the contents of the second data are written in place of the contents of the first time of the specific register area 15a and compared with the contents of the data sent next. It is supposed to be done. That is, the contents of the mode register R1 relating to the control of the operation mode cannot be changed unless the same contents are sent twice and continuously.

Example 3. In the second embodiment, the case where the contents of the mode register R1 relating to the control of the operation mode can be changed for the first time by continuously writing the same value to the same register twice has been described, but only for changing the contents of the mode register R1. The contents of the mode register R1 may not be changed unless a new dedicated instruction is set and the dedicated instruction is used. That is, as shown in FIG. 5, the output of the determination means 15 is used to output the memory 2 of FIG.
Alternatively, a dedicated instruction in the change instruction storage area R1a therein may be read and the content of the mode register R1 may be rewritten by this instruction.

Example 4. In the third embodiment, the content is changed by the write-only instruction to the mode register R1 relating to the control of the operation mode. However, as shown in FIG. 6, the effective output of the monostable flip-flop 20 that cannot be initialized except by the reset operation. Then, AND with the rewrite data 153 may be taken by the AND circuit 21 to permit writing to the mode register R1. The monostable flip-flop 20 cannot be initialized except for the reset operation once the writing is completed. That is, the mode register R1
Of the address of the monostable flip-flop 20 when a data 153 indicating the address of the
Is reset and initialized, and writing to the mode register R1 is permitted. Since the monostable flip-flop 20 cannot be initialized except by reset once the writing to the mode register R1 is completed, the contents of the mode register R1 are changed even if there is a software mistake or a program runaway. There is no.

Embodiment 5. In addition, although the mode register has been described as an example in the first to fourth embodiments, it goes without saying that the present invention can be applied to a register which imposes another important function.

[0023]

As described above, according to the present invention, an instruction for changing the contents of a register is stored in a specific address in a memory, the instruction at the specific address is read out, and then the instruction is based on the instruction. Since the contents of the above registers are changed, it is possible to prevent the contents of the registers related to the control of the operation mode of the microcomputer from being inadvertently rewritten due to software mistakes or program runaway, resulting in a serious trouble. The effect that a computer can be provided is obtained.

Further, since the contents of the register are rewritten when the same data to be written in the register is input a plurality of times, unless the data of the same contents are sent twice in succession. The contents of the register are not changed, and the same effect as described above can be obtained.

An instruction for changing the contents of the register is stored in a specific address in the memory, and when the same data to be written in the register is input a plurality of times, the specific address of the specific address is written. After reading the instruction, the contents of the above registers are rewritten based on this instruction.
The same effect as above can be obtained.

Also, only when there is a valid output from the monostable flip-flop initialized by the reset signal,
Since the contents of the register are rewritten when the data to be written to the register is input, once the writing to the register is completed, the monostable flip-flop cannot be initialized except by resetting. Even if there is a mistake or a program runaway, the contents of the register are not changed, and therefore the same effect as above can be obtained.

[Brief description of drawings]

FIG. 1 is a diagram showing a memory space of a memory provided in a microcomputer adopting a register rewriting method according to an embodiment of the present invention.

FIG. 2 is a diagram showing that a change instruction storage area is provided at a specific address of a memory in this embodiment.

FIG. 3 is a block diagram showing the function of the CPU that changes the contents of the mode register in this embodiment (embodiment 1).

FIG. 4 is a block diagram showing the function of a CPU that changes the contents of a mode register in another embodiment (embodiment 2).

FIG. 5 is a block diagram showing a function of a CPU for changing contents of a mode register in another embodiment (third embodiment).

FIG. 6 is a block diagram showing a function of a CPU for changing the contents of a mode register in another embodiment (embodiment 4).

FIG. 7 is a diagram showing a memory space of a memory of a conventional microcomputer.

FIG. 8 is a block diagram showing a configuration of a microcomputer.

[Explanation of symbols]

 1 CPU 2 Memory 4 I / O port R1 Mode register PO Specific address

Claims (4)

[Claims] 1. In a microcomputer provided with a register provided in a specific address area of a memory from which data can be read by addressing, a CPU and an input / output port, the register of the register is stored in the specific address in the memory. A register rewriting method characterized in that an instruction for changing the content is stored, the instruction at the specific address is read, and then the content of the register is changed based on the instruction. 2. A register provided in a specific address area of a memory from which data can be read by addressing, and the same data to be written in the register in a microcomputer including a CPU and an input / output port. A register rewriting method characterized in that the contents of the above register are rewritten when input is made a plurality of times. 3. A microcomputer provided with a register provided in a specific address area of a memory from which data can be read by addressing, a CPU and an input / output port, and the register of the register being stored at the specific address in the memory. When the same data to be written in the above register is input multiple times, the instruction for changing the contents is stored, after reading the instruction at the above specified address, the register of the above is registered based on this instruction. A register rewriting method characterized in that the contents are rewritten. 4. A monostable initialized by a reset signal in a microcomputer provided with a register provided in a specific address area of a memory capable of reading data by addressing, a CPU and an input / output port. Only when there is a valid output from the flip-flop,
A register rewriting method characterized in that the contents of the register are rewritten when data to be written to the register is input.