JPS6116800U - Group memory IC - Google Patents
Group memory ICInfo
- Publication number
- JPS6116800U JPS6116800U JP9996984U JP9996984U JPS6116800U JP S6116800 U JPS6116800 U JP S6116800U JP 9996984 U JP9996984 U JP 9996984U JP 9996984 U JP9996984 U JP 9996984U JP S6116800 U JPS6116800 U JP S6116800U
- Authority
- JP
- Japan
- Prior art keywords
- memory capacity
- memory
- group memory
- group
- random access
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は現在作られているメモリーIC構成図の1例で
、第2図は、本件による提案のグループメモリーIC構
成図の1例を示したもので、■,■,■,@,[相]が
第1図、第2図の相違点てある。
■・・・・・・VCC . VSS − CE − O
Eの入力端子、■・・・・・・Ao〜Anのアドレス線
入力端子、■・・・・・・Do〜D7のデータ入出力端
子、■・・・・・・メモリー・マトリクス、■・・・・
・・■のメモリー、マトリクスをm個増大したもの、■
・・・・・・入出力バツファ、■・・・・・・アドレス
デコーダ、■・・・・・・■のアドレスデコーダをm個
増大したもの、■・・・・・・アドレスバッファ、[相
]・・・・・・iCE−m回路、■・・・・・愈のC『
・O『回路と[相]のデータにより■〜■,■〜■グル
ープを制御する回路、[相]・・・・・・■〜■の一分
アドレス上のデータを〇一にグループ切替え用として入
力する、0・・・・・・グループ、セレクト線。Figure 1 shows an example of a currently produced memory IC configuration diagram, and Figure 2 shows an example of a group memory IC configuration diagram proposed in this case.■,■,■,@,[ The differences between FIG. 1 and FIG. 2 are as follows. ■・・・・・・VCC. VSS-CE-O
Input terminal of E, ■...Address line input terminal of Ao to An, ■...Data input/output terminal of Do to D7, ■...Memory matrix, ■. ...
・・■ memory, matrix increased by m times, ■
...Input/output buffer, ■...address decoder, ■...m address decoders of ■...address buffer, [phase ]...iCE-m circuit, ■...C of Yuu
・O "Circuit that controls ■~■, ■~■ groups by circuit and [phase] data, [phase]...... Data on one minute address of ■~■ for group switching to ○1 Input as 0...Group, select line.
Claims (1)
数に対し、メモリー容量を、より多くする為に、アドレ
ス線数により構成される容量のメモリーを、ひどつのグ
ループとして何グループかを形成して、グループ選択を
行う事により各グループ内でのランダム、アクセスが行
え、メモリー容量を増大させたもの。In order to increase the memory capacity relative to the number of address lines in a random access memory IC, the memory capacity configured by the number of address lines is formed into several groups and grouped. By making selections, random access can be performed within each group, increasing memory capacity.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9996984U JPS6116800U (en) | 1984-07-02 | 1984-07-02 | Group memory IC |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9996984U JPS6116800U (en) | 1984-07-02 | 1984-07-02 | Group memory IC |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6116800U true JPS6116800U (en) | 1986-01-31 |
Family
ID=30659449
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9996984U Pending JPS6116800U (en) | 1984-07-02 | 1984-07-02 | Group memory IC |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6116800U (en) |
-
1984
- 1984-07-02 JP JP9996984U patent/JPS6116800U/en active Pending
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