JPH0782463B2 - Communication control device - Google Patents

Description

The present invention relates to a communication control device for a data communication system, and more particularly to a communication control device with an improved method for controlling a micro program code.

〔Overview〕

The present invention relates to a communication control device of a data communication system comprising a read-only storage device for storing a microprogram, a rewritable storage device, or an address trace storage device for tracing the address of the microprogram in addition to these two devices, When the replacement condition of the micro program code in the read storage device is generated, or when the address trace of the address trace storage device is stopped and the replacement condition is generated, the micro program code is replaced with the replaceable storage device. By replacing the read-only memory device with a microprogram code prepared in advance, it is possible to perform debugging efficiently.

[Conventional technology]

Conventionally, a communication control device having a read-only storage device (ROM) for storing a microprogram and a rewritable storage device (RAM) is provided with either a read-only storage device or a rewritable storage device depending on execution mode switching. The micro program code was read out from, and decoded to perform the required execution control.

Further, in addition to the read-only memory device and the rewritable memory device, a communication control device having an address trace memory device (ATM) for tracing a microprogram address is provided with a read-only memory device or a rewritable memory device by switching the execution mode. The micro-program code was read from either one of the devices, and was coded to perform the required execution control, and the address trace storage device had only means for tracing the address of the micro instruction.

[Problems to be solved by the invention]

The above-mentioned conventional communication control device reads the microprogram code from either the read-only storage device or the rewritable storage device by execution mode switching and decodes it to perform the required execution control. The read-only memory device must be replaced when a replacement condition occurs for debugging the microprogram in the read-only memory device and changing or adding means, reducing the debug efficiency and increasing the replacement cost of the read-only memory device. There were drawbacks such as.

In addition, the ROM simulator can be used as a substitute for the read-only memory device during debugging, but due to the faster access time, there is a limitation on the cable length that connects the target substrate of the ROM simulator to the read-only memory device. There is a drawback that the effect of the ROM simulator cannot be exerted because the guarantee of is not taken.

The object of the present invention is to eliminate the above-mentioned drawbacks and to perform efficient debugging without the need to replace the read-only storage device when a replacement condition occurs for modifying a microprogram in the read-only storage device. It is to provide a communication control device capable of performing the above.

[Means for Solving the Problems] A communication control device of the present invention is data including a read-only storage device for storing a microprogram, a rewritable storage device, and an address trace storage device for tracing a microprogram address. In the communication control device of the communication system, when the trace of the microprogram by the address trace storage device is in a stopped state and a replacement condition for modifying the microprogram code in the read-only storage device occurs, the microprogram code is stored in the microprogram code. It is characterized in that a code replacement means for replacing a prepared microprogram code at a corresponding address in the rewritable storage device is provided.

[Action]

The code replacement means is a microprogram code prepared in advance at a corresponding address of the rewritable storage device when a replacement condition is generated, or when the address trace storage device is in an address trace stop state and the replacement condition is generated. To replace the microprogram code at the corresponding address in the read-only memory.

Therefore, when the replacement condition occurs, it is not necessary to replace the read-only storage device each time, and the replacement cost is reduced.
It is possible to improve the efficiency of debugging.

〔Example〕

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the first embodiment of the present invention, FIG. 2 is a block diagram showing details of a code replacement circuit and its related circuits, and FIG. 5 is data to which the present invention is applied. It is a block diagram showing an example of a communication system.

According to FIG. 5, the data communication system to which the present invention is applied includes a central processing unit 1, a main storage unit 2 and communication control units 3 and 4 connected to the central processing unit 1 via a common bus 100. , An input / output device (A) 5, an input / output device (B) 6, and an input / output device (C) 7.

According to FIG. 1, the first embodiment is a communication control device 3 and 4 of a data communication system including a read-only storage device (ROM) 12 for storing a microprogram and a rewritable storage device (RAM) 14. In the above, the code replacement means for replacing the microprogram code with a microprogram code prepared in advance at a corresponding address in the rewritable storage device 14 when a replacement condition for modifying the microprogram code in the read-only storage device 12 occurs. A ROM microprogram code replacement circuit 13 is provided. In addition, a microprocessor 8, a local storage device 9,
A line interface circuit 10 connected to the line interface line 300 and a bus interface circuit 11 connected to the common bus 100 are provided, and these are respectively connected via the internal bus 200.

As shown in FIG. 2, the code replacement circuit 13 includes a code replacement control bit register (BR) 17, a switching circuit 18 and a multiplexer 19. In addition, in FIG. 2, 16
Is a micro program address register, 20 is a micro program code register, and 21 is a micro program execution control circuit.

A feature of the present invention is that a code replacement circuit including a code replacement control bit register (BR) 17, a switching circuit 18 and a multiplexer 19 as shown in FIG. 2 in FIG.
I have set up 13.

Next, the operation of the first embodiment will be described.

Generally, in an electronic computer system, as shown in FIG. 5, a plurality of communication control devices 3 and 4 are connected to the main storage device 2, another input / output device (A) 5, an input / output device (B) 6 and an input device. Together with the output device (C) 7, it is connected to the common bus 100 output from the central processing unit 1. In FIG. 1, the microprocessor 8 controls transmission / reception of data according to a microprogram stored in the read-only storage device 12 or the rewritable storage device 14. The local storage device 9 stores a data transmission / reception buffer, a control table, and the like. The bus interface circuit 11 exchanges data and control signals between the common bus 100 and the internal buses 200 in the communication control devices 3 and 4. The circuit interface circuit 10 performs line control operation according to various communication methods, speeds, etc. by microprogram control. The code replacement circuit 13 performs control to replace the microprogram code in the read-only storage device 12 with the ROM microprogram code prepared in advance at the corresponding address in the rewritable storage device 14 when a replacement condition occurs.

In FIG. 2, the microprogram address register
16 stores the address of the microprogram. The replacement control bit register circuit (BR) 17 holds “0” or “1” bit by bit corresponding to the execution microprogram of the read-only storage device 12, and executes the execution microprogram specified by the microprogram address register 16. When a replacement condition in which the bit corresponding to the program address is "1" occurs, the output of the multiplexer 19 is switched from the read-only storage device 12 side to the rewritable storage device 14 side by controlling the switching circuit 18. .
The multiplexer 19 selects either the read-only storage device 12 side or the rewritable storage device 14 side. The micro program code register 20 stores the micro program code output from either the read-only storage device 12 or the rewritable storage device 14. The microprogram execution control circuit 21 executes and controls the microprogram code output from the microprogram register 20 and determines the next execution microprogram address.

In the read-only storage device 12, a microprogram for transferring a microprogram for executing communication control from the main storage device 2 to the rewritable storage device 14, operation confirmation of the communication control devices 3 and 4 and hardware logic A micro program for performing diagnosis and a micro program for initializing the communication control devices 3 and 4 are stored. The microprogram addresses in the read-only storage device 12 and the rewritable storage device 14 are
It is 16 bits, and the micro program code is also 16 bits. The capacity is 4 KW (word) for the former and 64 KW for the latter.
(Word). In FIG. 2, the microprogram address and the microprogram code are represented in hexadecimal.

The microprogram code in the read-only storage device 12 to be replaced is one in which the bit corresponding to the microprogram address of the code replacement control bit register 17 of the ROM microprogram code is "1", and the microprogram address "0002 _H ". And "FFEF" of "03FE _H "
_{H 2} "and 102 C _H ". Micro program code “FFEF _H ” in read-only memory 12 to be replaced
And "102C _H " are the corresponding microprogram addresses "0002 _H " and "03F" in rewritable storage device 14.
"E _H " microprogram code "836C _H " and "E11
2 _H ”. When the bit corresponding to the microprogram address in the code replacement control bit register 17 is "1", the switching circuit 18 causes the multiplexer 19 to operate so that the microprogram code to be replaced, which is output from the rewritable storage device 14, is generated. It is taken out and the desired operation is executed and controlled.

The initial state of the replacement control bits in the code replacement control bit register 17 is all "0". When the ROM microprogram code needs to be replaced, the desired replacement pattern bit is written from the main memory 2 into the code replacement control bit register 17 via the internal bus 200. At the same time, the microprogram code for the rewritable storage device 14 is also transferred to the rewritable storage device 14 from the main storage device 2 with the desired replacement pattern bits.

Further, the replacement pattern bits transferred to the communication control devices 3 and 4 and the microprogram code of the rewritable storage device 14 do not normally need to be in the main storage device 2, but may be in an external storage device. It may be prepared in the main storage device 2 only during system generation and deleted after transfer.

As described above, in the first embodiment, the microprogram code in the read-only storage device is changed to the microprogram code prepared in advance at the corresponding address in the rewritable storage device when the replacement condition occurs. By providing the replacement means, when the debug means is changed or added, it is not necessary to replace the read-only storage device each time, the debugging efficiency can be improved and the replacement cost can be reduced, and the ROM simulator can be installed. This has the effect of enabling efficient debugging without using it.

FIG. 3 is a block diagram showing a second embodiment of the present invention, and FIG. 4 is a block diagram showing details of the code replacement circuit and its related circuits.

According to FIG. 3, the second embodiment is a read-only memory device (ROM) 12 for storing microprograms, a rewritable memory device (RAM) 14, and an address trace memory device (ATM) for tracing microprogram addresses. ) Communication control devices 3 and 4 of a data communication system including
In, when the trace of the microprogram by the address trace storage device 15 is stopped and a replacement condition for modifying the microprogram code in the read-only storage device 12 occurs, the microprogram code in the rewritable storage device 14 is stored. A code replacement circuit 13a is provided as a code replacement means for replacing the microprogram code prepared in advance at the corresponding address.

That is, the second embodiment is the address trace storage device.
The present invention is applied to the communication control devices 3 and 4 provided with 15.

According to FIG. 4, the code replacement circuit 13a includes a code replacement control bit register (BR) 17 and a switching circuit (A) 18
a, the switching circuit (B) 18b, and the multiplexer (A) 19
a and a multiplexer (B) 19b. In addition,
In FIG. 4, 16 is a micro program address register, 20 is a micro program code register, 21 is a micro program execution control circuit, and 22 is an ATM address counter circuit.

The feature of the present invention is that the code replacement control bit register (BR) 17, the switching circuits (A) 18a and (B) 18b, and the multiplexers (A) 19a and (B) in FIG. 3 are shown in FIG. Code replacement circuit 13a including 19b
Has been established.

Next, the operation of the second embodiment will be described.

The code replacement circuit 13a, when the address trace means of the address trace storage device (ATM) 15 is stopped and a replacement condition occurs, the microprogram code in the read-only storage device 12 is addressed.
Control to replace the corresponding address in 15 with the prepared micro program code.

In FIG. 4, the ATM address counter circuit 22 indicates the address of the address trace storage device 15, and the output of the microprogram address register 16 is passed through the multiplexer (A) 19a to the address indicated by the address trace storage device 15. Sequentially store in a round robin fashion. The multiplexer (A) 19a is the side of the microprogram address register 16 or the ATM address counter circuit 22.
Select either side. The switching circuit (A) 18a sets the multiplexer (A) 19a to the microprogram address register 1 when stopping the address tracing means.
When switching to the 6 side and operating the address tracing means, the multiplexer (A) 19a is switched to the ATM address counter circuit 22 side and the address tracing means is stopped. The multiplexer (B) 19b selects either the read-only storage device 12 side, the address trace storage device 15 side, or the rewritable storage device 14 side. The switching circuit (B) 18b is a circuit for switching the input of the multiplexer (B) 19b, and the microprogram code register 20 is either the read-only storage device 12, the address trace storage device 15, or the rewritable storage device 14. Stores the microprogram code output from.
Others are the same as those in the first embodiment described above.

The addresses of the read-only storage device 12, the rewritable storage device 14, and the address trace storage device 15 are 16 bits, and the internal bit width is also 16 bits, and the capacities of the read-only storage device 12 and the address trace storage device 15 are respectively. 4KW
Thus, the rewritable storage device 14 is 64KW. In FIG. 4, the microprogram address, trace address, microprogram code and internal bits are represented in hexadecimal.

The microprogram code in the read-only storage device 12 to be replaced is the code replacement control bit register 17
If the bit corresponding to the micro program address of "1" is "1", the micro program address "000
2 _H ”and“ 03 FE _H ”are“ 0 CED _H ”and“ 102 C _H ”. Replace subject to read-only memory microprograms code "0CED _H" in 12 and "102C _H" is an address trace microprogram code corresponding address in the memory device 15 "836c _H" and "E112 _H". At this time, the address trace means of the address trace storage device 15 controls the switching circuit (A) 18a and is prohibited. When the bit corresponding to the microprogram address in the code replacement control bit register 17 is "1", the switching circuit (B) 18b causes the multiplexer (B) 19b to operate, and the replacement target output from the address trace storage device 15 is selected. The micro program code is taken out and the desired operation is executed and controlled.

The initial state of the replacement control bits in the code replacement control bit register 17 is all "0". When the ROM microprogram code needs to be replaced, a desired replacement pattern bit is written into the code replacement control bit register 17 from the main memory 2 via the internal bus 200. At the same time, the microprogram code for the rewritable memory device 14 is also transferred to the address trace memory device 15 from the main memory device 2 with the desired replacement pattern bits. At this time, it is natural that the address trace means of the address trace storage device 15 is stopped.

Further, the replacement pattern bit in the address trace storage device 15 and the microprogram code of the rewritable storage device 14 which are transferred to the communication control devices 3 and 4 do not usually need to be in the main storage device 2, but in the external storage device. Alternatively, it may be provided in the main storage device 2 only during system generation, and may be erased after transfer.

As described above, according to the second embodiment, when the microprogram code in the read-only storage device is stopped by the address trace means and the replacement condition occurs,
By providing means for substituting the prepared microprogram code at the corresponding address in the address trace storage device, it becomes unnecessary to replace the read-only storage device each time when the debug change or addition of the microprogram is performed. This has the effects of improving the debugging efficiency, reducing the replacement cost of the read-only storage device after field shipment, and enabling efficient debugging without using a ROM simulator.

〔The invention's effect〕

As described above, the present invention provides, when a replacement condition of the microprogram code in the read storage device occurs,
Alternatively, by providing code replacement means for replacing the microprogram code with the microprogram code stored in advance in the rewritable storage device when the address trace of the address trace storage device is stopped and the replacement condition occurs, At the time of replacement, there is no need to replace the read-only storage device,
This has the effect of reducing the replacement cost and improving the efficiency of debugging.

[Brief description of drawings]

FIG. 1 is a block diagram showing the first embodiment of the present invention. FIG. 2 is a block diagram showing the details of the code replacement circuit and related circuits. FIG. 3 is a block diagram showing the second embodiment of the present invention. FIG. 4 is a block diagram showing the details of the code replacement circuit and related circuits. FIG. 5 is a block diagram showing an example of a system to which the present invention is applied. 1 ... Central processing unit, 2 ... Main memory device, 3,4 ... Communication control device, 5 ... Input / output device (A), 6 ... Input / output device (B), 7 ... Input / output device ( C), 8 ... Microprocessor, 9 ... Local storage device, 10 ... Line interface circuit, 11 ... Bus interface circuit, 12 ...
Read-only memory (ROM), 13, 13a ... Code replacement circuit, 14 ... Rewritable memory (RAM), 15 ... Address trace memory (ATM), 16 ... Micro program address register, 17 ... Code replacement control bit register (BR), 18 ... switching circuit, 18a ... switching circuit (A), 18b ... switching circuit (B), 19 ... multiplexer, 19a ... multiplexer (A), 19b ... multiplexer (B), 20 ... Micro program code register, 21 ... Micro program execution control circuit, 22 ...
ATM address counter circuit, 100 …… common bus, 200 ……
Internal bus, 300 ... Line interface line.

Claims (1)

[Claims] 1. A communication control device for a data communication system, comprising: a read-only memory device for storing a microprogram; a rewritable memory device; and an address trace memory device for tracing a microprogram address. When the trace of the microprogram by the above is stopped and a replacement condition for modifying the microprogram code in the read-only storage device occurs, the microprogram code is prepared in advance at a corresponding address in the rewritable storage device. A communication control device comprising code replacement means for replacing with a micro program code.