JPH03289886A - Video signal processor for high vision vtr - Google Patents

Abstract

PURPOSE:To improve the picture quality of a synthesized video signal by providing a data selection output means which compares the video data of an extracted part obtained from an extraction video data generating means with a reproduced video data, outputs selectively an external input video data to be synthesized with the extracted part of the reproduced video signal when both data are equal to each other and outputs selectively the reproduced video data of non-extracted part when both data are not equal to each other to a video signal processor. CONSTITUTION:A digital comparator 71 of a synthesis circuit 67 compares a synthesis data fed from a synthesis data generating circuit 66 with a reproduced video data and outputs a select data whose level is logical 1 when both data are equal to each other and outputs a select data whose level is logical 0 when both data are not equal to each other. Then an external input video data inputted to a multiplexer 72 is selectively outputted by the select data whose level is logical 1 and similarly, the reproduced video data inputted to the multiplexer 72 is selectively outputted by the select data whose level is logical 0. Thus, a parallel synthesis video data is generated and the synthesized video data is once stored a frame memory.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a video signal processing device for a high-definition VTR, and more specifically, the present invention relates to a video signal processing device for a high-definition VTR. The present invention relates to a video signal processing device that creates a composite video by combining video signals.

[Conventional technology]

A high-definition television system with significantly superior image and sound quality compared to recent television systems has been developed, and plans are being made to put it into practical use under the common name Hi-Vision. Along with this, a VTR (Video Tape Recorder) that records and plays back high-definition information signals has also been introduced.
Development is also progressing. This kind of high-definition VT
Since R corresponds to the high-definition standard in which the number of scanning lines in one frame is 1125, various recording methods have been considered. For example, in the method of recording one field of video signal by dividing it into multiple tracks, in order to avoid switching noise that appears on the screen and maintain high-speed visual search function, etc., one field of video signal is divided into multiple tracks and recorded. So-called shuffling processing for dividing into trunks and deshuffling processing during playback are performed.

FIG. 5 shows an example of a video signal processing device in a high-definition VTR.

When recording a video signal, the video signal input through the input terminal 1 is converted into digital video data by the A/D converter 2, and then sent to the two memory boards 4 and 5 via the changeover switch 3. After reshuffling, that is, line distribution is performed, the memory boards 4 and 5 alternately output each frame, for example. Thereafter, the video data is converted into an analog signal by a D/A converter 7 via a changeover switch 6, further FM modulated by an FM modulator 8, and amplified by a recording amplifier 9.
The information is recorded on the tape 11 by the magnetic head 10.

On the other hand, during reproduction, a reproduction signal is extracted from the tape 11 by the magnetic head 10 and amplified by the reproduction amplifier 12.
Further, the signal is equalized by an equalizer 13, and then subjected to FM repeating three times by an FM demosimulator 14. Subsequently, the playback signal is D/
After being digitized and time base corrected by a TBC (time base collector) 15 with a built-in A converter,
The video data is alternately sent to the memory boards 4 and 5 via the changeover switch 3, where deshuffling processing, which is the reverse of that during recording, is performed to restore the original video data. The video data output from the memory boards 4 and 5 is alternately sent to the D/A converter 16 via the changeover switch 6, where it is converted into an analog signal, and then amplified by the output amplifier 17 and output. It is output from terminal 18.

Next, details of the memory boards 4 and 5 commonly used during recording and reproduction will be explained.

As shown in FIG. 6, the memory boards 4 and 5 each have an SPS (serial-parallel-serial) converter 19.
, a frame memory 20 (or a field memory may be used), and an address control circuit 21. In the address control circuit 21, a line counter 22 generates a signal indicating the line (scanning line) number within one frame, and this signal causes the address generation ROM to
23 generates the start address of the line. The initial value of the address counter 24 is set by this start address, and the address counter 24 operates, thereby specifying the write and read addresses for the frame memory 20. Further, the serial video data supplied to the memory boards 4 and 5 is converted into parallel data by the SPS converter 19, and then sequentially written to designated addresses of the frame memory 20.

On the other hand, the synchronization addition control ROM 25 generates a synchronization addition ROM control signal based on the signal indicating the line number generated by the line counter 22. Subsequently, the synchronous addition ROM 27 is connected to the synchronous addition RO.
A synchronization signal is generated based on the M control signal and the address generated by the synchronization addition address counter 26. Furthermore, the frame memory 20 and the synchronous addition ROM 27 are controlled by the RAM/ROM output enable signal.
The video data and synchronization data are sequentially read out to the SPS converter 19, thereby creating one line of video data. This video data is then serially converted by the SPS converter 19 and output. As described above, shuffling/deshuffling is performed by writing the video signal into the frame memory 20 line by line, and reading the predetermined portions in order.

In addition, the SPS converter 19 in each memory board 4 and 5
Before and after the switching game) 28a, 28b, 29 respectively.
A and 29b are provided, and the memory boards 4 and 5 are connected based on the input data switching signal and the output data switching signal.
For example, writing and reading are performed alternately every frame. That is, when video data is written in the frame memory 20 of the memory board 4, the video data is read from the frame memory 20 of the memory board 5, and the video data is written to the frame memory 20 of the memory board 5.
When video data is written in the frame memory 20 in the memory board 4, the video data is read out from the frame memory 20 in the memory board 4.

By the way, in the above-mentioned high-definition VTR,
When an external input video from a camera or the like is input during playback and synthesized with the playback video, a video synthesis section shown in FIG. 7 is used.

The video synthesis section is inserted between the D/A converter 16 and the output amplifier 17 in FIG. On the other hand, the synchronous separation circuit 3
1 and the synchronization signal is separated. Synchronous separation circuit 3
The vertical synchronization signal and the horizontal synchronization signal separated in step 1 are input to an encoder 32, which detects the position where the external input signal input to this encoder 32 is to be combined, and converts the reproduced signal and the external input signal using the analog switch 30. Switch the output between and. In this way, both signals are combined by switching the analog switch 30, and the resulting combined signal is amplified by the output amplifier 17 and output.

[Problem to be solved by the invention]

However, in the conventional video synthesis section described above, a composite signal is created by switching between an analog playback signal and an analog external input signal, and therefore a complicated circuit such as an encoder 32 is required. Furthermore, since the video synthesis section synthesizes analog signals, it is difficult to always stabilize the precision of the synthesis, and there is a limit to the improvement in the image quality of the synthesized video.

[Means to solve the problem]

In order to solve the above problems, a video signal processing device for a high-definition VTR according to the present invention converts a recorded signal into recorded video data and also converts an external input signal into external input video data. A/D conversion means, a reproduction signal A/D conversion means for converting the reproduction signal into reproduction video data, and sampling video data generation for generating video data of a sampling section extracted from the reproduction video by combining it with an external input video. and comparing the video data of the sampling section obtained by the sampling video data generating means with the reproduced video data, and when both data are equal, selects and outputs external input video data to be combined with the portion where the reproduced video is extracted. On the other hand, the present invention is characterized in that it includes data selection output means for selectively outputting reproduced video data of a non-extracted portion other than the portion from which the reproduced video is extracted when both data are not equal.

[For production]

In the above configuration, when a reproduced video and an externally input video obtained by an external device such as a camera are to be combined, the high-definition VTR performs the reproduction and the external input signal is input to the high-definition VTR. This external input signal is converted into external input video data by the recording signal/external input signal A/D conversion means, and the playback signal obtained from the tape is converted into playback video data by the playback signal A/D conversion means. Ru. On the other hand, the data selection output means compares the video data of the sampled section obtained by the sampled data generation means and the reproduced video data, and when the two data are equal in the comparison, the external input video data is selected and output, and the above-mentioned When the comparison shows that both data are not equal, the reproduced video data is selectively output.

As a result, when the composite video data output from the data selection output means is assembled into one frame, a composite video is obtained in which the portion corresponding to the extracted portion of the reproduced video in the external input video and the non-sampled portion of the reproduced video are combined. It will be done.

In this way, according to the above configuration, video synthesis is performed digitally in units of data, so the accuracy of video synthesis can be stabilized, and the image quality of the composite video can be easily improved. Furthermore, since the synthesis is performed digitally, it is also possible to simplify the circuit configuration. Furthermore, in order to perform video synthesis processing digitally, it is necessary to digitize external input signals, but originally the A/D conversion means for recording signals provided in the video signal processing device was used as a recording signal and external input signal. Since the A/D conversion means for signals is also used for external input signals, the number of parts does not increase.

〔Example〕

An embodiment of the present invention will be described below with reference to FIGS. 1 to 4.

As shown in FIG. 3, the high-definition VT according to this embodiment
The recording system in the R video signal processing device includes input terminals 41 and 42, a changeover switch 43, and an A/D converter 44 at the input stage.

The input terminal 41 receives a video signal to be recorded on a tape 54, which will be described later, and the input terminal 42 receives an external input signal from an external device such as a camera.
A signal from 42 is sent to an A/D converter 44 via a changeover switch 43. The A/D converter 44, which serves as a recording signal/external input signal A/D conversion means, converts the recording signal input from the input terminal 41 into digital recorded video data, and also converts the recording signal input from the input terminal 41 into digital recorded video data. This is a circuit that converts signals into digital external input video data.

Further, the output data of the A/D converter 44 is transferred to two memory boards 47 and 48 via changeover switches 45 and 46.
It is now entered into

The output sections of the memory boards 47 and 48 are connected to a changeover switch 49 for switching between a recording system and a playback system, and the recording system after the changeover switch 49 is connected to a D/A.
It includes a converter 50, an FM modulator 51, and a recording amplifier 52. In this recording system, a signal converted into an analog signal by a D/A converter 50 is subjected to FM modulation by an FM modulator 51, amplified by a recording amplifier 52, and supplied to a magnetic head 53, which records the signal on a tape 54. It looks like this.

On the other hand, the reproduction system at the stage before the memory boards 47 and 48 includes a reproduction amplifier 55, an equalizer 56, an FM demosulator 57, and a TBC (time base collector) 58. In this reproduction system, the signal extracted from the tape 54 by the magnetic head 53 is sent to the reproduction amplifier 5.
5 is amplified and equalized by equalizer 56, and FM
The demodulator 57 performs FM demodulation. Further, the TBC 5B has a built-in A/D converter as an A/D means for the reproduced signal, and is configured to digitize the reproduced signal after FM demodulation and perform time axis correction. Then, the signal output from TBC5B is transferred to selector switch 4.
The signal is input to memory boards 47 and 48 via 6. Furthermore, the playback system at the downstream stage of the memory boards 47 and 48 includes a D/A converter 59 and an output amplifier 60, and the playback video data output from the memory boards 47 and 48 is transferred to the D/A converter 59. It is converted to analog and amplified by the output amplifier 60, and the output terminal 6■
It is designed to output to .

Next, details of the memory boards 47 and 48 commonly used in the recording system and the reproduction system will be explained.

As shown in FIG. 1, the memory boards 47 and 4B have sp.
s (serial/parallel/serial) converter 62;
Frame memory 63 and address control circuit 64
, a shift register 65 , a composite data generation circuit 66 , and a composite circuit 67 . The frame memory 63 is a memory that temporarily stores video data to be recorded on or reproduced from the tape 54 or external human video data. The address control circuit 64 has an address counter, a ROM for synchronization addition, etc., and is basically the address control circuit 21 (sixth
(see figure), and is designed to perform address control for writing or reading video data into or from the frame memory 63, and address control for reading synchronous data from the synchronous addition ROM. The shift register 65 is a circuit that converts serial external input video data obtained by the A/D converter 44 into parallel data.

As shown in FIG. 2, a composite data generation circuit 66 serving as a sampled video data generation means is a circuit that generates video data of a sampled portion extracted from a reproduced video upon synthesis with an external input video. The synthesis circuit 67 as data selection output means is composed of a digital comparator 71 and a multiplexer 72. The digital comparator 71 compares the reproduced video data from the SPS converter 62 and the composite data from the composite data generation circuit 66,
When both data are equal, the result is output as “1”, while when both data are not equal, the result is output as °’0
”.The multiplexer 72 is
When the above comparison result of "1" is input as selection data, the external input video data is output, while when the above comparison result of "0" is input as selection data, the output data is outputted so that the playback video data is output. This is a circuit that makes a selection.

In FIG. 1, the selector switch 46 has an input selector 68
is connected, and the destination of recorded video data or reproduced video data supplied via the changeover switch 46 is switched between the SPS converters 62 in the memory boards 47 and 48 based on the input data switching signal. It looks like this.

Further, an input switching unit 69 is connected to the changeover switch 45, and the destination of the external input video data inputted via the changeover switch 45 is determined by each of the memory boards 47 and 48 based on the input data changeover signal. shift register 6
It is possible to switch between 5. Furthermore, each SPS converter 62 in the memory boards 47 and 48 is
It is connected to the output switching section 70, and the memory board 47.
Output data from one of the 48 SPS converters 62 is output to a changeover switch 49 in FIG. 3 based on an output data switching signal.

In the above configuration, first, the recording operation of the high-definition VTR will be explained. During recording, an analog video signal input manually from the input terminal 41 is supplied to the A/D converter 44 via the changeover switch 43 and converted into digital recorded video data. This recorded video data is
The output is sent to the input switching unit 68 via the changeover switch 46 connected to the C side, but at this time, since the changeover switch 45 is connected to the open REC side, the input changeover unit 69
is not entered. From the input switching section 68, the recorded video data is transferred to the memory board 4 based on the input data switching signal.
The signal is alternately supplied to each SPS converter 62 in 7.48 on a frame-by-frame basis.

Serial recording video data from the input switching unit 68 is converted into parallel data by each SPS converter 62, and is written line by line to an address designated by the address control circuit 64 of the frame memory 63 via the synthesis circuit 67. Note that at this time, since the composite data from the composite data generation circuit 66 is not input to the composite circuit 67, the recorded video data is output as is.

When writing of the recorded video data for one frame is completed, the recorded video data written in the frame memory 63 is read out one line at a time from the address specified by the address control circuit 64. The synchronization data supplied from the synchronization addition ROM is added, thereby creating one line of recorded video data. This recorded video data is
The data is serially converted by the SPS converters 62 of the memory boards 47 and 48, and outputted from there to the switch 49 via the output switching section 70 alternately on a frame-by-frame basis based on the output data switching signal. Thereafter, the same process is repeated until data reading for one frame is completed. In this way, shuffling is performed by temporarily writing recorded video data into the frame memory 63 line by line, and then reading predetermined portions in order.

Note that while recording video data is being written to one of the SPS converters 62, the other SPS converter 62
The input switching unit 6
8 and the output switching section 70 are switched in conjunction with each other.

The recorded video data obtained as described above is converted into an analog recording signal by a D/A converter 50, further FM modulated by an FM modulator 51, amplified by a recording amplifier 52, and then transferred to a tape by a magnetic head 53. 54.

Further, during reproduction, the reproduction signal taken out from the tape 54 by the magnetic head 53 is amplified by the reproduction amplifier 55,
Further, the demodulated playback signal, which is equalized by the equalizer 56 and demodulated by the FM demosimulator 57, is converted into digital playback video data by the TBC 5B, subjected to time axis correction, and then sent to the PB side. The signal is sent to the input switching section 68 via the connected changeover switch 46.

At this time, the changeover switch 45 is connected to the REC side as in the case of recording.

In the input switching section 68, as in the case of recording, the reproduced video data is sent out alternately frame by frame to the SPS converters 62 of the memory boards 47 and 48, and once stored in the frame memory 63.
After being stored in the address control circuit 64, it is read out together with the synchronization data from the address control circuit 64. Next, deshuffling is performed by outputting the reproduced video data frame by frame from each SPS converter 62 to the switch 49 via the output switching section 70. The reproduced video data after deshuffling is converted into an analog reproduction signal by a D/A converter 59, amplified by an output amplifier 60, and outputted via an output terminal 61.

Next, a description will be given of an operation in which a composite video is created by combining a reproduction signal reproduced from the tape 54 and an external input signal input from an external device such as a camera.

When performing synthesis, the signals recorded on the tape 54 are extracted by the magnetic head 53, as in the case of reproduction, and after completing predetermined processing in the circuits after the reproduction amplifier 55, the signals recorded on the tape 54 are sent to each SPS of the memory boards 47 and 48. The data is sent frame by frame to the converter 62, where it is converted from serial to parallel playback video data and input to the digital comparator 71 and multiplexer 72 of the synthesis circuit 67.

On the other hand, an external input signal from an external device is inputted from an input terminal 42 and sent to an A/D converter 44 via a changeover switch 43 connected to the synthesis side, where it is converted into digital external input video data. be done. This external input video data is sent to the input switching unit 69 via the changeover switch 45 connected to the synthesis side, and is sent frame by frame to each shift register 65 in the memory boards 47 and 48, where it is serially transferred. After being converted into parallel data, it is supplied to the multiplexer 72 of the combining circuit 67.

The digital comparator 71 of the synthesis circuit 67 compares the synthesis data supplied from the synthesis data generation circuit 66 with the reproduced video data, and when both data are equal, "
Select data 1'' is output, and when both data are not equal, select data 1101+ is output.Then, the external input video data input to the multiplexer 72 is selected and output by the select data 1, (The reproduced video data input to the multiplexer 72 is selectively outputted by the select data "0" mentioned above. As a result, parallel composite video data is created, and this composite video data is stored in the frame memory 6.
It is temporarily stored in 3.

Similar to the reproduced video data, the composite video data read from the frame memory 63 is added with synchronization data by the address control circuit 64, converted into serial data by the SPS converter 62, and then converted to the output switching unit 70 and It is sent to the D/A converter 59 via the changeover switch 49. The composite video data is converted into an analog composite signal by a D/A converter 59, and this composite signal is further amplified by an output amplifier 60 and outputted via an output terminal 61.

Here, an example of video synthesis using the above operation will be described.

For example, as shown in FIG. 4, when a composite video 75 is obtained by combining the reproduced video 73 reproduced from the tape 54 and the external input video 74, first, the composite data generation circuit 66 extracts the reproduced video 73. Synthetic data is generated so as to exclude the background portion 73a. Then, the synthesis circuit 67 compares the synthesis data with the data of the reproduced video 73,
When both data are equal, the part of the data of the external input video 74 that is combined with the background part 73a is output, and when both data are not equal, the data of the composite part 73b as the non-sampled part of the reproduced video 73 is output. . As a result, a composite image 75 is obtained.

In this embodiment, the frame memory 63 is used as the memory for storing each video data in the memory boards 47 and 48, but a field memory may be used instead.

〔Effect of the invention〕

As described above, the video signal processing device for a high-definition VTR according to the present invention converts a recorded signal into recorded video data and also converts an external input signal into external input video data. means, a reproduction signal A/D conversion means for converting the reproduction signal into reproduction video data, a sampling video data generating means for generating video data of a sampling section extracted by combining the reproduction video with an externally input video, The video data of the sampling section obtained by the video data generation means and the reproduced video data are compared, and when both data are equal, external input video data to be combined with the portion where the reproduced video is extracted is selected and outputted, while both data are This configuration includes data selection and output means for selectively outputting reproduced video data of a non-extracted portion other than the portion from which the reproduced video is extracted when the reproduction video is not equal.

As a result, the video is synthesized digitally on a data-by-data basis, so that the accuracy of the synthesis can be stabilized, the quality of the composite video can be improved, and a natural-looking composite video can be obtained. Furthermore, since the processing is performed digitally, the circuit configuration is simplified and it is possible to downsize the video signal processing device. Furthermore, by performing video synthesis digitally,
A new means for digitizing external input video is required, but originally the A/D conversion means for recording signals provided in the video signal processing device was used as A/D conversion means for recording signals and external input signals. Since it is also used for signals, it is possible to contribute to lowering the cost of the device without increasing the number of parts.

[Brief explanation of the drawing]

1 to 4 show one embodiment of the present invention. FIG. 1 is a block diagram showing the main parts of a video signal processing device. FIG. 2 is a block diagram showing the configuration of the video synthesis section. FIG. 3 is a block diagram showing a schematic configuration of the video signal processing device. FIG. 4 is an explanatory diagram showing an example of video synthesis. 5 to 7 show conventional examples. FIG. 5 is a block diagram showing a schematic configuration of the video signal processing device. FIG. 6 is a block diagram showing the main parts of the video signal processing device. FIG. 7 is a block diagram showing the configuration of the video synthesis section. 44 is an A/D converter (A for recording signals and external human input signals)
/D conversion means), 60 is TBC (A/D conversion means for reproduced signal), 66 is a composite data generation circuit (sampled video data generation means), 67 is a composition circuit (data selection output means), 7
3 is a reproduced video, 73a is a background part (sampled part), 73b is a composite part (non-sampled part), and 74 is external input video data. 3 4th rlJ

Claims (1)

[Claims] 1. Recording signal/external input signal A/D conversion means for converting the recording signal into recorded video data and external input signal into external input video data; and A/D conversion means for the recording signal and external input signal, which converts the reproduced signal into reproduced video data. /D conversion means, and sampled video data generation means for generating video data of a sampling section extracted from the reproduced video by combining with external input video;
Comparing the video data of the sampling section obtained by the sampling video data generating means and the reproduced video data, and selecting and outputting external input video data to be combined with the portion from which the reproduced video is extracted when both data are equal; 1. A video signal processing device for a high-definition VTR, comprising data selection output means for selectively outputting reproduced video data of a non-extracted portion other than the portion from which the reproduced video is extracted when both data are not equal.