JP4661497B2 - Memory controller, flash memory system, and flash memory control method - Google Patents

Description

  The present invention relates to a memory controller, a flash memory system, and a flash memory control method.

In recent years, flash memories have been widely adopted as semiconductor memories used in memory systems in the form of memory cards, silicon disks, and the like. Data stored in the flash memory is required to be retained even when power is not supplied.
The NAND flash memory is a flash memory that is particularly frequently used in the above memory system.
Each of the plurality of memory cells included in the NAND flash memory indicates a logical value “1” when in an erased state and indicates “0” when in a written state. The plurality of memory cells can change from the erased state to the written state independently of the other memory cells.

  In contrast, when changing from a write state to an erase state, each memory cell cannot change independently of the other memory cells. At this time, all of a predetermined number of memory cells called blocks are simultaneously erased. This collective erasure operation is generally called “block erase”. The write process or read process for the NAND flash memory is performed in units of a predetermined number of memory cells called pages. A block which is a unit of erasure processing is composed of a plurality of pages.

In the NAND flash memory, the erase process is performed in units of blocks as described above. Therefore, the correspondence between the addresses given from the host system side and the addresses in the flash memory is usually managed in units of blocks. For example, in Patent Document 1 below, a logical block address based on an address given from the host system side and a physical block address, which is a block address in a flash memory, are associated with each other in a one-to-one correspondence.
JP 2003-76605 A

Since the NAND flash memory has such characteristics, normally, when data is rewritten, new data (data after rewriting) is written to the erased block that has been erased, and old data is written. A process of erasing a block in which (data before rewriting) has been written is performed.
When rewriting the original user data stored in any physical block of the flash memory to new user data, it is not possible to rewrite only the page where the original user data to be rewritten is written. Rewrite the whole. That is, when rewriting, instead of the physical block that has been rewritten, the new user data is written to the erased physical block from which all user data has been erased, and the physical block that has been rewritten It is necessary to write original user data other than the rewriting target.
As described above, when rewriting user data already written in the flash memory, even if the user data is data written in a small part of the physical block, the processing is performed on two physical blocks. The efficiency was low and the processing time was longer than necessary. Furthermore, when rewriting is performed frequently, the number of times of rewriting the physical block increases, and there is a risk that the number of physical blocks exceeding the limit of the number of rewriteable times will increase.

  An object of the present invention is to solve such problems and to provide a memory controller, a flash memory system, and a flash memory control method that do not require rewriting of data of the entire physical block every time rewriting occurs. To do.

In order to achieve the above object, a memory controller according to the first aspect of the present invention provides:
Has a storage area including a plurality of pages physical blocks contains multiple, erasure of data is performed in units of physical blocks, writing of data is connected to the flash memory is performed in units of pages, against the person the flash memory Rua A memory controller for controlling access,
Logical block forming means for forming a logical block including a plurality of sector unit areas to which a logical address given by the host system is assigned;
Block management means for allocating the logical block to a physical block and managing the correspondence between the logical block and the physical block;
Based on the logical address given from the host system, the page in the physical block corresponding to the logical block to which the logical address belongs, and a write Mude over data writing means to write data corresponding to the logical address ,
The storage area in the physical block to which the logical block is allocated is
An original data storage area having a capacity equal to that of the area included in the logical block, and configured by pages having a predetermined relationship with the area of the sector unit included in the logical block;
It is used by being divided into an update data storage area composed of pages that can be freely assigned a sector unit area included in the logical block,
The data writing means includes
When the page in the original data storage area specified based on the logical address given from the host system is an empty page, the data corresponding to the logical address is written to the specified page,
If the specified page is not a free page, data corresponding to the logical address and information for specifying the logical address are written in the user area and the redundant area of the empty page in the update data storage area, respectively.
It is characterized by that.

In addition, based on the logical address given from the host system, further comprising a reading means for reading data corresponding to the logical address from the page in the physical block corresponding to the logical block to which the logical address belongs,
The reading means includes
If there is a page in the update data storage area in which information corresponding to the logical address given from the host system is written in the redundant area, the data corresponding to the logical address from the page in the update data storage area Read
If there is no page in the update data storage area in which information corresponding to the logical address is written in the redundant area, data corresponding to the logical address from the page corresponding to the logical address in the original data storage area May be read out .

In addition, the data writing means includes information for identifying the logical address in the redundant area of the empty page in the update data storage area and each physical block in the physical block corresponding to the logical block to which the logical address belongs. Information indicating whether or not the data stored in the page is valid may be written.

To achieve the above object, a flash memory system according to a second aspect of the present invention includes any one of the memory controllers according to the first aspect of the present invention and a flash memory controlled by the memory controller. It is characterized by that.

In order to achieve the above object, a flash memory control method according to a third aspect of the present invention includes:
Has a storage area including a plurality of pages physical blocks contains multiple, erasure of data is performed in units of physical blocks, the control method of the flash memory to control access to write data against the flash memory is performed in units of pages Because
A logical block forming process for forming a logical block including a plurality of sector unit areas to which a logical address given by the host system is assigned;
A block management process for allocating the logical block to a physical block and managing a correspondence between the logical block and the physical block;
On the basis of the logical address given from the host system, the page in the physical block corresponding to the logical block to which the logical address belongs, seen including a data writing process of writing data corresponding to the logical address,
The storage area in the physical block to which the logical block is allocated is
An original data storage area having a capacity equal to that of the area included in the logical block, and configured by pages having a predetermined relationship with the area of the sector unit included in the logical block;
It is used by being divided into an update data storage area composed of pages that can be freely assigned a sector unit area included in the logical block,
In the data writing process,
When the page in the original data storage area specified based on the logical address given from the host system is an empty page, the data corresponding to the logical address is written to the specified page,
If the specified page is not a free page, data corresponding to the logical address and information for specifying the logical address are written in the user area and the redundant area of the empty page in the update data storage area, respectively.
It is characterized by that.

In addition, based on the logical address given from the host system, further comprising a reading means for reading data corresponding to the logical address from the page in the physical block corresponding to the logical block to which the logical address belongs,
The reading means includes
If there is a page in the update data storage area in which information corresponding to the logical address given from the host system is written in the redundant area, the data corresponding to the logical address from the page in the update data storage area Read
If there is no page in the update data storage area in which information corresponding to the logical address is written in the redundant area, data corresponding to the logical address from the page corresponding to the logical address in the original data storage area May be read out .

Further, in the data write process, information for specifying the logical address in the redundant area of the empty page in the update data storage area and each physical block in the physical block corresponding to the logical block to which the logical address belongs Information indicating whether or not the data stored in the page is valid may be written.

  According to the present invention, it is possible to realize a flash memory system that does not require rewriting of data of the entire physical block every time rewriting occurs.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[First Embodiment]
FIG. 1 is a configuration diagram showing an outline of a flash memory system 1 according to the first embodiment of the present invention.
As shown in FIG. 1, the flash memory system 1 includes a flash memory 2 and a memory controller 3 that controls the flash memory 2. The flash memory system 1 is normally detachably attached to the host system 4 and is used as a kind of external storage device for the host system 4.

Examples of the host system 4 include various information processing apparatuses such as a personal computer and a digital still camera that process various information such as characters, sounds, and image information.
Details of the flash memory 2 and the memory controller 3 will be described below.

[Description of flash memory 2]
In this flash memory system 1, a flash memory 2 in which data is stored is composed of a NAND flash memory. The NAND flash memory is a non-volatile memory developed for use as a storage device (as an alternative to a hard disk). This NAND flash memory cannot perform random access, writing and reading are performed in units of pages, and erasing is performed in units of physical blocks composed of a plurality of pages. Since data in the flash memory 2 cannot be overwritten, data is written into the erased area when data is written.

  In the flash memory 2 having such characteristics, the correspondence between the logical address given from the host system 4 side and the physical address in the flash memory 2 dynamically changes. Therefore, when accessing the flash memory 2, an address conversion table showing the correspondence between the logical address used in the host system 4 and the physical address of the flash memory 2 is usually created, and the flash memory is used by using this address conversion table. 2 is accessed.

FIG. 2 is an explanatory diagram showing the relationship between blocks and pages.
The configuration of the block and page differs depending on the specifications of the flash memory 2, but in the general flash memory 2, as shown in FIG. 2A, one physical block is configured with 32 pages (P0 to P31). Each page is composed of a 512-byte user area and a 16-byte redundant area. In recent years, as the capacity increases, one physical block is composed of 64 pages (P0 to P63), and each page is composed of a 2048-byte user area and a 64-byte redundant area. In the flash memory 2 of the present embodiment, one physical block is composed of 32 pages (P0 to P31), and each page is composed of a 512-byte user area and a 16-byte redundant area.

  The user area of each page of the physical block is an area mainly storing user data supplied from the host system 4 and its rewrite data, and the redundant area is an error correction code, corresponding logical address information, and a block. This is an area for storing additional data such as status. The error correction code is additional data for detecting and correcting an error included in the data stored in the user area, and is generated by an ECC block described later.

  In the flash memory system 1 of the present embodiment, an original data storage unit for writing user data (original data) before rewriting to each physical block of the flash memory 2 and rewriting of the original data written in the original data storage unit An update data storage unit for writing data is set.

  Specifically, 16 pages of pages P0 to P15 of each physical block of the flash memory 2 are used as an original data storage unit for writing original data, and update data for writing data for rewriting pages P16 to P31. The storage unit. The pages of the original data storage unit and the pages of the update data storage unit are made to correspond one-to-one, and the page numbers in the original data storage unit are associated with the page numbers in the update data storage unit. That is, the rewrite data of the user data written on the page P0 is written on the page P16. The rewrite data of the user data written on the page P1 is written on the page P17. Similarly, the rewrite data of the user data written to the pages P2, P3,..., P15 from the younger side is written to the pages P18, P19,.

  The above-described corresponding logical address information indicates information related to the logical block address of the user data written in the redundant area of the page in which the physical block user data is written and stored in the physical block. If no user data is stored in the physical block, the corresponding logical address information is not written to any page, so that the block is an erased block depending on whether the corresponding logical address information is written. It can be determined whether or not there is. That is, if the corresponding logical block address is not written, it is determined that the block is an erased block.

  The block status is a flag indicating whether or not the physical block is a bad block (a physical block in which data cannot be normally written). When it is determined that the physical block is a bad block Is set with a flag indicating that it is a bad block.

Next, the circuit configuration of the flash memory 2 will be described.
A general NAND flash memory includes a register for holding write data or read data and a memory cell array for storing data. The memory cell array includes a plurality of memory cell groups in which a plurality of memory cells are connected in series, and a specific memory cell in the memory cell group is selected by a word line. Data copying (copying from the register to the memory cell or copying from the memory cell to the register) is performed between the memory cell selected by the word line and the register.

  A memory cell constituting the memory cell array is composed of a MOS transistor having two gates. Here, the upper gate is called a control gate, and the lower gate is called a floating gate. By injecting charges (electrons) into the floating gate and discharging charges (electrons) from the floating gate, Data is written or erased.

  Since the floating gate is surrounded by an insulator, the injected electrons are held for a long period of time. When injecting electrons into the floating gate, a high voltage is applied so that the control gate is at the high potential side. When electrons are injected from the floating gate, a high voltage at which the control gate is at the low potential side is applied. Applied to discharge electrons. The state in which electrons are injected into the floating gate (write state) corresponds to data of logical value “0”, and the state in which electrons are discharged from the floating gate (erased state) is logical value “1”. Corresponds to data.

[Description of Memory Controller 3]
The memory controller 3 includes a host interface control block 5, a microprocessor 6, a host interface block 7, a work area 8, a buffer 9, a flash memory interface block 10, and an ECC (error collection code) block 11. And a flash memory sequencer block 12. The memory controller 3 constituted by these functional blocks is integrated on one semiconductor chip.

The host interface block 7 is connected to the host system 4 via the external bus 13, and the flash memory interface block 10 is connected to the flash memory 2 via the internal bus 14.
Hereinafter, the function of each functional block will be described.

The microprocessor 6 is a functional block that incorporates a counter or the like and controls the operation of the entire functional blocks constituting the memory controller 3.
The host interface control block 5 is a functional block that controls the operation of the host interface block 7. Here, the host interface control block 5 includes an operation setting register (not shown) for setting the operation of the host interface block 7, and the host interface block 7 operates based on the operation setting register.

  The host interface block 7 is a functional block that exchanges data, address information, status information, and external command information with the host system 4. That is, when the flash memory system 1 is attached to the host system 4, the flash memory system 1 and the host system 4 are connected to each other via the external bus 13. In such a state, data or the like supplied from the host system 4 to the flash memory system 1 is taken into the flash memory system 1 through the host interface block 7 and is supplied from the flash memory system 1 to the host system 4. Data and the like are supplied to the host system 4 through the host interface block 7 as an exit.

  Further, the host interface block 7 has a register for holding a logical address, a sector number and an external command supplied from the host system 4, an error register (not shown) set when an error occurs, and the like. Yes.

  The work area 8 is a work area in which data necessary for controlling the flash memory 2 is temporarily stored, and is composed of a plurality of SRAM (Static Random Access Memory) cells.

  The buffer 9 is a functional block that temporarily holds data read from the flash memory 2 and data to be written to the flash memory 2. That is, data read from the flash memory 2 is held in the buffer 9 until the host system 4 is ready to receive data, and data to be written to the flash memory 2 is held in the buffer 9 until the flash memory 2 is ready for writing. Is done.

  The flash memory sequencer block 12 is a functional block that controls access to the flash memory 2. The flash memory sequencer block 12 includes a plurality of registers (not shown), and information necessary for executing an access process to the flash memory 2 is set by the microprocessor 6 in the plurality of registers. Based on the information set in the plurality of registers, internal commands, address information, and the like are supplied to the flash memory 2.

Here, the “internal command” is a command given from the memory controller 3 to the flash memory 2 and is distinguished from an “external command” which is a command given from the host system 4 to the flash memory system 1.
The flash memory interface block 10 is a functional block that exchanges data, address information, status information, internal command information, device ID information, and the like with the flash memory 2 via the internal bus 14.

  The ECC block 11 generates an error correction code added to data to be written to the flash memory 2 and detects and corrects an error included in the read data based on the error correction code added to the read data. Function block.

[Description of Access to Flash Memory 2]
Next, the operation of the flash memory system 1 when accessing the flash memory 2 will be described with reference to the drawings.

FIG. 3 is an explanatory diagram showing a logical address space and a physical address space.
The host system 4 uses a logical address to specify the location of the storage area. In FIG. 3, a logical address space represented by a logical address is indicated by LBA (Logical Block Address), which is a serial number assigned in units of sectors.

  The storage area of the flash memory 2 is composed of a group of physical blocks (# 0, # 1,...) Each composed of a plurality of pages (P0 to P31). Each page is written with user data for one sector of the logical address space. In this embodiment, 16 pages of pages P0 to P15 of each physical block are set as original data areas, and 16 pages of pages P16 to P31 are set as update data areas, and each physical block # 0, # 1,. User data for 16 sectors in the logical address space and its rewrite data are written. Therefore, the logical block corresponding to each physical block # 0, # 1,... In the batch erase unit is composed of 16 sectors.

  The memory controller 3 creates an address conversion table showing the correspondence between the logical blocks LB0, LB1,... And the physical blocks # 0, # 1,..., And obtains the address of the page to be accessed using this address conversion table. . The address conversion table contains information on the corresponding logical address information written in the redundant area of each physical block # 0, # 1,... (Information indicating the logical block corresponding to the user data written in the physical block). Created based on.

  For example, when user data is written to the physical blocks # 0, # 1,..., The physical blocks # 0, 1,... With the serial numbers LB0, LB1,. The address conversion table can be created by sequentially writing these serial numbers LB0, LB1,. The address conversion table is created on the work area 8 and is rewritten when the correspondence between the logical blocks LB0, LB1,... And the physical blocks # 0, # 1,. Write processing using the address conversion table will be described with reference to FIGS.

4 and 5 are flowcharts showing the writing process.
When accessing the flash memory 2, the host system 4 supplies a write command or a read command to the memory controller 3 and designates an access target. The designation of the target is indicated by logical address information indicating a position in the logical address space.

The logical address information is a binary number having a predetermined bit width, the upper side indicates the logical blocks LB0, LB1,..., The lower 4 bits are the sector numbers in the logical blocks LB0, LB1,. This is the page number in the physical block # 0, # 1,. That is, the lower 4 bits of the logical address information indicate the page number in the original data storage unit or the page number in the update data storage unit of each physical block.
When consecutive sectors are to be accessed, the host system 4 indicates the top sector to be accessed by logical address information and specifies the number of sectors to be accessed. In this case, the microprocessor 6 of the memory controller 3 sequentially generates logical address information corresponding to each access target sector designated by the host system 4.

  When a write command, logical address information, and the number of sectors are given from the host system 4, the microprocessor 6 of the memory controller 3 sets the number of sectors in a built-in counter and decrements the set number of sectors every time writing is performed. At the same time, logical address information to be written next is created. When the number of sectors set in the counter becomes 0, it is determined that there is no user data to be written next (step S1: NO), and the microprocessor 6 does not generate logical address information and ends the writing process. .

  When the memory controller 3 determines that there is user data to be written next by the microprocessor 6 and generates logical address information (step S1: YES), the memory controller 3 corresponds to the logical block specified on the upper side of the logical address information. The physical block to be searched is searched from the address conversion table as a target block (step S2).

  If the target block corresponding to the logical block designated by the host system 4 is not obtained from the address conversion table as a result of the search in step S2 (step S3: NO), one erased physical block is set as the target block, and the logical address The sector number in the logical block indicated by the lower side is the number of the access target page of the target block.

  The memory controller 3 writes user data in the user area of the access target page of the erased block that is the target block of the flash memory 2 and writes the logical block address as the corresponding logical address information in the redundant area of the access target page. Additional data such as error correction code and block status is written (step S4).

  Further, the memory controller 3 writes the number of the physical block that is the target block in the address conversion table in association with the number of the logical block corresponding to the physical block (step S5). That is, the address conversion table is updated.

  When the physical block that is the target block is detected in the search in step S2 (step S3: YES), the redundant area of the target block in the flash memory 2 is checked, and the sector number in the logical block indicated by the lower side of the logical address is set. The equal number is set as the access target page number, and it is determined whether or not user data is written in the access target page (step S6).

  As a result of the determination in step S6, when it is determined that user data has not been written on the access target page (step S6: YES), the user data given from the host system 4 is written on the access target page (step S7). ). At this time, the memory controller 3 writes additional data such as the logical block address, error correction code, and block status as the corresponding logical address information in the redundant area of the access target page in which the user data is newly written. In step S7, user data is written as original data in the original data storage unit.

  As a result of the determination in step S6, when it is determined that user data has already been written in a page having a number equal to the sector number in the logical block indicated by the lower side of the logical address (step S6: NO), the memory controller 3 , 16 (corresponding to the number of pages in the original data storage unit of the physical block) is added to the sector number in the logical block indicated by the lower side of the logical address, and the number obtained by adding 16 is used as a new access target page of the target block. To do. That is, a new access target page is moved to the update data storage unit. The memory controller 3 checks the target block redundant area, and determines whether user data has already been written in the new access target page of the target block (step S8).

  As a result of the determination in step S8, when it is determined that no user data is written in the new access target page of the target block (step S8: YES), the memory controller 3 determines that the new access target page of the target block User data is written in (Step S9). At the same time, the memory controller 3 writes additional data such as the logical block address, error correction code, and block status as the corresponding logical address information in the redundant area of the page of the target block in which the user data is written. By this step S9, the rewrite data of the original data is written in the update data storage unit.

  As a result of the determination in step S8, when it is determined that user data is written in a new access target page of the target block (step S8: NO), the memory controller 3 selects one erased physical block. As a new target block, the sector number in the logical block indicated by the lower side of the logical address is set as the access target page number of the new target block.

  The memory controller 3 writes user data to the user area of the access target page of the erased block that has become a new target block of the flash memory 2 and also stores the logical block as corresponding logical address information in the redundant area of the access target page. Additional data such as the address, error correction code, block status, etc. are written (step S10).

  Further, the memory controller 3 writes the number of the physical block that has become the new target block and the number of the logical block corresponding to the physical block in the address conversion table (step S11). That is, the address conversion table is updated.

  Further, the memory controller 3 sets the user data and the corresponding logical address written in the page corresponding to the original target block (the physical block determined in step S8) on the page other than the access target page of the new target block. Additional data such as the logical block address, error correction code, and block status is written as information (step S12). At this time, for a page having a page number smaller than that of the access target page, user data or the like is transferred before writing to the access target page.

At this time, if there is user data written corresponding to the same sector in both the original data storage section and the update data storage section, the user data written in the update data storage section is transferred to the new target block. Write to the corresponding page in the original data storage.
Then, all the pages of the original target block are erased at once (block erase) to make an erased block (step S13).

Next, the read processing operation for the flash memory 2 will be described with reference to FIG.
FIG. 6 is a flowchart showing the reading process.

  When reading user data from the flash memory 2, the microprocessor 6 of the memory controller 3, when given a read command, logical address information, and the number of sectors from the host system 4, sets the number of sectors in a built-in counter and performs reading. Each time it is performed, the set number of sectors is decremented and logical address information to be read next is created. When the number of sectors set in the counter becomes 0, it is determined that there is no user data to be read next (step S31: NO), and the microprocessor 6 does not generate logical address information and ends the reading process. .

  When the memory controller 3 determines that there is user data to be read next by the microprocessor 6 and generates logical address information (step S31: YES), the memory controller 3 corresponds to the logical block specified on the upper side of the logical address information. The physical block to be searched is searched from the address conversion table as a target block (step S32).

  The memory controller 3 adds 16 (corresponding to the number of pages of the original data storage unit of the physical block) to the sector number of the logical block specified on the lower side of the logical address information, and sets this as the number indicating the access target page. A physical address indicating an access target page of the target block detected in step S32 is created, a redundant area of the page indicated by the physical address is checked, and whether or not user data is written in the access target page of the target block is determined. Determination is made (step S33).

  When it is determined that user data is written in the access target page of the target block (step S33: YES), the memory controller 3 reads the user data written in the user area of the access target page of the target block (step S33). S34). At this time, when an error of the user data is detected by the error correction code stored in the redundant area, the read user data is corrected.

  On the other hand, when it is determined that no user data is written in the access target page of the target block (step S33: NO), the memory controller 3 sets the sector number of the logical block specified on the lower side of the logical address information to a new one. A physical address indicating a new access target page of the target block detected in step S32 is created with the number indicating the access target page, and the user data written in the user area of the new access target page of the target block is read out. (Step S35). At this time, when an error of the user data is detected by the error correction code stored in the redundant area, the read user data is corrected.

  As described above, in the flash memory system of the present embodiment, when the flash memory 2 having a physical block composed of a plurality of pages P0 to P31 is used, user data is written using the pages P0 to P15 as the original data storage unit, When the user data stored in the original data storage unit is rewritten, the rewritten data is written to the pages P16 to P32 of the physical block. For this reason, it is possible to reduce processing for transferring user data and the like of a physical block that has been rewritten to an erased block and processing for deleting a physical block that is no longer needed.

  In each physical block, the pages P0 to P15 of the original data storage unit and the pages P16 to P32 of the update data storage unit are associated with each other, and the user data of the same sector in the logical address space is written. Management is easy and the access destination is required in a short time.

[Second Embodiment]
FIG. 7 is a configuration diagram showing an overview of a flash memory system 21 according to the second embodiment of the present invention.
As shown in FIG. 7, the flash memory system 21 includes a flash memory 22 and a memory controller 23 that controls the flash memory 22, and is detachably attached to the host system 24.

[Description of flash memory 22]
In the flash memory system 21, the flash memory 22 in which data is stored is configured by a NAND flash memory. Like the flash memory 2 of the first embodiment, one physical block has 32 pages (P0 to P31). Each page consists of a 512-byte user area and a 16-byte redundant area. The user area of each page of the physical block is an area for storing user data and its rewrite data, and the redundant area is an area for storing additional data such as error correction code, corresponding logical address information, and block status. It is.

  In the flash memory system 1 of the first embodiment described above, each physical block of the flash memory 2 is divided into two parts, an original data storage unit and an update data storage unit, but may be divided into two or more. (See FIG. 8).

FIG. 8 is a diagram showing a configuration of the flash memory 22 of the present embodiment.
In the flash memory system 21 of the present embodiment, each physical block of the flash memory 22 has an original data storage unit that writes user data before rewriting and a first data that writes rewrite data of user data written to the original storage unit. Update data storage unit, a second update data storage unit that writes rewrite data of data written in the first update data storage unit, and rewrite data of data written in the first update data storage unit And a second update data storage unit for writing.

  Specifically, eight pages P0 to P7 of the physical block are used as original data storage units for writing new user data, pages P8 to P15 are used as first update data storage units, and pages P16 to P23 are used. Is the second update data storage unit, and pages P24 to P31 are the third update data storage unit. Then, each page of the original data storage unit, each page of the first update data storage unit, each page of the second update data storage unit, and each page of the third update data storage unit are associated with each other to store the original data The page number in the section, the page number in the first update data storage section, the page number in the second update data storage section, and the page number in the third update data storage section are associated with each other.

  That is, the rewrite data of the user data written in the page P0 is written in the page P8, the rewrite data of the user data written in the page P8 is written in the page P16, and the rewrite of the user data written in the page P16 The replacement data is written to page P24. In addition, rewrite data of user data written in page P1 is written in page P9, rewrite data of user data written in page P9 is written in page P17, and rewrite of user data written in page P17 The replacement data is written to page P25. Similarly, the rewrite data of the user data written in each page P2, P3,... P7 is written in pages P10, P11,... P15, and the user data written in pages P10, P11,. Rewrite data is written to P18, P19,... P23, respectively, and rewrite data of user data written to pages P18, P19,... P23 is written to pages P26, P27,.

[Description of Memory Controller 23]
The memory controller 23 includes a host interface control block 25, a microprocessor 26, a host interface block 27, a work area 28, a buffer 29, a flash memory interface block 30, and an ECC (error collection code) block 31. And a flash memory sequencer block 32. The memory controller 23 constituted by these functional blocks is integrated on one semiconductor chip. The host system 24 and the host interface block 27 are connected by an external bus 33, and the flash memory 22 and the flash memory interface block 30 are connected by an internal bus 34.

  The microprocessor 26 is a functional block that controls the operation of the entire functional blocks constituting the memory controller 23. The flash memory sequencer block 32 is a functional block that controls access to the flash memory 22, and information necessary for executing access processing to the flash memory 22 is set by a microprocessor 26 in a plurality of built-in registers. . Based on the information set in the plurality of registers, internal commands, address information, and the like are supplied to the flash memory 22.

  The host interface control block 25, the host interface block 27, the work area 28, the buffer 29, the flash memory interface block 30, and the ECC block 31 are the host interface control block 5, the host interface block 7, and the work area 8 of the first embodiment. , The buffer 9, the flash memory interface block 10, and the ECC block 11.

[Description of Access to Flash Memory 22]
Next, the operation of the flash memory system 21 when the flash memory 22 is accessed will be described with reference to the drawings.

  The storage area of the flash memory 22 is composed of a group of physical blocks (# 0, # 1,...) Each composed of a plurality of pages (P0 to P31). Each page is written with user data for one sector of the logical address space. Here, in this embodiment, 8 pages of pages P0 to P7 of each physical block are set as the original data area, 8 pages of pages P8 to P15 are set as the first update data area, and 8 pages of pages P16 to P23 are set as the first page. 2 update data areas, 8 pages P24 to P31 are the third update data areas, and each physical block # 0, # 1,... Has user data for 8 sectors in the logical address space and its rewrite. Data is written. Therefore, the logical block corresponding to each physical block # 0, # 1,... In the batch erase unit is composed of 8 sectors.

The memory controller 23 creates an address conversion table showing the correspondence between the logical blocks LB0, LB1,... And the physical blocks # 0, # 1,..., And obtains the address of the page to be accessed using this address conversion table. .
Write processing using the address conversion table will be described with reference to FIGS.

9 and 10 are flowcharts showing the writing process.
When writing user data to the flash memory 22, the host system 24 gives a write command, user data, and logical address information to the memory controller 23. The designation of the target is indicated by logical address information indicating a position in the logical address space.

The logical address information is a binary number having a predetermined bit width, the upper side indicates the logical blocks LB0, LB1,..., And the lower 3 bits indicate the sector numbers in the logical blocks LB0, LB1,. The lower 3 bits of the logical address information represent page numbers in the original data storage unit, the first update data storage unit, the second update data storage unit, and the third update data storage unit.
When making consecutive sectors to be accessed, the host system 24 indicates the head sector to be accessed by the logical address information and specifies the number of sectors to be accessed. In this case, the microprocessor 26 of the memory controller 23 sequentially generates logical address information corresponding to each access target sector designated by the host system 24.

  When a write command, logical address information, and the number of sectors are given from the host system 24, the microprocessor 26 of the memory controller 23 sets the number of sectors in a built-in counter, and decrements the set number of sectors every time writing is performed. At the same time, logical address information to be written next is created. When the number of sectors set in the counter becomes 0, it is determined that there is no user data to be written next, and the microprocessor 26 does not generate logical address information and ends the writing process (step S41: NO). .

  When the memory controller 23 determines that there is user data to be written next by the microprocessor 26 and generates logical address information (step S41: YES), the memory controller 23 corresponds to the logical block specified on the upper side of the logical address information. The physical block to be searched is searched from the address conversion table as a target block (step S42).

  If the physical block corresponding to the logical block designated by the host system 24 is not obtained from the address conversion table as a result of the search in step S42 (step S43: NO), one erased physical block is set as the target block, and the logical address The sector number in the logical block indicated by the lower side is the number of the access target page of the target block.

  The memory controller 23 writes the user data to the user area of the access target page of the erased block that is the target block of the flash memory 22 and stores the logical block address as the corresponding logical address information in the redundant area of the access target page. Additional data such as error correction code and block status is written (step S44).

  Further, the memory controller 23 writes the number of the physical block that is the target block and the number of the logical block corresponding to the physical block in the address conversion table (step S45). That is, the address conversion table is updated.

  When the physical block that is the target block is detected in the search in step S42 (step S43: YES), the redundant area of the target block in the flash memory 22 is checked, and the sector number in the logical block indicated by the lower side of the logical address is set. The equal number is set as the access target page number, and it is determined whether or not user data is written in the access target page (step S46).

  As a result of the determination in step S46, when it is determined that the user data is not written in the page having the number equal to the sector number in the logical block indicated by the lower side of the logical address (step S46: YES), the memory controller 23 The page having the number equal to the sector number in the logical block indicated by the lower side of the logical address is set as the page to be accessed, and the user data given from the host system 24 is written (step S47). At this time, the memory controller 23 writes additional data such as the logical block address, error correction code, and block status as the corresponding logical address information in the redundant area of the access target page in which the user data is newly written.

  As a result of the determination in step S46, when it is determined that the user data has already been written in the page having the same number as the sector number in the logical block indicated by the lower side of the logical address information (step S46: NO), the memory controller 23 Adds 8 (equivalent to the number of pages in the original data storage section of the physical block) to the sector number in the logical block indicated by the lower side of the logical address, and adds the number obtained by adding 8 to the new access target page of the target block And That is, the new access target page is moved to the first update data storage unit. The memory controller 23 checks the target block redundant area, and determines whether or not user data has already been written in the new access target page of the target block (step S48).

  As a result of the determination in step S48, when it is determined that user data is not written in a page having a number equal to the value obtained by adding 8 to the sector number in the logical block indicated by the lower side of the logical address information (step S48: YES), the memory controller 23 writes the user data given from the host system 24 with the page having a number obtained by adding 8 to the sector number in the logical block indicated by the lower side of the logical address as a new access target page (step S49). ). At this time, the memory controller 23 writes additional data such as the logical block address, error correction code, and block status as the corresponding logical address information in the redundant area of the access target page in which the user data is newly written.

  As a result of the determination in step S48, when it is determined that user data has already been written in the page of the number obtained by adding 8 to the sector number in the logical block indicated by the lower side of the logical address information (step S48: NO) The memory controller 23 adds 16 (corresponding to the number of pages of the original data storage unit and the first update data storage unit of the physical block) to the sector number in the logical block indicated by the lower side of the logical address, and adds this 16 This number is set as a new access target page of the target block. That is, a new access target page is moved to the second update data storage unit. The memory controller 23 checks the target block redundant area, and determines whether user data has already been written in the new access target page of the target block (step S50).

  As a result of the determination in step S50, when it is determined that no user data is written in a page having a number equal to the value obtained by adding 16 to the sector number in the logical block indicated by the lower side of the logical address information (step S50: YES), the memory controller 23 sets the page of the number obtained by adding 16 to the sector number in the logical block indicated by the lower side of the logical address as a new page to be accessed, and writes the user data given from the host system 24 (step) S51). At this time, the memory controller 23 writes additional data such as the logical block address, error correction code, and block status as the corresponding logical address information in the redundant area of the access target page in which the user data is newly written.

  As a result of the determination in step S50, when it is determined that user data has already been written in the page having a number obtained by adding 16 to the sector number in the logical block indicated by the lower side of the logical address information (step S50: NO) The memory controller 23 sets the sector number in the logical block indicated by the lower side of the logical address to 24 (corresponding to the number of pages of the original data storage unit, the first update data storage unit, and the second update data storage unit of the physical block). And the number obtained by adding 24 is set as a new access target page of the target block. That is, a new access target page is moved to the third update data storage unit. The memory controller 23 checks the target block redundant area, and determines whether or not user data has already been written in the new access target page of the target block (step S52).

  As a result of the determination in step S52, when it is determined that no user data is written in the new access target page of the target block (step S52: YES), the memory controller 23 determines that the new access target page of the target block. User data is written in (step S53). At the same time, the memory controller 23 writes additional data such as the logical block address, error correction code, and block status as the corresponding logical address information in the redundant area of the access target page in which the user data is written.

  As a result of the determination in step S52, when it is determined that user data has been written in the new access target page of the target block (step S52: YES), the memory controller 23 stores one erased physical block. As a new target block, the sector number in the logical block indicated by the lower side of the logical address is set as the access target page number of the new target block.

  The memory controller 23 writes user data to the user area of the access target page of the erased block that has become the new target block of the flash memory 22, and stores the logical block as the corresponding logical address information in the redundant area of the access target page The additional data such as the address, error correction code, block status, etc. is written (step S54).

  Further, the memory controller 23 writes the number of the physical block that became the new target block in the address conversion table in association with the number of the logical block corresponding to the physical block (step S55). That is, the address conversion table is updated.

  Further, the memory controller 23 sets the user data and the corresponding logical address written in the page corresponding to the original target block (the physical block determined in step S46) on the page other than the access target page of the new target block. Additional data such as the logical block address, error correction code, and block status is written as information (step S56). At this time, for a page having a page number smaller than that of the access target page, user data or the like is transferred before writing to the access target page.

  At this time, it is written corresponding to the same sector in four locations of the original data storage area, the first update data storage section, the second update data storage section, and the third update data storage section of the original target block. If there is user data and additional data, the user data and additional data written in the third update data storage unit are written in the original data storage unit of the new target block.

In addition, if there is user data and additional data written corresponding to the same sector at three locations of the original data storage unit, the first update data storage unit, and the second update data storage unit, the second update data The user data and additional data written in the storage unit are written in the corresponding pages of the original data storage unit of the new target block. If there is user data and additional data written corresponding to the same sector in two places of the original data storage unit and the first update data storage unit, the user data written in the first update data storage unit and The additional data is written in the corresponding page of the original data storage unit of the new target block. That is, the user data is transferred in the priority order of the third update data storage unit, the second update data storage unit, the first update data storage unit, and the original data storage unit.
Then, all the pages of the original target block are erased at once to make an erased block (step S57).

[Reading process to the flash memory 22]
Next, the read processing operation for the flash memory 22 will be described with reference to FIG.
FIG. 11 is a flowchart showing the reading process.

  When reading user data from the flash memory 22, the microprocessor 26 of the memory controller 23, when given a read command, logical address information, and the number of sectors from the host system 24, sets the number of sectors in a built-in counter and performs reading. Each time it is done, the number of sectors set in the counter is decremented. When the number of sectors set in the counter is other than 0, it is determined that there is user data to be read next, and logical address information of the user data to be read next is generated. The number of sectors set in the counter is 0 In this case, it is determined that there is no user data to be read next (step S61: NO), and the microprocessor 26 does not generate logical address information and ends the reading process.

  When the memory controller 23 determines that there is user data to be read next by the microprocessor 26 and generates logical address information (step S61: YES), the memory controller 23 corresponds to the logical block specified on the upper side of the logical address information. The physical block to be searched is searched from the address conversion table as a target block (step S62).

  The memory controller 23 sets the sector number of the logical block specified on the lower side of the logical address information to 24 (the number of pages of the original data storage unit, the first update data storage unit, and the second update data storage unit of the physical block). The physical address indicating the access target page of the target block detected in step S62 is created, the redundant area of the page indicated by the physical address is examined, and the target It is determined whether or not user data is written in the access target page of the block (step S63). That is, it is determined whether there is user data to be accessed in the third update data storage unit.

  If it is determined that user data is written in the access target page of the target block (step S63: YES), the memory controller 23 reads the user data written in the user area of the access target page of the target block (step S63). S64). At this time, when an error of the user data is detected by the error correction code stored in the redundant area, the read user data is corrected.

  If it is determined in step S63 that user data is not written in the access target page of the target block (step S63: NO), the memory controller 23 determines the sector of the logical block specified on the lower side of the logical address information. 16 is added to the number (corresponding to the number of pages in the original data storage unit and the first update data storage unit of the physical block), and this is used as the number indicating the new access target page, and the target block detected in step S62 A new physical address indicating the access target page is created, the redundant area of the page indicated by the new physical address is checked, and it is determined whether or not user data is written in the access target page of the new target block ( Step S65). That is, it is determined whether there is user data to be accessed in the second update data storage unit.

  If it is determined in step S65 that user data has been written to the access target page of the new target block (step S65: YES), the memory controller 23 has written the user data in the user area of the access target page of the target block. Data is read (step S66). At this time, when an error of the user data is detected by the error correction code stored in the redundant area, the read user data is corrected.

  If it is determined in step S65 that no user data is written in the access target page of the target block (step S65: NO), the memory controller 23 determines the sector of the logical block specified on the lower side of the logical address information. 8 (corresponding to the number of pages in the original data storage unit of the physical block) is added to the number, and this is used as the number indicating the new access target page, and the new physical indicating the access target page of the target block detected in step S62 An address is created, the redundant area of the page indicated by the new physical address is checked, and it is determined whether user data has been written to the access target page of the new target block (step S67). That is, it is determined whether there is user data to be accessed in the first update data storage unit.

  If it is determined in step S67 that user data has been written to the access target page of the new target block (step S67: YES), the memory controller 23 has written the user data in the user area of the access target page of the target block. Data is read (step S68). At this time, when an error of the user data is detected by the error correction code stored in the redundant area, the read user data is corrected.

  If it is determined in step S67 that no user data is written in the access target page of the target block (step S67: NO), the memory controller 23 determines the sector of the logical block specified on the lower side of the logical address information. The physical address indicating the new access target page of the target block detected in step S62 is created with the number indicating the new access target page, and is written in the user area of the new access target page of the target block User data is read (step S69). At this time, when an error of the user data is detected by the error correction code stored in the redundant area, the read user data is corrected.

  As described above, in the flash memory system of the present embodiment, each physical block of the flash memory 22 has an original data storage unit that writes user data before rewriting, and rewrite data of user data written in the original storage unit. The first update data storage unit for writing the data, the second update data storage unit for writing the rewrite data of the data written in the first update data storage unit, and the data written in the second update data storage unit Are divided into a third update data storage unit for writing the rewrite data. As a result, as in the first embodiment, the process of transferring user data or the like of a physical block that has been rewritten to an erased block, or the process of erasing a physical block that is no longer needed can be reduced compared to the prior art. it can.

  In addition, even if the user data in the same sector is rewritten three times, it is not necessary to transfer other user data or erase physical blocks that are no longer needed, which is more efficient than the first embodiment. .

[Third Embodiment]
FIG. 12 is a configuration diagram showing an outline of a flash memory system 41 according to the third embodiment of the present invention.

  As shown in FIG. 12, the flash memory system 41 includes a flash memory 42 and a memory controller 43 that controls the flash memory 42, and is detachably attached to the host system 44.

[Description of flash memory 42]
In the flash memory system 41, the flash memory 42 in which data is stored is composed of a NAND flash memory. Like the flash memory 2 of the first embodiment, one physical block is 32 pages (P0 to P31). Each page consists of a 512-byte user area and a 16-byte redundant area. The user area of each page of the physical block is an area for storing user data and its rewrite data, and the redundant area is an area for storing additional data such as error correction code, corresponding logical address information, and block status. It is.

FIG. 13 is a diagram showing a configuration of the flash memory 42.
In the flash memory system 41 of the present embodiment, each physical block of the flash memory 42 has an original data storage unit that writes user data before rewriting, and update data that writes rewrite data of user data written to the original storage unit. It is divided into a storage unit. Specifically, 16 pages of pages P0 to P15 of each physical block of the flash memory 42 are used as an original data storage unit for writing data (original data) before rewriting, and pages P16 to P31 are used as rewriting data. An update data storage unit for writing is used.

  The capacities of the original data storage unit and the update data storage unit in each physical block are the same as in the first embodiment, but unlike the first embodiment, the pages of these original data storage units and the update data storage unit There is no one-to-one correspondence with pages.

  When rewriting occurs in the data already written in the page of the original data storage unit or the page of the update data storage unit, the rewriting data is transferred from the younger side of the unwritten empty page in the update data storage unit. The update data storage unit is used so as to write sequentially.

[Description of Memory Controller 43]
The memory controller 43 includes a host interface control block 45, a microprocessor 46, a host interface block 47, a work area 48, a buffer 49, a flash memory interface block 50, and an ECC (Error Collection Code) block 51. And a flash memory sequencer block 52. The memory controller 43 constituted by these functional blocks is integrated on one semiconductor chip. The host system 44 and the host interface block 47 are connected by an external bus 53, and the flash memory 42 and the flash memory interface block 50 are connected by an internal bus 54.

  The microprocessor 46 is a functional block that controls the operation of all the functional blocks constituting the memory controller 43. The flash memory sequencer block 52 is a functional block that controls access to the flash memory 42, and information necessary for executing access processing to the flash memory 42 is set by a microprocessor 46 in a plurality of built-in registers. . Based on the information set in the plurality of registers, internal commands, address information, and the like are supplied to the flash memory 42.

  The host interface control block 45, host interface block 47, work area 48, buffer 49, flash memory interface block 50, and ECC block 51 are the host interface control block 5, host interface block 7, work area 8 of the first embodiment. , The buffer 9, the flash memory interface block 10, and the ECC block 11.

[Description of Access to Flash Memory 42]
Next, the operation of the flash memory system 41 when accessing the flash memory 42 will be described with reference to the drawings.

  FIG. 14 is an explanatory diagram showing a logical address space and a physical address space. The logical address space represented by the logical address is indicated by LBA, which is a serial number assigned in units of sectors.

  The storage area of the flash memory 42 includes a group of physical blocks (# 0, # 1,...) Each composed of a plurality of pages (P0 to P31). Each page is written with user data for one sector of the logical address space. Here, in this embodiment, 16 pages of pages P0 to P15 of each physical block are used as the original data storage unit, and 16 pages of pages P16 to P31 are used as the update data storage unit. In each physical block # 0, # 1,..., User data for 16 sectors in the logical address space and its rewrite data are written. Therefore, the logical block corresponding to each physical block # 0, # 1,... In the batch erase unit is composed of 16 sectors.

The memory controller 43 creates an address conversion table showing the correspondence between the logical blocks LB0, LB1,... And the physical blocks # 0, # 1,..., And obtains the address of the page to be accessed using this address conversion table. .
Write processing using the address conversion table will be described with reference to FIGS.

15 and 16 are flowcharts showing the writing process.
When writing user data to the flash memory 42, the host system 44 gives a write command, user data, and logical address information to the memory controller 43. The target designation is indicated by logical address information indicating a position in the logical address space.

  The logical address information is a binary number having a predetermined bit width, the upper side indicates the logical blocks LB0, LB1,..., And the lower 4 bits indicate the sector numbers in the logical blocks LB0, LB1,. The lower 4 bits of the logical address information indicate the page number in the original data storage unit or the update data storage unit.

  When consecutive sectors are to be accessed, the host system 44 indicates the top sector to be accessed by the logical address information and designates the number of sectors to be accessed. In this case, the microprocessor 46 of the memory controller 43 sequentially generates logical address information corresponding to each access target sector designated by the host system 44.

  When a write command, logical address information and the number of sectors are given from the host system 44, the microprocessor 46 of the memory controller 43 sets the number of sectors in a built-in counter and decrements the set number of sectors every time writing is performed. At the same time, logical address information to be written next is created. When the number of sectors set in the counter reaches 0, it is determined that there is no user data to be written next (step S81: NO), and the microprocessor 46 ends the write process without generating logical address information. .

  When the memory controller 43 determines that there is user data to be written next by the microprocessor 46 and generates logical address information (step S81: YES), the memory controller 43 corresponds to the logical block specified on the upper side of the logical address information. The physical block to be searched is searched from the address conversion table as a target block (step S82).

  If the physical block corresponding to the logical block designated by the host system 44 is not obtained from the address conversion table as a result of the search in step S82 (step S83: NO), one erased physical block is set as the target block, and the logical address The sector number in the logical block indicated by the lower side is the number of the access target page of the target block.

  The memory controller 43 writes the user data in the user area of the access target page of the erased block that is the target block of the flash memory 42 and addresses the logical block as corresponding logical address information in the redundant area of the access target page. Additional data such as error correction code and block status is written (step S84). As a result, the user data as the original data is written in the original data storage unit.

  Further, the memory controller 43 writes the number of the physical block that is the target block in the address conversion table in association with the number of the logical block corresponding to the physical block (step S85). That is, the address conversion table is updated.

  When the physical block that is the target block is detected in the search in step S82 (step S83: YES), the redundant area of the target block in the flash memory 42 is checked, and the sector number in the logical block indicated by the lower side of the logical address is set. The equal number is set as the access target page number, and it is determined whether or not user data is written in the access target page (step S86).

  As a result of the determination in step S86, when it is determined that user data is not written in a page having a number equal to the sector number in the logical block indicated by the lower side of the logical address (step S86: YES), the memory controller 43 The page with the number equal to the sector number in the logical block indicated by the lower side of the logical address is set as the page to be accessed, and the user data given from the host system 44 is written (step S87). At this time, the memory controller 43 writes additional data such as the logical block address, error correction code, and block status as the corresponding logical address information in the redundant area of the access target page in which the user data is newly written. As a result, the user data as the original data is written in the original data storage unit.

As a result of the determination in step S86, when it is determined that user data has already been written in the page having the number equal to the sector number in the logical block indicated by the lower side of the logical address information (step S86: NO), the logical block The redundant area of the update data storage unit of the physical block corresponding to is checked, and it is confirmed whether there is an empty page in which user data is not written (step S88).
If it is confirmed in step S88 that there is a free page (step S88: YES), the user data given from the host system 44 is written to the youngest page among the free pages (step S89). As a result, the rewritten data is written in the update data storage unit.

  At this time, the memory controller 43 writes the logical block address, the error correction code, and the block status as the corresponding logical address information in the redundant area of the page in which the user data is written in step S89, and in the logical block of the user data. Write the sector number. Further, at this time, information indicating whether or not the data stored in which page in the physical block is valid after being rewritten may be written in the redundant area.

  When it is confirmed in step S88 that there is no empty page (step S88: NO), the update data storage unit is already filled with the rewritten data, so the memory controller 43 determines that the erased 1 One physical block is set as a new target block, and the sector number in the logical block indicated by the lower side of the logical address is set as the access target page number of the new target block.

  The memory controller 43 writes the user data to the user area of the access target page of the erased block that has become the new target block of the flash memory 42, and stores the logical block as the corresponding logical address information in the redundant area of the access target page. Additional data such as the address, error correction code, and block status are written (step S90).

  Further, the memory controller 43 writes the number of the physical block that has become the new target block in association with the number of the logical block corresponding to the physical block in the address conversion table (step S91). That is, the address conversion table is updated.

  Furthermore, the memory controller 43 adds the latest valid data to the user data stored in the original target block (the physical block determined in step S83) on the page other than the access target page of the new target block. The corresponding sector number is obtained from the additional information written in the redundant area, and the user data is written in the original data storage unit of the new target block together with additional data such as the logical block address, error correction code, and block status. (Step S92). Then, all the pages of the original target block are erased at once to make an erased block (step S93). At this time, with respect to a page having a page number smaller than that of the access target page, user data and the like are transferred before writing to the access target page.

[Reading process to the flash memory 42]
Next, the read processing operation for the flash memory 42 will be described with reference to FIG.
FIG. 17 is a flowchart showing the reading process.

  When reading user data from the flash memory 42, the microprocessor 46 of the memory controller 43, when given a read command, logical address information and the number of sectors from the host system 44, sets the number of sectors in a built-in counter and reads the data. Each time it is done, the number of sectors set in the counter is decremented. When the number of sectors set in the counter is other than 0, it is determined that there is user data to be read next, and logical address information of the user data to be read next is generated. The number of sectors set in the counter is 0 In this case, it is determined that there is no user data to be read next (step S101: NO), and the microprocessor 46 ends the reading process without generating logical address information.

  When the memory controller 43 determines that there is user data to be read next by the microprocessor 46 and generates logical address information (step S101: YES), the memory controller 43 corresponds to the logical block specified on the upper side of the logical address information. The physical block to be searched is searched from the address conversion table as a target block (step S102).

The memory controller 43 checks the contents written in the redundant area of the update data storage unit of the physical block that is the target block from the old number side of the page of the physical block, and detects the page in which the sector number to be accessed is described (step) S103). When a page in which the sector number to be accessed is described in the redundant area can be detected (step S103: YES), the page is the page in which the latest user data is written. The user data written in the user area of the page is read from the host system 44 as user data specified by the logical address information (step S104).
In step S103, when the page in which the sector number to be accessed is described cannot be detected from the update data storage unit (step S103: NO), the rewriting of the original data has not occurred. 43 reads the user data written in the user area of the page (original data storage unit) corresponding to the sector number from the host system 44 as the user data specified by the logical address information (step S105).
As described above, in the present embodiment, since the page of the update data storage unit of each physical block is not associated with the page of the original data storage unit, the user data of the page that has been rewritten is sequentially written. The number of occurrences of data transfer and block erasure to an empty block can be greatly reduced as compared with the first and second embodiments.

In addition, this invention is not limited to the said embodiment, A various deformation | transformation is possible.
For example, in the first to third embodiments, the flash memories 2, 22, and 42 are configured such that each page in FIG. 2A is configured with a 512-byte user area and a 16-byte redundant area. As shown in FIG. 2B, one physical block is composed of 64 pages (P0 to P63), and each page is composed of a 2048-byte user area and a 64-byte redundant area. In this case, user data for four sectors may be written in each page of the physical block. Individual user data on each physical page is written or rewritten using an erased block, the necessary data is written to the erased block, and the data group written to the erased block is placed at a predetermined position in the physical block. Just write in.

1 is a configuration diagram showing an overview of a flash memory system according to a first embodiment. It is explanatory drawing which shows the relationship between a block and a page. It is explanatory drawing which shows a logical address space and a physical address space. It is a flowchart which shows write-in processing. It is a flowchart which shows write-in processing. It is a flowchart which shows a read-out process. It is a block diagram which shows the outline | summary of the flash memory system which concerns on the 2nd Embodiment of this invention. It is a figure which shows the structure of the flash memory of this embodiment. It is a flowchart which shows write-in processing. It is a flowchart which shows write-in processing. It is a flowchart which shows a read-out process. It is a block diagram which shows the outline | summary of the flash memory system which concerns on the 3rd Embodiment of this invention. It is a figure which shows the structure of flash memory. It is explanatory drawing which shows a logical address space and a physical address space. It is a flowchart which shows write-in processing. It is a flowchart which shows write-in processing. It is a flowchart which shows a read-out process. .

Explanation of symbols

1, 21, 41 Flash memory system 2, 22, 42 Flash memory 3, 23, 43 Memory controller 4, 24, 44 Host system 5, 25, 45 Host interface control block 6, 26, 46 Microprocessor 7, 27, 47 Host interface block 8, 28, 48 Work area 9, 29, 49 Buffer 10, 30, 50 Flash memory interface block 11, 31, 51 ECC block 12, 32, 52 Flash memory sequencer block

Claims (7)

Has a storage area including a plurality of pages physical blocks contains multiple, erasure of data is performed in units of physical blocks, writing of data is connected to the flash memory is performed in units of pages, against the person the flash memory Rua A memory controller for controlling access,
Logical block forming means for forming a logical block including a plurality of sector unit areas to which a logical address given by the host system is assigned;
Block management means for allocating the logical block to a physical block and managing the correspondence between the logical block and the physical block;
Based on the logical address given from the host system, the page in the physical block corresponding to the logical block to which the logical address belongs, and a write Mude over data writing means to write data corresponding to the logical address ,
The storage area in the physical block to which the logical block is allocated is
An original data storage area having a capacity equal to that of the area included in the logical block, and configured by pages having a predetermined relationship with the area of the sector unit included in the logical block;
It is used by being divided into an update data storage area composed of pages that can be freely assigned a sector unit area included in the logical block,
The data writing means includes
When the page in the original data storage area specified based on the logical address given from the host system is an empty page, the data corresponding to the logical address is written to the specified page,
If the specified page is not a free page, data corresponding to the logical address and information for specifying the logical address are written in the user area and the redundant area of the empty page in the update data storage area, respectively.
A memory controller characterized by that. Based on the logical address given from the host system, further comprises a reading means for reading data corresponding to the logical address from the page in the physical block corresponding to the logical block to which the logical address belongs,
The reading means includes
If there is a page in the update data storage area in which information corresponding to the logical address given from the host system is written in the redundant area, the data corresponding to the logical address from the page in the update data storage area Read
If there is no page in the update data storage area in which information corresponding to the logical address is written in the redundant area, data corresponding to the logical address from the page corresponding to the logical address in the original data storage area Read out,
The memory controller according to claim 1. The data writing means includes information for specifying the logical address in a redundant area of an empty page in the update data storage area and each page in a physical block corresponding to the logical block to which the logical address belongs. Write information indicating whether the stored data is valid,
The memory controller according to claim 1 or 2, characterized in that. Flash memory system comprising: the memory controller; and a flash memory which is controlled by the memory controller to any one of claims 1 to 3. Has a storage area including a plurality of pages physical blocks contains multiple, erasure of data is performed in units of physical blocks, the control method of the flash memory to control access to write data against the flash memory is performed in units of pages Because
A logical block forming process for forming a logical block including a plurality of sector unit areas to which a logical address given by the host system is assigned;
A block management process for allocating the logical block to a physical block and managing a correspondence between the logical block and the physical block;
Based on the logical address given from the host system, including a page in a physical block corresponding to the logical block to which the logical address belongs, and a write Mude over data writing process to write the data corresponding to the logical address See
The storage area in the physical block to which the logical block is allocated is
An original data storage area having a capacity equal to that of the area included in the logical block, and configured by pages having a predetermined relationship with the area of the sector unit included in the logical block;
It is used by being divided into an update data storage area composed of pages that can be freely assigned a sector unit area included in the logical block,
In the data writing process,
When the page in the original data storage area specified based on the logical address given from the host system is an empty page, the data corresponding to the logical address is written to the specified page,
If the specified page is not a free page, data corresponding to the logical address and information for specifying the logical address are written in the user area and the redundant area of the empty page in the update data storage area, respectively.
A method for controlling a flash memory. Based on the logical address given from the host system, further includes a read process of reading data corresponding to the logical address from a page in a physical block corresponding to the logical block to which the logical address belongs,
In the reading process,
If there is a page in the update data storage area in which information corresponding to the logical address given from the host system is written in the redundant area, the data corresponding to the logical address from the page in the update data storage area Read
If there is no page in the update data storage area in which information corresponding to the logical address is written in the redundant area, data corresponding to the logical address from the page corresponding to the logical address in the original data storage area Read out,
6. The method of controlling a flash memory according to claim 5 , wherein In the data write process, information for identifying the logical address is stored in the redundant area of the empty page in the update data storage area, and each page in the physical block corresponding to the logical block to which the logical address belongs. Write information indicating whether the stored data is valid,
The method of controlling a flash memory according to claim 5 or 6 ,

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