JP2654803B2 - IC card - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial application field> The present invention relates to an IC card which is inserted into a transceiver as an external device and exchanges information with the transceiver.

<Conventional Technology> An IC card having a built-in small arithmetic device and memory is used by exchanging information with a transmission / reception device such as a computer.

The operation of the conventional IC card will be described with reference to FIGS. 9 and 10.

First, in FIG. 9 showing the operation sequence of the IC card, when the IC card is inserted into the transceiver and the micro processing unit (MPU) in the IC card receives the command from the transceiver, the command is checked. To execute command processing and output the result to the transceiver. In this operation, if there is an error in communication from the transceiver or an error in the command, an error message is output to the transceiver.

Then, the MPU of the IC card is performed according to a cycle as shown in FIG. That is, the IC card is inserted into the transceiver, the power supply voltage Vcc and the clock signal CLK are supplied from the transceiver to the MPU of the IC card, and the reset signal RST (over bar) is input from the transceiver to the MPU. And the MPU performs a reset routine (A0) such as initialization.
Answer signal ANSWER TO notifying the transceiver that transmission is possible
Send RESET (A1). Then, the MPU waits for the input of a command signal (serial signal SIO including data together with the command) from the transceiver (A2), and when the command signal is input (A3), executes the command processing (A4). The result is output to the transceiver (A5). When such a series of operations is completed, the MPU waits for the next command signal input from the transceiver (A2), and when a command signal is input (A3), repeats the same processing as described above.

<Problems to be Solved by the Invention> Here, if the transceiver for inserting the IC card is made portable, the use as a smart card system will be expanded. Is strongly desired.

In order to realize such a system, it is necessary to extend the life of a power supply battery built in the transceiver, and it is necessary to minimize consumption of power supplied from the transceiver to the IC card. As a measure for this, it is conceivable to increase the capacity of the battery. However, there is a limit to the increase in the display capacity due to restrictions on the installation space of the battery and the need to reduce the weight of the transceiver. In addition, a method of changing a device incorporated in the IC card to a low-power-consumption type CMOS or the like can be considered, but there is a major problem in terms of IC card development cost, such as a new design of devices and the like.

The present invention has been made in view of the above-described conventional circumstances, and has as its object to rationally achieve a reduction in power consumption of an IC card without the above-described inconvenience.

<Means for Solving the Problems> The IC card of the present invention that achieves low power consumption is connected to an external transceiver, and performs information processing and information transmission and reception during a series of access to the IC card. And an information processing mode capable of performing information processing and a low power consumption mode in which information processing is stopped, and an IC card including a small processing device capable of transitioning between these modes, Is activated, the low power consumption mode transition means for transitioning the small processing device to the low power consumption mode, and the interruption signal from the external transceiver, the small processing device is switched from the low power consumption mode to the information processing mode. A low-power-consumption mode returning means for causing the small-sized arithmetic device to transition to the low-power-consumption mode again after the completion of the information processing. Between Seth, a small computing device and characterized in that any time a transition between the information processing mode and the low power consumption mode.

<Operation> A small arithmetic unit (CPU, M
PU) is automatically switched to the low power consumption mode by the low power consumption mode transition means after being activated, and is switched from the low power consumption mode to the information processing mode by the information processing mode transition means when an interrupt signal is input from the transceiver. To execute the information processing based on the command from the transceiver. Then, after outputting the result of the information processing to the transceiver, the small processing device transits to the low power consumption mode again by the low power consumption mode returning means. That is, while waiting for a command signal from the transceiver to be input, the small-sized arithmetic device of the IC card is in a state of transition to the low power consumption mode,
Power consumption during this period is reduced.

As a result, the power consumption of the external transceiver, which is an external power supply, can be significantly reduced.

<Example> An IC card of the present invention will be specifically described based on an example.

First, the configuration of an IC card according to one embodiment of the present invention
Description will be made based on the drawings.

The IC card 1 has a built-in EEPROM 3 that can be written and read as a memory together with the MPU 2 which is a microcomputer. It is connected.

It should be noted that an HD6301 series manufactured by Hitachi, Ltd. is used as the MPU 2 in this embodiment.

The transceivers 5 into which the IC card 1 is inserted have data
It has an interface 6 and a personal computer 7 connected by an address bus. The transmitter / receiver 5 is a handy portable unit that integrates the interface 6 and the personal computer 7 and has a battery (not shown) as a power supply.

In use, the IC card 1 is inserted into the interface 6, the power supply terminal Vcc and the ground terminal GND of the interface 6 are connected to the MPU 2 and the memory 3, respectively, and the power supply voltage is transmitted from the transceiver 5 to the MPU 2 and the memory 3. Supply.
Also, the clock signal output terminal CL of the interface 6
K and a reset signal output terminal RST (over bar) are respectively connected to the MPU 2, and a clock signal and a reset signal are input to the MPU 2 from the transceiver 5. The information signal input / output terminal SIO of the interface 6 is an output terminal TX of the MPU2,
The input terminal RX is connected to the interrupt signal input terminal IRQ (over bar), and information is exchanged between the transceiver 5 and the IC card 1. MPU2 IRQ (over bar)
The terminal is connected to a terminal so that an IRQ interrupt to the MPU 2 is prohibited during writing to the memory 3 as described later.

The operation of the IC card 1 having the above configuration will be described with reference to the flowcharts shown in FIGS.

First, as shown in FIG.
When the card 1 is inserted into the transceiver 5 and the power supply voltage Vcc is supplied from the transceiver 5 and the clock signal CLK and the reset signal RST (over bar) are input, the MPU 2 performs a hard reset routine such as initialization. (Step S
1) Output an answer signal ANSWER TO RESET notifying that the command signal can be transmitted to the transceiver 5 (step S2).

Next, the MPU 2 executes a SLEEP MODE transition routine (Step S3), and transitions to a sleep mode which is a low power consumption mode in the present embodiment. In the SLEEP MODE transition routine, as shown in FIG. 3, the IRQ (over bar) terminal of the MPU2 is activated to enable an interrupt by input of an IRQ interrupt signal (step S21), and the information processing circuit of the MPU2 is stopped. Then, a transition to the sleeve mode in which the power consumption is extremely small (about 1/6 of the normal operation) is commanded (step S22). Step S executed by these MPU2
3, S21 and S22 constitute a low power consumption mode transition means for transitioning to the low power consumption mode after the MPU 2 is started.

When the MPU 2 has transitioned to the sleep mode by the transition instruction to the sleep mode, the MPU 2 determines whether or not an IRQ interrupt signal has been input from the transceiver 5 to the IRQ (over bar) terminal (step S4). When a signal is input, an ACTIVE MODE transition routine is executed (Step S5), and the MPU 2 transits to an active mode (information processing mode) in which the information processing circuit is activated. ACTIVE
In the MODE transition routine, as shown in FIG. 4, the IRQ (over bar) terminal of the MPU 2 is masked in response to the IRQ interrupt signal, and the interrupt is disabled by the input of the IRQ interrupt signal (step S31). Pointer SP
(Step S32), and the address of the command input routine shown in FIG. 5 is set in the program counter PC (step S33). Steps S4, S5, S31, S32, and S33 executed by the MPU 2 constitute an information processing mode transition unit that transitions the MPU 2 to the information processing mode based on an interrupt signal from the transceiver 5.

In a state where the MPU 2 has transitioned to the information processing mode in step S5, the MPU 2 executes a process based on the command signal (byte-serial signal including data together with the command) input from S10 of the interface 6 (step S5).
S6).

After completing this information processing, execute the SLEEP MODE transition routine to transition to the sleep mode again (step
S7). That is, as shown in FIG. 7, after the command is received (A3), the command is processed (A4), and the processing result is output (A5) until the next command is input (the interface 6 and the Time required for communication with the computer 7),
The MPU 2 transits to the sleep mode with low power consumption and is held. Step S7 executed by the MPU 2 constitutes a low power consumption mode returning means for returning the MPU 2 to the low power consumption mode again after finishing the information processing.

In the command processing of step S6 described above, FIG.
The processing shown in the figure is executed. That is, when a command signal is input (step S41), it is checked whether there is an error in the input communication (step S42), the command is further checked (steps S43, 44), and processing according to the command is executed. (Step S45) and send the result to the transceiver 5.
(Step S46). If there is an error in the input communication or command, error processing is executed (step
S47), an error message is output.

In addition, when executing the write processing to the memory 3 in the above command processing (step S45), a transition to the sleep mode is performed as shown in FIG. 6 and FIG. That is, the MPU 2 transmits a control signal to the memory 3 to instruct data writing, and supplies an address and data (step S51). Then, the SLE shown in FIG.
Execute the EP MODE transition routine (step S52), and execute MPU2
Transitions to sleep mode. In the state where the write processing of the memory 3 is being executed, the RDY / BUSY (over bar) of the memory 3 becomes “L” level, and this is inverted by the inverter 8 and supplied to the IRQ of the MPU 2 as “H” level.
Keep interrupts to the server disabled. Like this MP
When the writing to the memory 3 is completed in a state where U2 is in the sleep mode, the RDY / BUSY (over bar) of the memory 3 becomes “H” level, and this is inverted by the inverter 8 and the IRQ of the MPU 2 becomes “L”. Supplied as level, IRQ
Is generated (step S53), and the ACTIVE MODE transition routine shown in FIG. 4 is executed to transition to the active mode (step S54). That is, while writing to the memory 3 is performed, the MPU 2 is kept in the sleep mode with low power consumption.

As the low power consumption mode, the HD6301 of the above embodiment is used.
Although the sleep mode is used in the system-based semiconductor device, various other settings such as a no-operation mode can be made according to the type of the semiconductor device constituting the small arithmetic device.

If CMOS is used as the semiconductor device, the power consumption can be further reduced.

<Effect> According to the present invention, while waiting for the input of a command signal from the transceiver, that is, the time occupying a considerable part after the activation of the IC card, the small arithmetic device of the IC card is in the low power consumption mode. Since the transition is made, the power consumption of the IC card can be significantly reduced. Such low power consumption can be achieved at low cost without changing the device of the IC card. As described above, the power consumption of the IC card can be significantly reduced, so that the transceiver can be made portable by incorporating the power supply battery in the transceiver, and the use of the IC card system can be expanded.

Further, the application of the present invention is not limited to the type in which the power supply battery is built in the transceiver, but can also be applied to the case in which the power supply battery is built in the IC card. The effect of power consumption is that the life of the IC card can be extended. Furthermore, the present invention can also be applied to a type in which a power supply battery is not built in an IC card and a battery is not used as a power supply for a transceiver. This has the effect of reducing heat generation of the built-in semiconductor device and improving the durability of the IC card.

[Brief description of the drawings]

FIG. 1 is a block diagram of an IC card system according to one embodiment of the present invention, FIG. 2 is a flowchart of a main routine showing the operation of the IC card according to one embodiment of the present invention, and FIG.
Flowchart showing a transition routine to SLEEP MODE,
FIG. 4 is a flowchart showing a routine for transition to the ACTIVE MODE, FIG. 5 is a flowchart showing a command input routine, FIG. 6 is a flowchart showing a memory write routine, and FIG.
8th time chart explaining the mode status of the IC card
FIG. 9 is a time chart for explaining the operation at the time of writing to the memory. FIG. 9 is an explanatory diagram for the operation of the conventional IC card.
The figure is a time chart for explaining the operation of the MPU. 1 is an IC card, 2 is a small processing unit (MPU), 5 is a transceiver, 6 is an interface, and 7 is a computer.

 ────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Seiji Hirano 1-5-1, Taito, Taito-ku, Tokyo Toppan Printing Co., Ltd. (56) References JP-A-63-47812 (JP, A) JP-A-61 -285521 (JP, A) JP-A-61-5371 (JP, A) Patent 2601248 (JP, B2)

Claims (2)

(57) [Claims] An information processing mode which is connected to an external transceiver and performs information processing and information transmission and reception during access to a series of IC cards; An IC card having a power consumption mode and including a small arithmetic device capable of transitioning between these modes, wherein the small arithmetic device is shifted to a low power consumption mode after the small arithmetic device is activated. Low power consumption mode transition means; information processing mode transition means for causing the small arithmetic device to transition from the low power consumption mode to the information processing mode by an interrupt signal from the external transceiver; Means for returning the device to the low power consumption mode again. The small arithmetic device is connected to the information processing mode and the low power consumption during a series of accesses to the IC card. An IC card characterized by transitioning to the power saving mode at any time. 2. The IC card according to claim 1, wherein said small processing device uses communication data supplied from an external transceiver via an I / O line as an interrupt signal.