JP2560427B2 - IC card - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial field of application> The present invention relates to an IC card which is inserted into a transceiver which is an external device and which exchanges information with the transceiver.

<Prior Art> An IC card having a small arithmetic unit, a memory, and the like is used by exchanging information with a transmission / reception device such as a computer.

The operation of the conventional IC card will be described with reference to FIGS. 11 and 12.

First, in Fig. 12 showing the operation sequence of the IC card, when the IC card is inserted into the transceiver and the micro processing unit (MPU) in the IC card receives the command from the transceiver, this command is checked. Command processing is executed, and the result is output to the transceiver. In this operation, if there is an error in communication from the transceiver or an error in the command, an error message is output to the transceiver.

The operation of the MPU of the IC card is performed according to the cycle shown in FIG. That is, the IC card is inserted into the transceiver and the power supply voltage V
When cc and the clock signal CLK are respectively supplied and the reset signal ▲ ▼ is input to the MPU from the transceiver, M
PU performs a reset routine (AO) such as initialization, and sends an answer signal ANSWER TO RESE to notify the transmitter / receiver that transmission is possible.
Send T (A1). The MPU is a command signal from the transceiver (serial signal SI
O) is waited for (A2), and when a command signal is input, (A3) command processing is executed (A4) and the result is output to the transceiver (A5). When such a series of operations is completed, the MPU waits for the next command signal to be input from the transceiver (A2), and when the command signal is input (A3), the same processing as above is repeated.

<Problems to be Solved by the Invention> Here, if the transceiver for inserting the IC card is made portable, the use as a smart card system will be expanded. Is strongly desired.

In order to realize such a system, it is necessary to extend the life of a power supply battery built in the transceiver, and it is necessary to minimize consumption of power supplied from the transceiver to the IC card. Although it is conceivable to increase the capacity of the battery as this measure, there is a limit to the increase in battery capacity due to restrictions on the installation space of the battery, the need to reduce the weight of the transceiver, and the like. In addition, a method of changing a device incorporated in the IC card to a low-power-consumption type CMOS or the like can be considered, but there is a major problem in terms of IC card development cost, such as a new design of devices and the like.

The present invention has been made in view of the above-described conventional circumstances, and has as its object to rationally achieve a reduction in power consumption of an IC card without the above-described inconvenience.

<Means for Solving the Problem> The IC card of the present invention that achieves low power consumption is an IC card equipped with a small arithmetic unit having an information processing mode and a low power consumption mode, and is input from the outside at the time of hard reset. Low power consumption mode transition means for transitioning the small arithmetic unit from the information processing mode to the low power consumption mode after the small arithmetic unit is activated by the reset signal, and a reset signal externally input during the low power consumption mode. And an information processing mode transition unit that transitions the small computing device from the low power consumption mode to the information processing mode, and a low power consumption mode returning unit that transitions the small computing device to the low power consumption mode again after executing information processing. In addition, the second control signal can be identified in the low power consumption mode.

<Operation> A small arithmetic unit (CPU, M
PU) transits to the low power consumption mode by the low power consumption mode transition means. Then, the small-sized arithmetic unit in the low power consumption mode transitions from the low power consumption mode to the information processing mode by the information processing mode transition means and executes information processing based on an external command. The transition between the low power consumption mode and the information processing mode is directly or indirectly caused by an external control signal.

Therefore, when it is not necessary to activate the small arithmetic unit of the IC card, such as while waiting for the command signal from the transceiver to be input, this small arithmetic unit is transited to the low power consumption mode, Reduce power consumption.
As a result, the power consumption of the external transceiver, which is an external power supply, can be significantly reduced.

<Example> An IC card of the present invention will be specifically described based on an example.

First, the configuration of an IC card according to one embodiment of the present invention
It will be described with reference to the drawings.

The IC card 1 has a built-in EEPROM3 that can be written and read as a memory together with the MPU2, which is an ultra-compact arithmetic unit. It is connected.

It should be noted that an HD6301 series manufactured by Hitachi, Ltd. is used as the MPU 2 in this embodiment.

The transmitter / receiver 5 into which the IC card 1 is inserted can exchange data
It has an interface 6 and a personal computer 7 connected by an address bus. The transmitter / receiver 5 is a portable and handy device in which the interface 6 and the personal computer 7 are integrated, and has a battery (not shown) built therein as its power source.

In use, the IC card 1 is inserted into the interface 6, the power supply terminal Vcc and the ground terminal GND of the interface 6 are connected to the MPU 2 and the memory 3, respectively, and the power supply voltage is supplied from the transceiver 5 side to the MPU 2 and the memory 3. To supply. Also, the clock signal output terminal CLK and the reset signal output terminal ▲ ▼ of the interface 6 are each MPU.
2 is connected to the clock signal from the transceiver 5 to the MPU2,
A reset signal is input.

Then, the information signal input / output terminal SI of the interface 6
O is connected to the output terminal Tx and the input terminal Rx of the MPU 2, and information is exchanged between the transceiver 5 and the IC card 1. Also, the MPU2 ▲ ▼ terminal is the RDY / ▲ of the memory 3.
The IRQ interrupt to the MPU 2 is prohibited during the writing to the memory 3 as will be described later.

The operation of the IC card 1 having the above structure will be described with reference to the flowcharts shown in FIGS. 2 to 6, 8 and 9.

First, as shown in FIG.
When the card 1 is inserted into the transceiver 5 and the power supply voltage Vcc is supplied from the transceiver 5 and the clock signal CLK and the reset signal ▲ ▼ are input (step S1), the MPU2
Executes the reset routine shown in FIG. 3 (step S
2).

This reset routine determines the STBY PWR bit indicating whether or not the power supply voltage Vcc is applied before the reset signal ▲ ▼ is input (step S31), and based on this result, a hard reset routine or a command processing routine described later. A process of jumping to is performed (steps S32 and S33).

Just before inserting the IC card 1 into the transceiver 5 (step S2), the power supply voltage Vcc is not applied before the reset signal ▲ ▼ is input.
The Y PWR bit is "0", and the process jumps to the hard reset routine (step S32), and a hard reset such as initialization of MPU2 is executed (step S3). Then IC
An answer signal ANSWER TO RESET indicating that a command signal can be transmitted from the card 1 to the transceiver 5 is output (step S4), the MPU2 executes the standby mode transition routine (step S5), and the low power consumption in this embodiment is achieved. Transition to standby mode, which is the power mode. In the standby mode transition routine, as shown in FIG.
STBY PW for judgment when returning from standby mode
The R bit is set to "1" (step S41), STBY FLAG is set to "0", and the MPU2 is transited to the standby mode (step S42). In this standby mode, the information processing circuit of MPU2 is stopped and the power consumption is extremely low (about 1/60 of normal operation).

That is, a control signal from the outside (▲ from the transceiver
Signal) is input to the IC card 1, the MPU2 shifts to the standby mode after a series of internal processing (steps S2, S3, S4) based on this, and the step S5 executed by the MPU2 is performed. , S41, S42 constitute a low power consumption mode transition means for transitioning the MPU2 to the low power consumption mode due to a control signal from the outside.

On the other hand, answer signal ANSWER TO RESET in step S4
The interface 6 which has received from the IC card 1 confirms whether or not the IC card is normal by this (step S
6). Here, when the command input from the computer 7 is in the interface 6 (step S7),
Reset signal from interface 6 to IC card 1
▼ is output (step S8). As a result, the MPU 2 in the standby mode transitions to the information processing mode and executes the reset routine (step S9). In this reset routine, the power supply voltage is input before the reset signal is input.
Since Vcc is applied, the STBY PWR bit is "1", and the command processing routine is jumped to as shown in FIG. 3 (step S33).
Such MPU2 is a reset signal from the transceiver 5
The transition to the information processing mode is performed by ▼, and this step S8 constitutes an information processing mode transition means for transitioning the MPU 2 from the low power consumption mode to the information processing mode by an external control signal.

As described above, when the command is output from the interface 5 (step S10), the IC card 1 executes the command processing routine (step S11). That is, as shown in FIG. 5, when a command signal (a byte serial signal including data together with a command) is input from the SIO of the interface 6 to the IC card 1 (step S5
1) The MPU2 checks whether there is an error in this input communication (step S52), further checks the command (steps S53 and S54), executes the process according to the command (step S55), and sends / receives the result. Output to the machine 5 (steps S56 and S12). If there is an error in the input communication or command, error processing is executed (step S57) and an error message is output. While the processing result thus input to the interface 6 is output to the computer 7 (steps S14 and S15), the MPU2 which has output the processing result.
Executes the standby mode transition routine shown in FIG. 4 and transits to the standby mode again (step S1
3). This transition to the standby mode is performed after a series of internal processing (command processing) based on an external control signal (command signal from the transceiver) input to the IC card 1, Steps S13, S41, and S42 executed by the MPU2 constitute a low power consumption mode transition means for transitioning the MPU2 to the low power consumption mode due to a control signal from the outside.

That is, according to the above series of operations, as shown in FIG. 6, the reset signal ▲ ▼ from the interface 6
Causes the MPU2 of the IC card in the standby mode to transition to the information processing mode, and after performing the command processing resulting from the command signal from the interface 6, the MPU2 of the IC card 1 in the information processing mode transitions to the standby mode. . Therefore, while the information processing is not performed, the MPU 2 is in a state where the power consumption is extremely low, so that the power consumption can be prevented.

Here, in the IC card of the present embodiment, when the writing process to the memory 3 is executed in the command process (step S55), as shown in FIGS. 7 to 10,
A transition to sleep mode, which is one of the low power consumption modes of MPU2, is performed. That is, the MPU 2 sends a control signal to the memory 3 to instruct writing of data and supply an address and data (step S71). And
The SLEEW MODE transition routine shown in FIG. 8 is executed (step S72), and the MPU 2 enters the state in which the interrupt to the IRQ is permitted and then executes the SLEEP instruction to transit to the sleep mode (step S82).

In this way, MPU2 transitions to sleep mode and memory 3
RD of the memory 3 while the writing process of
Y / ▲ ▼ becomes "L" level, which is inverted by the inverter 8 and supplied to the IRQ of the MPU 2 as "H" level, which holds the interrupt to IRQ enabled.

That is, as shown in FIG. 10, the MPU 2 is held in the sleep mode in which the power consumption is small while the memory 3 is being written.

Then, in the state in which the MPU2 has transitioned to the sleep mode by the transition command to the sleep mode, the MPU2 determines whether the IRQ interrupt signal is input to the IRQ child from the memory 3 (step S73), and the IRQ interrupt signal is input. If so, the information processing mode transition routine is executed (step S7
4), The information processing circuit of MPU2 transits to the activated information processing mode. In the information processing mode transition routine,
As shown in the figure, when the IRQ interrupt signal is received, the IRQ pin of MPU2 is masked to make it uninterruptible by the input of the IRQ interrupt signal (step S91), and the stack pointer S
A prescribed value is set in P (step S92), and the address of the command input routine shown in FIG. 5 is set in the program counter PC (step S93).

In the state where the MPU 2 has transitioned to the information processing mode in step S5, the MPU 2 executes processing based on the command signal input from the SIO of the interface 6 (FIG. 5).

It should be noted that in the above embodiment, MP is caused by a control signal from the outside.
Although the example in which U2 transitions to the low power consumption mode (standby mode) after executing internal processing is shown, the control signal from the outside is directly input to MPU2, and this control signal directly consumes low power consumption of MPU2. You may make it change to a power mode.

In addition, as a low power consumption mode, the HD6301 of the above embodiment is used.
In the semiconductor device of the system, the standby mode and the sleep mode are used, but in addition to this, various settings such as a no-operation mode can be set according to the type of the semiconductor device forming the small arithmetic unit. Also, as a control signal, in the HD6301 type semiconductor device, a signal that realizes branching to a specific address of the program counter by level transition such as a reset signal and an IRQ signal is used, and this control signal is also a semiconductor that constitutes a small arithmetic unit. Various settings can be made according to the type of device.

Further, if CMOS is used as the semiconductor device, power consumption can be further reduced.

<Effect> According to the present invention, based on an instruction of a control signal from the outside (transceiver), the small arithmetic unit of the IC card is in a state of transition to the information processing mode or the low power consumption mode. When it is not necessary to activate the small arithmetic unit such as while waiting for the command signal of, the IC card can be transited to the low power consumption mode to significantly reduce the power consumption. Such low power consumption can be achieved at low cost without changing the device of the IC card. As a result of greatly reducing the power consumption of the IC card in this way, it is possible to incorporate the power supply battery in the transceiver and make the transceiver portable.
The applications of the IC card system can be expanded.

Further, the application of the present invention is not limited to the type in which the power supply battery is built in the transceiver, and can be applied to the case where the power supply battery is built in the IC card. There is an effect that the life of the IC card can be extended by reducing the power consumption. Furthermore, the present invention can also be applied to a type in which a power supply battery is not built in an IC card and a battery is not used as a power supply for a transceiver. This has the effect of reducing heat generation of the built-in semiconductor device and improving the durability of the IC card.

[Brief description of drawings]

FIG. 1 is a block diagram of an IC card system according to an embodiment of the present invention, FIG. 2 is a flowchart of a main routine showing the operation of an IC card according to an embodiment of the present invention, and FIG. FIG. 4 is a flowchart showing the transition routine to the standby mode, FIG. 5 is a flowchart showing the command processing routine, FIG. 6 is a time chart explaining the operation of the IC card, and FIG. 7 is a memory. FIG. 8 is a flow chart showing a sleep mode transition routine, FIG. 9 is a flow chart showing a transition routine to the information processing mode, and FIG. 10 is a flow chart showing the operation during memory writing. Time chart, 11th
The figure shows the operation of the conventional IC card, and Fig. 12 shows the MPU.
3 is a time chart for explaining the operation of FIG. 1 is an IC card, 2 is a small arithmetic unit (MPU), 3 is a memory, 5 is a transceiver, 6 is an interface, and 7 is a computer.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-54-104272 (JP, A) JP-A-61-285521 (JP, A) JP-A-59-90278 (JP, A)

Claims (1)

(57) [Claims] 1. An IC card having a small arithmetic unit having an information processing mode and low power consumption, wherein the small arithmetic unit is activated after being activated by a reset signal input from outside during a hard reset. Low power consumption mode transition means for transitioning from the information processing mode to the low power consumption mode, and an information processing mode for transitioning the small arithmetic unit from the low power consumption mode to the information processing mode by a reset signal input from the outside in the low power consumption mode It is provided with a transition means and a low power consumption mode returning means for transitioning the small arithmetic unit to the low power consumption mode again after executing the information processing, and in the low power consumption mode, the second control signal can be identified. Is characterized by
IC card.