JPH0776984B2 - IC card - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial field of application> The present invention relates to an IC card which is inserted into a transceiver which is an external device and which exchanges information with the transceiver.

<Prior Art> An IC card including a small arithmetic unit, a memory and the like is used by exchanging information with a transmission / reception device such as a computer.

The operation of the conventional IC card will be described with reference to FIGS. 9 and 10.

First, in FIG. 9 showing the operation sequence of the IC card, when the IC card is inserted into the transceiver and the micro processing unit (MPU) in the IC card receives the command from the transceiver, this command is checked. Command processing is executed, and the result is output to the transceiver. In this operation, if there is an error in communication from the transceiver or if there is an error in the command, an error message is output to the transceiver.

Then, the MPU of the IC card is performed according to the cycle shown in FIG. That is, when the IC card is inserted in the transceiver, the power supply voltage Vcc and the clock signal CLK are respectively supplied from the transceiver to the MPU of the IC card, and the reset signal RST (over bar) is input from the transceiver to the MPU. ,
The MPU performs a reset routine (AO) such as initialization, and sends an answer signal to the transceiver to notify the transmitter that it can be sent ANSWER TO RESE
Send T (A1). The MPU is a command signal from the transceiver (serial signal SI
Waiting for input of (O) (A2), when a command signal is input, (A3) command processing is executed (A4) and the result is output to the transceiver (A5). When such a series of operations is completed, the MPU waits for the next command signal to be input from the transceiver (A2), and when the command signal is input (A3), the same processing as above is repeated.

<Problems to be solved by the invention> Here, if a transceiver for inserting an IC card can be carried around freely, its application will expand as an IC card system. It is strongly desired to change.

In order to realize such a system, it is necessary to extend the life of the power supply battery built in the transceiver, and it is necessary to suppress the power consumption supplied from the transceiver to the IC card as much as possible. Although it is conceivable to increase the capacity of the battery as this measure, there is a limit to the increase in battery capacity due to restrictions on the installation space of the battery, the need to reduce the weight of the transceiver, and the like.
In addition, the device built in the IC card is a low power consumption type CM.
It is possible to change to OS etc., but there is a big problem in terms of IC card development cost such as new design of devices.

The present invention has been made in view of the above conventional circumstances, and an object of the present invention is to rationally achieve low power consumption of an IC card without the above-mentioned problems.

<Means for Solving the Problem> The IC card of the present invention that achieves low power consumption includes a small arithmetic device having an information processing mode and a low power consumption mode, and a memory capable of writing information from the small arithmetic device. In an IC card comprising: a low power consumption mode transition means for transitioning the small computing device to a low power consumption mode after instructing to write information to the memory; and the small computing device after completion of writing information in the memory. An information processing mode transition means for transitioning from the low power consumption mode to the information processing mode is provided. Further, the present invention is
In an IC card in which the small arithmetic unit having the information processing mode and the low power consumption mode and a memory in which information from the small arithmetic unit can be written, and the small arithmetic unit is operated by an external command, The power mode transition means, in the state of waiting for the input of the external command,
3. The information processing mode transition means causes the small computing device to transition to a low power consumption mode, and the information processing mode transition means transitions the small computing device from the low power consumption mode to the information processing mode by inputting an external command. The IC card described in.

<Operation> Small arithmetic unit (CPU, MP
U) makes a transition to the low power consumption mode by the low power consumption mode transition means after instructing to write information in the memory,
After the writing of information to the memory is completed, the information processing mode transition means transitions from the low power consumption mode to the information processing mode to execute information processing based on the command from the transceiver. That is, while waiting for the information writing process of the memory, the small arithmetic unit of the IC card is in the state of transitioning to the low power consumption mode, and the power consumption during this period is reduced. Further, in the IC card according to the present invention, the constant power consumption mode transition means transitions the small arithmetic unit to the low power consumption mode in the state of waiting for the input of the external command. As a result, power consumption is reduced while waiting for an external command input.

<Example> The IC card of the present invention will be specifically described based on an example.

First, the structure of an IC card according to an embodiment of the present invention will be described with reference to FIG.

The IC card 1 has a built-in EEPROM3 that can be written and read as a memory together with the MPU2 which is a micro-computing device. The MPU2 and EEPROM3 are multi-bit address signal line A.
They are connected by n, a data signal line D8, and a control signal line CTRL.

As the MPU 2 of this embodiment, the HD6301 series manufactured by Hitachi, Ltd. is used.

The transceiver 5 into which the IC card 1 is inserted has an interface 6 and a personal computer 7 which are connected to each other by a data / address bus. The transceiver 5 is a handy one in which the interface 6 and the personal computer 7 can be carried together as a unit, and has a battery (not shown) built therein as its power source.

At the time of use, the IC card 1 is inserted into the interface 6, and the power supply terminal Vcc and the ground terminal G of the interface 6
NDs are connected to the MPU 2 and the memory 3, respectively, and a power supply voltage is supplied from the transceiver 5 side to the MPU 2 and the memory 3. Also, the clock signal output terminal of the interface 6
The CLK and the reset signal output terminal RST (overbar) are connected to the MPU2, respectively, and the clock signal and the reset signal are input to the MPU2 from the transceiver 5 side. The information signal input / output terminal SIO of the interface 6 is the output terminal T of the MPU2.
X, input terminal RX, interrupt signal input terminal IRQ (over
Information is exchanged between the transceiver 5 and the IC card 1. The IRQ (over bar) terminal of the MPU2 is connected to the RDY / BUSY (over bar) terminal of the memory 3, and while writing to the memory 3, MP
IRQ interrupt to U2 is disabled.

The operation of the IC card 1 having the above structure will be described with reference to the flowcharts shown in FIGS.

First, as shown in FIG. 2 showing the main routine, the IC card 1 is inserted into the transceiver 5, the power supply voltage Vcc is supplied from the transceiver 5, and the clock signal CLK and the reset signal RST (overbar) are supplied. Is input, the MPU2 performs a hard reset routine such as initialization (step S
1) An answer signal ANSWER TO RESET is output to notify the transceiver 5 that a command signal can be transmitted (step S2).

Next, the MPU 2 executes the SLEEP MODE transition routine (step S3), and transits to the sleep mode which is the low power consumption mode in this embodiment. In the SLEEP MODE transition routine, as shown in FIG. 3, the IRQ (over bar) terminal of MPU2 is activated to enable interruption by inputting an IRQ interrupt signal (step S21), and the information processing circuit of MPU2 is stopped. Then, it commands the transition to sleep mode with extremely low power consumption (about 1/6 of normal operation) (sleeve S22).

When the MPU2 transitions to the sleep mode due to the transition instruction to the sleep mode, the MPU2 has an IRQ (over bar).
It is determined whether the IRQ interrupt signal is input from the transceiver 5 to the terminal (step S4), and when the IRQ interrupt signal is input, the ACTIVE MODE transition routine is executed (step S5), and the information processing circuit of the MPU2 is activated. Transition to the activated active mode (information processing mode). ACTIVE MOD
In the E transition routine, as shown in Fig. 4, the IRQ (over bar) terminal of MPU2 is masked in response to the IRQ interrupt signal, and the IRQ interrupt signal is input to make it uninterruptible (step S31). A specified value is set in the pointer SP (step S32), and the address of the command input routine shown in FIG. 5 is set in the program counter PC (step S33).

In the state where the MPU2 has transitioned to the information processing mode in step S5, the MPU2 executes processing based on the command signal (byte-based serial signal that also includes data with the command) input from the SIO of the interface 6 (step S).
6).

After this information processing is completed, the SLEEP MODE transition routine is executed to transit to the sleep mode again (step S
7). That is, as shown in FIG. 7, after receiving a command (A3), processing this (A4), and outputting the processing result (A5), until the next command is input (interface 6 and (Time required for communication with the computer 7), the MPU 2 transits to the sleep mode with low power consumption and is held.

In the command processing of step S6, the processing shown in FIGS. 5 and 6 is executed. That is, when a command signal is input (step S41), it is checked whether or not there is an error in this input communication (step S42), the command is further checked (steps S43, 44), and processing according to the command is executed. (Step S45) and outputs the result to the transceiver 5 (step S46). If there is an error in the input communication or command, error processing is executed (step
S47), an error message is output.

Further, when the writing process to the memory 3 is executed in the command process (step S45), a transition to the sleep mode is performed as shown in FIGS. 6 and 8. That is, the MPU 2 sends a control signal to the memory 3 to instruct writing of data and supply an address and data (step S51). And SLEEP shown in FIG.
The MODE transition routine is executed (step S52), and the MPU 2 transitions to the sleep mode. When the writing process of the memory 3 is being executed, RDY / BUSY (over
(H) level becomes "L" level, which is inverted by the inverter 8 and supplied to the IRQ of MPU2 as "H" level to hold the IRQ interrupt disabled state. In this way, when the writing to the memory 3 is completed while the MPU2 is in the sleep mode, RDY / BUSY (over bar) of the memory 3 becomes "H" level, which is inverted by the inverter 8 and becomes the IRQ of the MPU2. It is supplied as "L" level, an interrupt to IRQ occurs (step S53), and ACT shown in FIG.
The IVE MODE transition routine is executed to transit to the active mode (step S54). That is, the MPU 2 is held in the sleep mode with low power consumption while the memory 3 is being written. Steps S51 and S52 executed by the MPU2 constitute low power consumption mode transition means for transitioning the MPU2 to the low power consumption mode after instructing the memory 3 to write information. Further, the S53, S54 and RDY / BUSY (over bar) signals executed by the MPU2 constitute an information processing mode transition means for transitioning the MPU2 to the information processing mode after the information writing processing of the memory 3 is completed. .

As the low power consumption mode, the sleep mode was used in the semiconductor device of the HD6301 system of the above-described embodiment, but in addition to this, various settings such as a no operation mode may be set according to the type of the semiconductor device forming the small arithmetic unit. You can

Further, if CMOS is used as the semiconductor device, power consumption can be further reduced.

Also, the writable memory is not limited to EEPROM,
Various memories such as EPROM and RAM can be used.

<Effect> According to the present invention, the small arithmetic unit of the IC card transits to the low power consumption mode while waiting for the small arithmetic unit to write information to the memory and wait for the memory to finish the information writing process. As a result, the power consumption of the IC card can be reduced. Then, such low power consumption can be achieved at low cost without changing the device of the IC card. As a result of reducing the power consumption of the IC card in this way, the power supply battery can be built into the transceiver to make the transceiver portable, and the applications of the IC card system can be expanded.

Further, the application of the present invention is not limited to the type in which the power supply battery is built in the transceiver, and can be applied to the case where the power supply battery is built in the IC card. There is an effect that the life of the IC card can be extended by reducing the power consumption. Furthermore, the present invention can also be applied to a type in which a battery is not used as a power source for a transceiver without incorporating a power source battery in the IC card, and in this case, the IC card is reduced in power consumption. The heat generation of the built-in semiconductor device can be reduced, and the durability of the IC card can be improved.

[Brief description of drawings]

FIG. 1 is a block diagram of an IC card system according to an embodiment of the present invention, FIG. 2 is a flow chart of a main routine showing the operation of an IC card according to an embodiment of the present invention, and FIG.
FIG. 4 is a flowchart showing a transition routine to SLEEP MODE, FIG. 4 is a flowchart showing a transition routine to ACTIVE MODE, FIG. 5 is a flowchart showing a command input routine, FIG. 6 is a flowchart showing a memory write routine, and FIG. Figure 7 shows the IC for the command signal
8 is a time chart explaining the mode state of the card, FIG. 8 is a time chart explaining the operation at the time of writing to the memory, FIG. 9 is an explanatory view of the operation of the conventional IC card, and FIG. 10 is the operation of the MPU. It is a time chart. 1 is an IC card, 2 is a small arithmetic unit (MPU), 5 is a transceiver, 6 is an interface, and 7 is a computer.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-61-5371 (JP, A) JP-A-62-169219 (JP, A) Jitsukaihei 1-100254 (JP, U)

Claims (2)

[Claims] 1. An IC card having a small arithmetic unit having an information processing mode and a low power consumption mode, and a memory capable of writing information from the small arithmetic unit, instructing writing of information to the memory. Low-power-consumption mode transition means for transitioning the small-sized arithmetic device to a low-power consumption mode later, and information processing mode transition means for transitioning the small-sized arithmetic device from the low-power consumption mode to the information processing mode after completion of writing information in the memory An IC card characterized by having. 2. An IC card comprising a small arithmetic unit having an information processing mode and a low power consumption mode, and a memory capable of writing information from the small arithmetic unit, wherein the small arithmetic unit operates by an external command. The low power consumption mode transition means transitions the small computing device to the low power consumption mode in a state of waiting for the input of the external command, and the information processing mode transition means causes the small computation operation by inputting an external command. The IC card according to claim 1, which shifts the device from a low power consumption mode to an information processing mode.