CN108827505B - High-precision stress sensing system based on Michelson interference structure - Google Patents
High-precision stress sensing system based on Michelson interference structure Download PDFInfo
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- 239000013307 optical fiber Substances 0.000 claims abstract description 27
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- 238000005086 pumping Methods 0.000 claims 1
- 239000000835 fiber Substances 0.000 abstract description 23
- 230000008859 change Effects 0.000 description 16
- 230000035882 stress Effects 0.000 description 15
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- G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
- G01L1/00—Measuring force or stress, in general
- G01L1/24—Measuring force or stress, in general by measuring variations of optical properties of material when it is stressed, e.g. by photoelastic stress analysis using infrared, visible light, ultraviolet
- G01L1/242—Measuring force or stress, in general by measuring variations of optical properties of material when it is stressed, e.g. by photoelastic stress analysis using infrared, visible light, ultraviolet the material being an optical fibre
- G01L1/246—Measuring force or stress, in general by measuring variations of optical properties of material when it is stressed, e.g. by photoelastic stress analysis using infrared, visible light, ultraviolet the material being an optical fibre using integrated gratings, e.g. Bragg gratings
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Abstract
The invention discloses a high-precision stress sensing system based on a Michelson interference structure, and belongs to the technical field of optical fiber sensors. The main structure of the device comprises a pump source (1), a light wavelength division multiplexer (3), an erbium-doped fiber (3) and the like. The invention uses the sine signal as the modulation signal, does not generate high-frequency interference, and has the characteristics of more reliable work, high sensing precision, wide application range and the like.
Description
Technical Field
The invention belongs to the technical field of optical fiber sensors, and particularly relates to a high-precision stress sensing system based on a Michelson interference structure.
Background
The Bragg fiber grating (FBG) has the advantages of electromagnetic interference resistance, chemical corrosion resistance, small transmission loss, small volume, light weight, convenience for large-scale production and the like, and is widely applied to the technical field of sensing. At present, the stress sensor has wide application in the technical field of engineering. Particularly, in emerging fields of nanoparticle interaction, cell mechanics and the like, the micro-stress sensor has urgent requirements, and the micro-stress sensor is not separated from the bridge, the tunnel and the building structure for safety monitoring. Due to the advantages of the fiber Bragg grating, the stress sensor formed by the fiber Bragg grating has higher reliability compared with other sensors, and is more suitable for being used under severe conditions.
The closest prior art to the present invention is the "research and implementation of fiber grating sensing system" by doctor graduation thesis of bang-kai university bang, which provides a fiber bragg grating sensing system based on unbalanced michelson interferometric demodulation technology (see page 24, fig. 3.4 of the document), the fiber sensing system adopts unbalanced michelson interferometric principle, one of the two arms of the interferometer changes the length of the arm by using a modulation signal provided by piezoelectric ceramics (PZT), so as to change the output light intensity of the interferometer, the output light intensity of the interferometer is in cosine function law with the change of PZT modulation signal, if an ideal sawtooth wave is used as the modulation signal of PZT, the output of the fiber sensing system is directly cosine wave. The fiber sensing system senses the change of stress or temperature at a measuring point through the Bragg grating and reflects the change of the central wavelength of the reflection spectrum, the change of the central wavelength is reflected as the change of the phase of an output cosine wave after passing through the unbalanced Michelson interferometer, and finally the change of the central wavelength of the reflection spectrum of the Bragg grating can be reflected by comparing the phase of the cosine wave with the phase of the sawtooth wave, so that the change of the external stress is measured.
In the above-mentioned sensing system, there is the biggest problem that the sawtooth wave cannot be absolutely ideal, the ideal sawtooth wave falling edge is vertical, and the actual sawtooth wave falling edge always has a certain slope, so that the cosine wave output from the subsequent stage has a high-frequency jitter, and in order to eliminate the high-frequency jitter signal, a band-pass filter (BPF) must be used in the demodulation circuit of the subsequent stage to filter out the direct-current component and the high-frequency component. However, on the one hand, the high frequency component itself affects the phase detection of the cosine wave (the position of the zero-crossing point changes); on the other hand, the frequency of the high-frequency jitter signal is influenced by various factors such as the performance of a PZT driving circuit, the hysteresis characteristic of PZT (the electrical characteristic of PZT is equivalent to a capacitor, and the voltage at two ends of the PZT cannot jump, so that the falling edge of a sawtooth wave cannot be infinitely short) and the elasticity of an optical fiber, the frequency is variable, and the high-frequency jitter signal is difficult to filter; furthermore, when using a filter, in addition to the amplitude-frequency characteristic of the output signal, the phase-frequency characteristic of the signal is also affected, i.e. the filtering is affected by the phase around the cut-off frequency, which is very disadvantageous for fiber sensors that rely on phase changes to measure stress changes. Therefore, further improvements are needed in the existing fiber bragg grating stress sensors.
Disclosure of Invention
In order to overcome the defects of the existing Bragg fiber grating stress sensor, the invention provides a high-precision stress sensing system based on a Michelson interference structure, which uses a sinusoidal signal as a PZT driving signal, so that the generation of high-frequency interference signals is avoided, and a filter is not needed when the received signals are processed, so that the influence of the filtering process on the phase is avoided.
The purpose of the invention is realized by the following technical scheme:
a high-precision stress sensing system based on a Michelson interference structure structurally comprises a pump source 1, an optical wavelength division multiplexer 2, a delay line adjustable optical fiber 11, a first optical isolator 10, a second optical isolator, a level conversion chip 12, a second optical isolator, a third optical isolator, a fourth optical isolator, a fifth optical isolator, a sixth optical isolator, a control end of the delay line adjustable optical fiber 11, an output end of the level conversion chip 12 and; the output end of the first optical isolator 10 is connected with the optical input end of the optical filter 9, the electric control end of the optical filter 9 is connected with the single chip microcomputer 17, the optical output end of the optical filter 9 is connected with the first port of the optical circulator 6, the second port of the optical circulator 6 is connected with one end of the Bragg grating group 8, the third port of the optical circulator 6 is connected with the input end of the first optical coupler 5, 90% of the output end of the first optical coupler 5 is connected with the input end of the second optical isolator 4, the output end of the second optical isolator 4 is connected with one end of the erbium-doped optical fiber 3, and the other end of the erbium-doped optical fiber 3 is connected with the common end of the wavelength division multiplexer 2; the output of 10% of the output end of the first optical coupler 5 is connected with the input end of the second optical coupler 7, one output end of the second optical coupler 7 is connected with the input end of the second Faraday rotator mirror 24, the other output end of the second optical coupler 7 is connected with one end of the optical fiber wound on the piezoelectric ceramics 22, and the other end of the optical fiber wound on the piezoelectric ceramics 22 is connected with the input end of the first Faraday rotator mirror 23;
the structure is characterized in that the output end of the second optical coupler 7 is connected with the input end of a photoelectric conversion circuit 25, the output end of the photoelectric conversion circuit 25 is connected with the input end of a function conversion circuit 26, the output end of the function conversion circuit 26 is connected with one input end of an adaptive amplitude normalization circuit 27, the output end of the adaptive amplitude normalization circuit 27 is connected with one input end of a phase comparison circuit 28, and the output end of the phase comparison circuit 28 is connected with the single chip microcomputer 17; the frequency output end of the controllable frequency source 20 is connected with the single chip microcomputer 17, the signal output end is connected with the other input end of the phase comparison circuit 28 and is also connected with the input end of the PZT driving circuit 21, and the output end of the PZT driving circuit 21 is connected with the control end of the piezoelectric ceramic 22; the output end of the constant current source circuit 14 is connected with the thermistor 15, the thermistor 15 is connected with the input end of the analog-to-digital conversion circuit 16, and the output end of the analog-to-digital conversion circuit 16 is connected with the singlechip 17; the singlechip 17 is also connected with the input key 13, the serial port communication module 18 and the display screen 19 respectively;
the structure of the function transformation circuit 26 is that one end of a capacitor C3 is connected with the pin 12 of the trigonometric function converter U1 and one end of a resistor R2, and the other end of the capacitor C3 is used as the input end of the function transformation circuit 26, is recorded as a port ACOS _ in, and is connected with the output end of the photoelectric conversion circuit 25; the other end of the resistor R2 is grounded; pins 2, 3, 4, 5, 8, 11 and 13 of the trigonometric function converter U1 are grounded, pins 9 and 10 are connected with one end of a capacitor C2 and a-12V power supply, and the other end of the capacitor C2 is grounded; pin 6 of the trigonometric function converter U1 is connected with pin 7, pin 16 is connected with the +12V power supply and one end of the capacitor C1, and the other end of the capacitor C1 is grounded; pin 1 of the trigonometric function converter U1 is connected to the sliding end of the sliding rheostat W1, one end of the sliding rheostat W1 is connected to one end of the resistor R1, the other end of the resistor R1 is connected to pin 14 of the trigonometric function converter U1, and the sliding end of the sliding rheostat W1, which is used as the output end of the function transformation circuit 26, is recorded as port ACOS _ out and is connected to the input end of the adaptive amplitude normalization circuit 27; the model of the trigonometric function converter U1 is AD 639;
the adaptive amplitude normalization circuit 27 has a structure that one end of a capacitor C9 is connected with one end of a resistor R3 and a pin 3 of a chip U2, the other end of the resistor R3 is grounded, and the other end of the capacitor C9 is used as an input end of the adaptive amplitude normalization circuit 27, is recorded as a port ADAPT _ in, and is connected with a port ACOS _ out of a function conversion circuit 26; pin 1, pin 7, pin 8 and pin 14 of the chip U2 are all grounded, pin 2 and pin 4 are both connected with a +5V power supply, pin 11 is connected with pin 12 and is connected with one end of a capacitor C5 and the +5V power supply, and the other end of the capacitor C5 is grounded; pin 13 of the chip U2 is connected with one end of a capacitor C4, and the other end of the capacitor C4 is grounded; pin 9 of the chip U2 is connected with one end of a capacitor C6, and the other end of the capacitor C6 is grounded; pin 5 of the chip U2 is connected with one end of a resistor R12 and a resistor R11, the other end of the resistor R12 is grounded, the other end of the resistor R11 is connected with the output end of the operational amplifier U4 and one end of a capacitor C8, the positive power supply end of the operational amplifier U8 is connected with a +5V power supply, and the negative power supply end is grounded; the other end of the capacitor C8 is connected with one end of a resistor R10, and the other end of the resistor R10 is connected with the non-inverting input end of the operational amplifier U4; the inverting input end of the operational amplifier U4 is connected with the sliding end of the sliding rheostat W3, one end of the sliding rheostat W3 is connected with a +5V power supply, and the other end of the sliding rheostat W3 is grounded; one end of a capacitor C7 is connected with one end of a resistor R9 and the non-inverting input end of an operational amplifier U4, the other end of the capacitor C7 is grounded, the other end of the resistor R9 is connected with one end of a resistor R7 and the output end of an operational amplifier U3, and the other end of the resistor R7 is connected with the inverting input end of the operational amplifier U3; one end of the resistor R8 is connected with the non-inverting input end of the operational amplifier U3, and the other end of the resistor R8 is grounded; the positive power supply end of the operational amplifier U3 is connected with a +5V power supply, and the negative power supply end is grounded; pin 10 of the chip U2, which is used as the output terminal of the adaptive amplitude normalization circuit 27 and is denoted as port ADAPT _ out, is connected to one input terminal of the phase comparison circuit 28; pin 10 of the chip U2 is connected with the anode of the diode D1, the cathode of the diode D1 is connected with one end of the resistor R4, the other end of the resistor R4 is connected with one end of the resistor R5 and the inverting input end of the operational amplifier U3, the other end of the resistor R5 is connected with the anode of the diode D2, and the cathode of the diode D2 is connected with the sliding end of the sliding rheostat W2; one end of the slide rheostat W2 is connected with the cathode of the diode D3 and is grounded, the other end of the slide rheostat W2 is connected with one end of the resistor R6 and the anode of the diode D3, and the other end of the resistor R6 is connected with a-5V power supply; the chip U2 is a variable gain amplifier chip, and the model is AD 8367;
the structure of the PHASE comparison circuit 28 is that one end of a capacitor C10 is connected with the non-inverting input end of the operational amplifier U5 and one end of a resistor R13, and the other end of the capacitor C10 is used as one input end of the PHASE comparison circuit 28, is recorded as a port PHASE _ in1, and is connected with a port ADAPT _ out of the adaptive amplitude normalization circuit 27; the other end of the resistor R13 is grounded; the positive power supply end of the operational amplifier U5 is connected with a +5V power supply, the negative power supply end is grounded, the inverted input end is grounded, and the output end is connected with the CLK end of the D flip-flop U6A; the D port of the D flip-flop U6A is grounded; one end of the capacitor C11 is grounded, and the other end of the capacitor C11 is connected with the PR end of the D flip-flop U6A; one end of the resistor R14 is connected with the PR end of the D flip-flop U6A, and the other end is connected with the Q end of the D flip-flop U6A; the CLR end of the D flip-flop U6A is connected with a +5V power supply, and the Q end of the D flip-flop U6A is not connected with the PR end of the D flip-flop U8A; one end of the capacitor C12 is connected to the non-inverting input terminal of the operational amplifier U7 and one end of the resistor R15, and the other end of the capacitor C12 is used as the other input terminal of the PHASE comparator circuit 28, is recorded as a port PHASE _ in2, and is connected to a port SinM _ out of the controllable frequency source 20; the other end of the resistor R15 is grounded; the positive power supply end of the operational amplifier U7 is connected with a +5V power supply, the negative power supply end is grounded, the inverted input end is grounded, and the output end is connected with the CLK end of the D flip-flop U6B; the D port of the D flip-flop U6B is grounded; one end of the capacitor C13 is grounded, and the other end of the capacitor C13 is connected with the PR end of the D flip-flop U6B; one end of the resistor R16 is connected with the PR end of the D flip-flop U6B, and the other end is connected with the Q end of the D flip-flop U6B; the CLR end of the D trigger U6B is connected with a +5V power supply, and the Q end of the D trigger U6B is not connected with the CLR end of the D trigger U8A; the D end and the CLK end of the D flip-flop U8A are both grounded, and the Q end is used as the output end of the PHASE comparison circuit 28 and is marked as a port PHASE _ out;
the controllable frequency source 20 has a structure that one end of a resistor R21 is connected with the non-inverting input end of the operational amplifier U10, and the other end is grounded; one end of the capacitor C16 is connected with the non-inverting input end of the operational amplifier U10, the other end of the capacitor C16 is used as the signal output end of the controllable frequency source 20, is recorded as a port SinM _ out, is connected with a port PHASE _ in2 of the PHASE comparison circuit 28, and is also connected with the input end of the PZT driving circuit 21; one end of the resistor R20 is connected with the inverting input end of the operational amplifier U10, and the other end is grounded; the positive power supply end of the operational amplifier U10 is connected with a +5V power supply, the negative power supply end is grounded, the output end is used as the frequency output end of the controllable frequency source 20, is marked as a port FrqM _ out and is connected with the single chip microcomputer 17; one end of the resistor R19 is connected with the inverting input end of the operational amplifier U9, and the other end is connected with a port SinM _ out; one end of the resistor R17 is connected with the inverting input end of the operational amplifier U9, and the other end is connected with the anode of the electrolytic capacitor C15; the negative electrode of the electrolytic capacitor C15 is grounded; one end of the resistor R18 is connected with the non-inverting input end of the operational amplifier U9, and the other end is grounded; the positive power supply of the operational amplifier U9 is connected with a +5V power supply, the negative power supply is connected with a-5V power supply, and the output end of the operational amplifier U9 is connected with the anode of the electrolytic capacitor C14; the anode of the electrolytic capacitor C14 is connected with a port SinM _ out, and the cathode is grounded; one end of the adjustable inductor L1 is connected with the anode of the electrolytic capacitor C14, and the other end is connected with the anode of the electrolytic capacitor C15;
the pump source 1 is preferably a 980nm laser source.
The thermistor 15 is preferably a 10k Ω @25 ℃ negative temperature coefficient thermistor.
Has the advantages that:
1. the invention uses the sine signal as the modulation signal, and compared with the prior art which uses the sawtooth wave signal for modulation, the invention can not generate high-frequency interference, so that the sensing system can work more reliably.
2. The invention uses the self-adaptive amplitude normalization circuit to automatically convert the amplitude of the demodulated signal into the amplitude suitable for the phase comparison circuit to compare, so that the phase detection error is smaller, and the sensing precision of the whole sensing system is effectively improved.
3. Compared with the prior art, the frequency of the modulation signal is adjustable, so that the sensing system has wider application occasions.
4. The invention has the function of temperature compensation and effectively overcomes the influence of the ambient temperature on the sensing parameters.
Drawings
Fig. 1 is an overall schematic block diagram of the present invention.
Fig. 2 is a schematic circuit diagram of a function conversion circuit used in the present invention.
Fig. 3 is a schematic circuit diagram of an adaptive amplitude normalization circuit used in the present invention.
Fig. 4 is a schematic circuit diagram of a phase comparison circuit used in the present invention.
Fig. 5 is a schematic circuit diagram of a controllable frequency source for use with the present invention.
Detailed Description
The operation principle of the present invention is further explained with reference to the drawings, and it should be understood that the component parameters marked in the drawings are the preferred parameters used in the following embodiments, and do not limit the scope of the present invention.
EXAMPLE 1 Overall Structure of the invention
As shown in fig. 1, the overall structure of the present invention includes that a pump source 1(980nm laser, maximum output power of 1W) is connected to a 980nm end of an optical wavelength division multiplexer 2(980/1550nm wavelength division multiplexer), a 1550nm end of the optical wavelength division multiplexer 2 is connected to one end of a delay line tunable optical fiber 11 (VDL-40-15-S9-1-FA type electric optical fiber delay line of the mitsunchawa star optical technology ltd.), the other end of the delay line tunable optical fiber 11 is connected to an input end of a first optical isolator 10(1550nm polarization independent optical isolator), a control end of the delay line tunable optical fiber 11 is connected to an output port of a level conversion chip 12, and an input end of the level conversion chip 12 is connected to a single chip microcomputer 17(STC89C 51); the output end of the first optical isolator 10 is connected to the optical input end of an optical filter 9 (manufactured by micron optics, model FFP-TF-1060-010G0200-2.0), the optical output end of the optical filter 9 is connected to the first port of an optical circulator 6 (PIOC 3-15 of shanghai vasu corporation), the second port of the optical circulator 6 is connected to one end of a bragg grating group 8 (three bragg gratings with reflectivity of ninety percent, bandwidth of 0.6nm, and central wavelengths of 1550nm, 1560nm and 1630nm, respectively), the third port of the optical circulator 6 is connected to the input end of a first optical coupler 5(1 × 2 standard single-mode optical coupler, splitting ratio of 10: 90), wherein the relationship of the 3 ports of the optical circulator 6 is: the light entering the first port can only be output from the second port, the light entering the second port can only be output from the third port, and the light entering the third port can only be output from the first port. The 90% output end of the first optical coupler 5 is connected with the input end of a second optical isolator 4 (1310/1480/1550 nm polarization independent optical isolator manufactured by shanghai vasta optical fiber communication technology limited), the output end of the second optical isolator 4 is connected with one end of an erbium-doped optical fiber 3 (a high-performance 980nm pumped C-Band erbium-doped optical fiber manufactured by Nufern corporation of America, the model is EDFC-980-HP, 3 meters), and the other end of the erbium-doped optical fiber 3 is connected with the common end of a wavelength division multiplexer 2. The above structure constitutes the basic light source portion and the sensing portion of the optical fiber sensor. The 10% output of the first optical coupler 5 is connected to the input of the second optical coupler 7, one output of the second optical coupler 7(2 × 2 standard single-mode optical coupler, with a splitting ratio of 50: 50) is connected to one input of a second faraday rotator 24 (MFI-1310 manufactured by THORLABS), the other output of the second optical coupler 7 is connected to one end of an optical fiber wound on a piezoelectric ceramic 22 (cylindrical piezoelectric ceramic, 50mm in outer diameter, 40mm in inner diameter, and 50mm in height), and the other end of the optical fiber wound on the piezoelectric ceramic 22 is connected to the input of a first faraday rotator 23 (MFI-1310 manufactured by THORLABS). The second optical coupler 7, the piezoelectric ceramic 22, and the first and second faraday rotators 23 and 24 together form a mach zehnder interference structure.
The present invention also has a structure in which the other output terminal of the second optical coupler 7 is connected to the input terminal of the photoelectric conversion circuit 25, the output terminal of the photoelectric conversion circuit 25 is connected to the input terminal of the function conversion circuit 26, the output terminal of the function conversion circuit 26 is connected to one input terminal of the adaptive amplitude normalization circuit 27, and the output terminal of the adaptive amplitude normalization circuit 27 is connected to one input terminal of the phase comparison circuit 28; the frequency output end of the controllable frequency source 20 is connected with the single chip microcomputer 17, the signal output end is connected with the other input end of the phase comparison circuit 28, and is also connected with the input end of a PZT driving circuit 21 (a device manufactured by the subject group, the specific structure is shown in patent ZL200710055865.8), and the output end of the phase comparison circuit 28 is connected with the single chip microcomputer 17; the output terminal of the PZT driving circuit 21 is connected to the control terminal of the piezoelectric ceramic 22. The above structure constitutes the demodulation section of the sensor. The output end of the constant current source circuit 14 is connected with a thermistor 15(10k omega @25 ℃), the thermistor 15 is connected with the input end of an analog-to-digital conversion circuit 16, and the output end of the analog-to-digital conversion circuit 16 is connected with a single chip microcomputer 17. The above structure provides the temperature compensation function for the present invention. The single chip 17 is also connected with the input key 13, the serial port communication module 18 and the display screen 19 respectively, and is used for setting parameters, communicating with a computer, displaying information and other functions.
The structure of the function transformation circuit 26 is that one end of a capacitor C3 is connected with the pin 12 of the trigonometric function converter U1 and one end of a resistor R2, and the other end of the capacitor C3 is used as the input end of the function transformation circuit 26, is recorded as a port ACOS _ in, and is connected with the output end of the photoelectric conversion circuit 25; the other end of the resistor R2 is grounded; pins 2, 3, 4, 5, 8, 11 and 13 of the trigonometric function converter U1 are grounded, pins 9 and 10 are connected with one end of a capacitor C2 and a-12V power supply, and the other end of the capacitor C2 is grounded; pin 6 of the trigonometric function converter U1 is connected with pin 7, pin 16 is connected with the +12V power supply and one end of the capacitor C1, and the other end of the capacitor C1 is grounded; pin 1 of the trigonometric function converter U1 is connected to the sliding end of the sliding rheostat W1, one end of the sliding rheostat W1 is connected to one end of the resistor R1, the other end of the resistor R1 is connected to pin 14 of the trigonometric function converter U1, and the sliding end of the sliding rheostat W1, which is used as the output end of the function transformation circuit 26, is recorded as port ACOS _ out and is connected to the input end of the adaptive amplitude normalization circuit 27; the model of the trigonometric function converter U1 is AD 639; the circuit has an inverse cosine transform function, and the signal output by the photoelectric conversion circuit 25 is processed by inverse cosine.
Since the amplitude of the signal output by the functional conversion circuit 26 is small and is influenced by a plurality of parameters in the circuit and the circuit, the size is not fixed, the invention designs the adaptive amplitude normalization circuit 27 for normalizing the amplitude of the signal output by the functional conversion circuit 26 to the optimal size so as to further improve the demodulation precision. The adaptive amplitude normalization circuit 27 has a structure that one end of a capacitor C9 is connected with one end of a resistor R3 and a pin 3 of a chip U2, the other end of the resistor R3 is grounded, and the other end of the capacitor C9 is used as an input end of the adaptive amplitude normalization circuit 27, is recorded as a port ADAPT _ in, and is connected with a port ACOS _ out of a function conversion circuit 26; pin 1, pin 7, pin 8 and pin 14 of the chip U2 are all grounded, pin 2 and pin 4 are both connected with a +5V power supply, pin 11 is connected with pin 12 and is connected with one end of a capacitor C5 and the +5V power supply, and the other end of the capacitor C5 is grounded; pin 13 of the chip U2 is connected with one end of a capacitor C4, and the other end of the capacitor C4 is grounded; pin 9 of the chip U2 is connected with one end of a capacitor C6, and the other end of the capacitor C6 is grounded; pin 5 of the chip U2 is connected with one end of a resistor R12 and a resistor R11, the other end of the resistor R12 is grounded, the other end of the resistor R11 is connected with the output end of the operational amplifier U4 and one end of a capacitor C8, the positive power supply end of the operational amplifier U8 is connected with a +5V power supply, and the negative power supply end is grounded; the other end of the capacitor C8 is connected with one end of a resistor R10, and the other end of the resistor R10 is connected with the non-inverting input end of the operational amplifier U4; the inverting input end of the operational amplifier U4 is connected with the sliding end of the sliding rheostat W3, one end of the sliding rheostat W3 is connected with a +5V power supply, and the other end of the sliding rheostat W3 is grounded; one end of a capacitor C7 is connected with one end of a resistor R9 and the non-inverting input end of an operational amplifier U4, the other end of the capacitor C7 is grounded, the other end of the resistor R9 is connected with one end of a resistor R7 and the output end of an operational amplifier U3, and the other end of the resistor R7 is connected with the inverting input end of the operational amplifier U3; one end of the resistor R8 is connected with the non-inverting input end of the operational amplifier U3, and the other end of the resistor R8 is grounded; the positive power supply end of the operational amplifier U3 is connected with a +5V power supply, and the negative power supply end is grounded; pin 10 of the chip U2, which is used as the output terminal of the adaptive amplitude normalization circuit 27 and is denoted as port ADAPT _ out, is connected to one input terminal of the phase comparison circuit 28; pin 10 of the chip U2 is connected with the anode of the diode D1, the cathode of the diode D1 is connected with one end of the resistor R4, the other end of the resistor R4 is connected with one end of the resistor R5 and the inverting input end of the operational amplifier U3, the other end of the resistor R5 is connected with the anode of the diode D2, and the cathode of the diode D2 is connected with the sliding end of the sliding rheostat W2; one end of the slide rheostat W2 is connected with the cathode of the diode D3 and is grounded, the other end of the slide rheostat W2 is connected with one end of the resistor R6 and the anode of the diode D3, and the other end of the resistor R6 is connected with a-5V power supply; the chip U2 is a variable gain amplifier chip with model number AD 8367.
Example 4 phase comparison Circuit
As shown in fig. 4, the PHASE comparator 28 used in the present invention has a structure that one end of a capacitor C10 is connected to the non-inverting input terminal of the operational amplifier U5 and one end of a resistor R13, and the other end of the capacitor C10 is used as an input terminal of the PHASE comparator 28, which is denoted as a port PHASE _ in1, and is connected to a port ADAPT _ out of the adaptive amplitude normalization circuit 27; the other end of the resistor R13 is grounded; the positive power supply end of the operational amplifier U5 is connected with a +5V power supply, the negative power supply end is grounded, the inverted input end is grounded, and the output end is connected with the CLK end of the D flip-flop U6A; the D port of the D flip-flop U6A is grounded; one end of the capacitor C11 is grounded, and the other end of the capacitor C11 is connected with the PR end of the D flip-flop U6A; one end of the resistor R14 is connected with the PR end of the D flip-flop U6A, and the other end is connected with the Q end of the D flip-flop U6A; the CLR end of the D flip-flop U6A is connected with a +5V power supply, and the Q end of the D flip-flop U6A is not connected with the PR end of the D flip-flop U8A; one end of the capacitor C12 is connected to the non-inverting input terminal of the operational amplifier U7 and one end of the resistor R15, and the other end of the capacitor C12 is used as the other input terminal of the PHASE comparator circuit 28, is recorded as a port PHASE _ in2, and is connected to a port SinM _ out of the controllable frequency source 20; the other end of the resistor R15 is grounded; the positive power supply end of the operational amplifier U7 is connected with a +5V power supply, the negative power supply end is grounded, the inverted input end is grounded, and the output end is connected with the CLK end of the D flip-flop U6B; the D port of the D flip-flop U6B is grounded; one end of the capacitor C13 is grounded, and the other end of the capacitor C13 is connected with the PR end of the D flip-flop U6B; one end of the resistor R16 is connected with the PR end of the D flip-flop U6B, and the other end is connected with the Q end of the D flip-flop U6B; the CLR end of the D trigger U6B is connected with a +5V power supply, and the Q end of the D trigger U6B is not connected with the CLR end of the D trigger U8A; the D end and the CLK end of the D flip-flop U8A are both grounded, and the Q end is used as the output end of the PHASE comparison circuit 28 and is marked as a port PHASE _ out; the circuit compares the phase of the standard sine wave output by the controllable frequency source with the phase of the sine wave output by the adaptive amplitude normalization circuit (the phase of the sine wave is influenced by the environment detected by the Bragg grating group 8), and sends the comparison result to the singlechip 17, and the singlechip calculates the stress change at the Bragg grating group 8 according to the phase difference.
EXAMPLE 5 controllable frequency Source
As shown in fig. 5, the controllable frequency source 20 used in the present invention has a structure that one end of a resistor R21 is connected to the non-inverting input terminal of an operational amplifier U10, and the other end is grounded; one end of the capacitor C16 is connected with the non-inverting input end of the operational amplifier U10, the other end of the capacitor C16 is used as the signal output end of the controllable frequency source 20, is recorded as a port SinM _ out, is connected with a port PHASE _ in2 of the PHASE comparison circuit 28, and is also connected with the input end of the PZT driving circuit 21; one end of the resistor R20 is connected with the inverting input end of the operational amplifier U10, and the other end is grounded; the positive power supply end of the operational amplifier U10 is connected with a +5V power supply, the negative power supply end is grounded, the output end is used as the frequency output end of the controllable frequency source 20, is marked as a port FrqM _ out and is connected with the single chip microcomputer 17; one end of the resistor R19 is connected with the inverting input end of the operational amplifier U9, and the other end is connected with a port SinM _ out; one end of the resistor R17 is connected with the inverting input end of the operational amplifier U9, and the other end is connected with the anode of the electrolytic capacitor C15; the negative electrode of the electrolytic capacitor C15 is grounded; one end of the resistor R18 is connected with the non-inverting input end of the operational amplifier U9, and the other end is grounded; the positive power supply of the operational amplifier U9 is connected with a +5V power supply, the negative power supply is connected with a-5V power supply, and the output end of the operational amplifier U9 is connected with the anode of the electrolytic capacitor C14; the anode of the electrolytic capacitor C14 is connected with a port SinM _ out, and the cathode is grounded; one end of the adjustable inductor L1 is connected with the anode of the electrolytic capacitor C14, and the other end is connected with the anode of the electrolytic capacitor C15. The module outputs a standard sine wave with adjustable frequency to provide a required sine signal for the demodulation part of the invention.
Example 6 working principle of the invention
The working principle of the present invention will be described with reference to the above embodiments and the accompanying drawings. When working, the fiber bragg grating group 8 is placed at each position (such as bridge, building load-bearing column, etc.) where stress change needs to be monitored, the fiber laser ring cavity composed of the erbium-doped fiber 3 and the optical isolator 4 provides a broadband light source for the fiber bragg grating group 8, each fiber bragg grating has a specific reflection spectrum, different gratings have different peak wavelengths, when the stress of a certain measured object changes, the peak wavelength of the reflection spectrum of the fiber bragg grating at the position can be shifted correspondingly, the reflection light enters the michelson interferometer composed of the second optical coupler 7, the piezoelectric ceramic 22, the first faraday rotator 23 and the second faraday rotator 24, and the controllable frequency source 20 provides a control signal sin (ω t) for the michelson interferometer, which is influenced by the light reflected by the fiber bragg grating in the interferometer, the signal is converted into an electric signal by the photoelectric conversion circuit 25 and subjected to inverse cosine transform by the function conversion circuit 26 to obtain sin (ω t + Δ θ), the amplitude of the signal is adjusted to a proper value after passing through the adaptive amplitude normalization circuit 27, the phase of the signal is changed compared with that of a sine signal sin (ω t) generated by the controllable frequency source 20, the phase difference between the signal and the sine signal sin (ω t) is detected by the phase comparison circuit 28 and sent to the singlechip 17, the phase difference actually reflects the stress change of a measured point, and finally the stress of the measured point is detected. The invention does not use the sawtooth wave in the modulation and demodulation process, thereby avoiding the high-frequency jitter signal caused by the falling edge of the sawtooth wave, and the band-pass filter is not needed to be used for filtering in the demodulation circuit, thereby avoiding the influence on the amplitude-frequency characteristic and the phase-frequency characteristic of the output signal. The invention uses the standard sine wave signal as PZT modulating signal, when demodulating the modulating signal, it uses the function conversion circuit 26 and the self-adapting amplitude normalization circuit 27 skillfully, recovers the modulating signal into the sine signal whose phase is controlled by the Bragg grating group 8 and the amplitude is suitable, when comparing the phase in the phase comparison circuit 28, it can compare the phase difference between the controlled signal and the original signal very accurately, thus accurately reflecting the environment parameter detected by the sensing head (i.e. the Bragg grating group 8).
Because the annular cavity of the fiber laser is easily influenced by the ambient temperature (generally, the annular cavity is not at the same position as the sensing probe of the fiber Bragg grating group 8) when in work, the fiber laser also has a temperature compensation function and consists of a constant current source circuit 14 and a thermistor 15 analog-to-digital conversion circuit 16. The thermistor 15 is a temperature sensitive device, and when the ambient temperature changes, the resistance value of the thermistor will change, and since the constant current source circuit 14 provides constant current for the thermistor, the change of the resistance value of the thermistor 15 will cause the change of the voltage generated at the two ends of the thermistor, and the change is converted into a digital signal by the analog-to-digital conversion circuit 16 to be input into the single chip microcomputer 17, so as to compensate the error brought to the measurement result by the change of the ambient temperature of the annular cavity of the fiber laser.
Claims (3)
1. A high-precision stress sensing system based on a Michelson interference structure is structurally characterized in that a pumping source (1) is connected with a 980nm end of an optical wavelength division multiplexer (2), a 1550nm end of the optical wavelength division multiplexer (2) is connected with one end of a delay line adjustable optical fiber (11), the other end of the delay line adjustable optical fiber (11) is connected with an input end of a first optical isolator (10), a control end of the delay line adjustable optical fiber (11) is connected with an output port of a level conversion chip (12), and an input end of the level conversion chip (12) is connected with a single chip microcomputer (17); the output end of the first optical isolator (10) is connected with the optical input end of the optical filter (9), the electric control end of the optical filter (9) is connected with the single chip microcomputer (17), the optical output end of the optical filter (9) is connected with the first port of the optical circulator (6), the second port of the optical circulator (6) is connected with one end of the Bragg grating group (8), the third port of the optical circulator (6) is connected with the input end of the first optical coupler (5), 90% of the output end of the first optical coupler (5) is connected with the input end of the second optical isolator (4), the output end of the second optical isolator (4) is connected with one end of the erbium-doped optical fiber (3), and the other end of the erbium-doped optical fiber (3) is connected with the common end of the optical wavelength division multiplexer (2); the 10% output end of the first optical coupler (5) is connected with the input end of the second optical coupler (7), one output end of the second optical coupler (7) is connected with the input end of the second Faraday rotator mirror (24), the other output end of the second optical coupler (7) is connected with one end of an optical fiber wound on the piezoelectric ceramic (22), and the other end of the optical fiber wound on the piezoelectric ceramic (22) is connected with the input end of the first Faraday rotator mirror (23);
the device is characterized in that the structure is also characterized in that the output end of the second optical coupler (7) is connected with the input end of a photoelectric conversion circuit (25), the output end of the photoelectric conversion circuit (25) is connected with the input end of a function conversion circuit (26), the output end of the function conversion circuit (26) is connected with one input end of an adaptive amplitude normalization circuit (27), the output end of the adaptive amplitude normalization circuit (27) is connected with one input end of a phase comparison circuit (28), and the output end of the phase comparison circuit (28) is connected with a single chip microcomputer (17); the frequency output end of the controllable frequency source (20) is connected with the single chip microcomputer (17), the signal output end is connected with the other input end of the phase comparison circuit (28) and is also connected with the input end of the PZT driving circuit (21), and the output end of the PZT driving circuit (21) is connected with the control end of the piezoelectric ceramic (22); the output end of the constant current source circuit (14) is connected with the thermistor (15), the thermistor (15) is connected with the input end of the analog-to-digital conversion circuit (16), and the output end of the analog-to-digital conversion circuit (16) is connected with the singlechip (17); the singlechip (17) is also connected with an input key (13), a serial port communication module (18) and a display screen (19) respectively;
the controllable frequency source (20) is structurally characterized in that one end of a resistor R21 is connected with the non-inverting input end of an operational amplifier U10, and the other end of the resistor R21 is grounded; one end of the capacitor C16 is connected with the non-inverting input end of the operational amplifier U10, the other end of the capacitor C16 is used as the signal output end of the controllable frequency source (20), is recorded as a port SinM _ out, is connected with a port PHASE _ in2 of the PHASE comparison circuit (28), and is also connected with the input end of the PZT driving circuit (21); one end of the resistor R20 is connected with the inverting input end of the operational amplifier U10, and the other end is grounded; the positive power supply end of the operational amplifier U10 is connected with a +5V power supply, the negative power supply end is grounded, the output end is used as the frequency output end of the controllable frequency source (20), is recorded as a port FrqM _ out and is connected with the single chip microcomputer; one end of the resistor R19 is connected with the inverting input end of the operational amplifier U9, and the other end is connected with a port SinM _ out; one end of the resistor R17 is connected with the inverting input end of the operational amplifier U9, and the other end is connected with the anode of the electrolytic capacitor C15; the negative electrode of the electrolytic capacitor C15 is grounded; one end of the resistor R18 is connected with the non-inverting input end of the operational amplifier U9, and the other end is grounded; the positive power supply of the operational amplifier U9 is connected with a +5V power supply, the negative power supply is connected with a-5V power supply, and the output end of the operational amplifier U9 is connected with the anode of the electrolytic capacitor C14; the anode of the electrolytic capacitor C14 is connected with a port SinM _ out, and the cathode is grounded; one end of the adjustable inductor L1 is connected with the anode of the electrolytic capacitor C14, and the other end is connected with the anode of the electrolytic capacitor C15;
the adaptive amplitude normalization circuit (27) is structurally characterized in that one end of a capacitor C9 is connected with one end of a resistor R3 and a pin 3 of a chip U2, the other end of the resistor R3 is grounded, and the other end of the capacitor C9 is used as an input end of the adaptive amplitude normalization circuit (27), is recorded as a port ADAPT _ in and is connected with a port ACOS _ out of a function conversion circuit (26); pin 1, pin 7, pin 8 and pin 14 of the chip U2 are all grounded, pin 2 and pin 4 are both connected with a +5V power supply, pin 11 is connected with pin 12 and is connected with one end of a capacitor C5 and the +5V power supply, and the other end of the capacitor C5 is grounded; pin 13 of the chip U2 is connected with one end of a capacitor C4, and the other end of the capacitor C4 is grounded; pin 9 of the chip U2 is connected with one end of a capacitor C6, and the other end of the capacitor C6 is grounded; pin 5 of the chip U2 is connected with one end of a resistor R12 and a resistor R11, the other end of the resistor R12 is grounded, the other end of the resistor R11 is connected with the output end of the operational amplifier U4 and one end of a capacitor C8, the positive power supply end of the operational amplifier U8 is connected with a +5V power supply, and the negative power supply end is grounded; the other end of the capacitor C8 is connected with one end of a resistor R10, and the other end of the resistor R10 is connected with the non-inverting input end of the operational amplifier U4; the inverting input end of the operational amplifier U4 is connected with the sliding end of the sliding rheostat W3, one end of the sliding rheostat W3 is connected with a +5V power supply, and the other end of the sliding rheostat W3 is grounded; one end of a capacitor C7 is connected with one end of a resistor R9 and the non-inverting input end of an operational amplifier U4, the other end of the capacitor C7 is grounded, the other end of the resistor R9 is connected with one end of a resistor R7 and the output end of an operational amplifier U3, and the other end of the resistor R7 is connected with the inverting input end of the operational amplifier U3; one end of the resistor R8 is connected with the non-inverting input end of the operational amplifier U3, and the other end of the resistor R8 is grounded; the positive power supply end of the operational amplifier U3 is connected with a +5V power supply, and the negative power supply end is grounded; pin 10 of the chip U2 is used as the output terminal of the adaptive amplitude normalization circuit (27), which is marked as port ADAPT _ out, and is connected with one input terminal of the phase comparison circuit (28); pin 10 of the chip U2 is connected with the anode of the diode D1, the cathode of the diode D1 is connected with one end of the resistor R4, the other end of the resistor R4 is connected with one end of the resistor R5 and the inverting input end of the operational amplifier U3, the other end of the resistor R5 is connected with the anode of the diode D2, and the cathode of the diode D2 is connected with the sliding end of the sliding rheostat W2; one end of the slide rheostat W2 is connected with the cathode of the diode D3 and is grounded, the other end of the slide rheostat W2 is connected with one end of the resistor R6 and the anode of the diode D3, and the other end of the resistor R6 is connected with a-5V power supply; the chip U2 is a variable gain amplifier chip, and the model is AD 8367;
the structure of the PHASE comparison circuit (28) is that one end of a capacitor C10 is connected with the non-inverting input end of an operational amplifier U5 and one end of a resistor R13, the other end of the capacitor C10 is used as one input end of the PHASE comparison circuit (28), is recorded as a port PHASE _ in1 and is connected with a port ADAPT _ out of the self-adaptive amplitude normalization circuit (27); the other end of the resistor R13 is grounded; the positive power supply end of the operational amplifier U5 is connected with a +5V power supply, the negative power supply end is grounded, the inverted input end is grounded, and the output end is connected with the CLK end of the D flip-flop U6A; the D port of the D flip-flop U6A is grounded; one end of the capacitor C11 is grounded, and the other end of the capacitor C11 is connected with the PR end of the D flip-flop U6A; one end of the resistor R14 is connected with the PR end of the D flip-flop U6A, and the other end is connected with the Q end of the D flip-flop U6A; the CLR end of the D flip-flop U6A is connected with a +5V power supply, and the Q end of the D flip-flop U6A is not connected with the PR end of the D flip-flop U8A; one end of the capacitor C12 is connected with the non-inverting input end of the operational amplifier U7 and one end of the resistor R15, the other end of the capacitor C12 is used as the other input end of the PHASE comparison circuit (28), is recorded as a port PHASE _ in2 and is connected with a port SinM _ out of the controllable frequency source (20); the other end of the resistor R15 is grounded; the positive power supply end of the operational amplifier U7 is connected with a +5V power supply, the negative power supply end is grounded, the inverted input end is grounded, and the output end is connected with the CLK end of the D flip-flop U6B; the D port of the D flip-flop U6B is grounded; one end of the capacitor C13 is grounded, and the other end of the capacitor C13 is connected with the PR end of the D flip-flop U6B; one end of the resistor R16 is connected with the PR end of the D flip-flop U6B, and the other end is connected with the Q end of the D flip-flop U6B; the CLR end of the D trigger U6B is connected with a +5V power supply, and the Q end of the D trigger U6B is not connected with the CLR end of the D trigger U8A; the D end and the CLK end of the D flip-flop U8A are both grounded, and the Q end is used as the output end of the PHASE comparison circuit (28) and is marked as a port PHASE _ out.
2. A high precision stress sensing system based on michelson interference structure according to claim 1, characterized in that the pump source (1) is a 980nm laser source.
3. A high accuracy stress sensing system based on michelson interference structure according to claim 1 or 2, characterized in that the thermistor (15) is a negative temperature coefficient thermistor with a resistance of 10k Ω at 25 ℃.
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