ZA966463B - Method and circuit arrangement for the resynchronization of a memory management arrangement. - Google Patents

Method and circuit arrangement for the resynchronization of a memory management arrangement.

Info

Publication number
ZA966463B
ZA966463B ZA9606463A ZA966463A ZA966463B ZA 966463 B ZA966463 B ZA 966463B ZA 9606463 A ZA9606463 A ZA 9606463A ZA 966463 A ZA966463 A ZA 966463A ZA 966463 B ZA966463 B ZA 966463B
Authority
ZA
South Africa
Prior art keywords
arrangement
resynchronization
memory management
circuit arrangement
circuit
Prior art date
Application number
ZA9606463A
Inventor
Ralf Ostermann
Original Assignee
Thomson Brandt Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Brandt Gmbh filed Critical Thomson Brandt Gmbh
Publication of ZA966463B publication Critical patent/ZA966463B/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/076—Error or fault detection not based on redundancy by exceeding limits by exceeding a count or rate limit, e.g. word- or bit count limit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0763—Error or fault detection not based on redundancy by bit configuration check, e.g. of formats or tags
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Communication Control (AREA)
  • Storage Device Security (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Dram (AREA)
ZA9606463A 1995-08-14 1996-07-30 Method and circuit arrangement for the resynchronization of a memory management arrangement. ZA966463B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19529966A DE19529966A1 (en) 1995-08-14 1995-08-14 Method and circuit arrangement for resynchronizing a memory management

Publications (1)

Publication Number Publication Date
ZA966463B true ZA966463B (en) 1997-02-19

Family

ID=7769509

Family Applications (1)

Application Number Title Priority Date Filing Date
ZA9606463A ZA966463B (en) 1995-08-14 1996-07-30 Method and circuit arrangement for the resynchronization of a memory management arrangement.

Country Status (7)

Country Link
EP (1) EP0758770A1 (en)
JP (1) JPH09167078A (en)
KR (1) KR970012680A (en)
CN (1) CN1150309A (en)
BR (1) BR9603411A (en)
DE (1) DE19529966A1 (en)
ZA (1) ZA966463B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6578093B1 (en) * 2000-01-19 2003-06-10 Conexant Systems, Inc. System for loading a saved write pointer into a read pointer of a storage at desired synchronization points within a horizontal video line for synchronizing data
JP4377297B2 (en) * 2004-07-30 2009-12-02 富士通株式会社 Storage device
CN108108148B (en) * 2016-11-24 2021-11-16 舒尔电子(苏州)有限公司 Data processing method and device

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5736488A (en) * 1980-08-12 1982-02-27 Toshiba Corp Memory controller
US4852045A (en) * 1986-05-06 1989-07-25 Hayes Microcomputer Products, Inc. Message buffer with improved escape sequence and automatic document marking
US4710920A (en) * 1986-06-19 1987-12-01 General Datacomm, Inc. Bit interleaved multiplexer system providing byte synchronization for communicating apparatuses
CA1286421C (en) * 1987-10-14 1991-07-16 Martin Claude Lefebvre Message fifo buffer controller
US5438575A (en) * 1992-11-16 1995-08-01 Ampex Corporation Data storage system with stale data detector and method of operation
FI94697C (en) * 1993-10-14 1995-10-10 Nokia Telecommunications Oy Method for realizing buffering in a digital data communication system as well as a buffer

Also Published As

Publication number Publication date
CN1150309A (en) 1997-05-21
KR970012680A (en) 1997-03-29
DE19529966A1 (en) 1997-02-20
JPH09167078A (en) 1997-06-24
MX9603189A (en) 1997-07-31
BR9603411A (en) 1998-05-12
EP0758770A1 (en) 1997-02-19

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