ZA724729B - Method for the manufacturing of a semiconductor device - Google Patents

Method for the manufacturing of a semiconductor device

Info

Publication number
ZA724729B
ZA724729B ZA724729A ZA724729A ZA724729B ZA 724729 B ZA724729 B ZA 724729B ZA 724729 A ZA724729 A ZA 724729A ZA 724729 A ZA724729 A ZA 724729A ZA 724729 B ZA724729 B ZA 724729B
Authority
ZA
South Africa
Prior art keywords
manufacturing
semiconductor device
semiconductor
Prior art date
Application number
ZA724729A
Other languages
English (en)
Inventor
F Adam
C Obermeier
A Renz
W Gollinger
M Raabe
Original Assignee
Itt
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Itt filed Critical Itt
Publication of ZA724729B publication Critical patent/ZA724729B/xx

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor

Landscapes

  • Microelectronics & Electronic Packaging (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Weting (AREA)
  • Formation Of Insulating Films (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Element Separation (AREA)
ZA724729A 1971-08-07 1972-07-11 Method for the manufacturing of a semiconductor device ZA724729B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2139631A DE2139631C3 (de) 1971-08-07 1971-08-07 Verfahren zum Herstellen eines Halbleiterbauelements, bei dem der Rand einer Diffusionszone auf den Rand einer polykristallinen Siliciumelektrode ausgerichtet ist

Publications (1)

Publication Number Publication Date
ZA724729B true ZA724729B (en) 1973-04-25

Family

ID=5816091

Family Applications (1)

Application Number Title Priority Date Filing Date
ZA724729A ZA724729B (en) 1971-08-07 1972-07-11 Method for the manufacturing of a semiconductor device

Country Status (7)

Country Link
JP (1) JPS4829370A (it)
AU (1) AU4513372A (it)
DE (1) DE2139631C3 (it)
FR (1) FR2148439B1 (it)
GB (1) GB1339384A (it)
IT (1) IT963314B (it)
ZA (1) ZA724729B (it)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5131255B1 (it) * 1971-02-27 1976-09-06
GB1540450A (en) * 1975-10-29 1979-02-14 Intel Corp Self-aligning double polycrystalline silicon etching process
JPS56130497A (en) * 1980-03-19 1981-10-13 Toyota Motor Corp Formation of pattern or the like utilizing electro-deposition coating
US4318759A (en) * 1980-07-21 1982-03-09 Data General Corporation Retro-etch process for integrated circuits
JPS6137998A (ja) * 1984-07-27 1986-02-22 Seiko Instr & Electronics Ltd 時計文字板の製造方法

Also Published As

Publication number Publication date
GB1339384A (en) 1973-12-05
AU4513372A (en) 1974-02-07
FR2148439B1 (it) 1976-03-12
DE2139631A1 (de) 1973-03-01
IT963314B (it) 1974-01-10
JPS4829370A (it) 1973-04-18
DE2139631C3 (de) 1979-05-10
FR2148439A1 (it) 1973-03-23
DE2139631B2 (de) 1978-08-31

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