ZA200601261B - A hardware generator for uniform and gaussian deviates employing analog and digital correction circuits - Google Patents

A hardware generator for uniform and gaussian deviates employing analog and digital correction circuits Download PDF

Info

Publication number
ZA200601261B
ZA200601261B ZA200601261A ZA200601261A ZA200601261B ZA 200601261 B ZA200601261 B ZA 200601261B ZA 200601261 A ZA200601261 A ZA 200601261A ZA 200601261 A ZA200601261 A ZA 200601261A ZA 200601261 B ZA200601261 B ZA 200601261B
Authority
ZA
South Africa
Prior art keywords
state
output
bit stream
corrector
bit
Prior art date
Application number
ZA200601261A
Other languages
English (en)
Inventor
De Jager Ocker Cornelis
Reinecke Carolus Johannes
Van Der Walt Hendrik Johannes Stephanus
Visser Barend
Botha Roelof Cornelius
Original Assignee
Univ Northwest
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Univ Northwest filed Critical Univ Northwest
Priority to ZA200601261A priority Critical patent/ZA200601261B/en
Publication of ZA200601261B publication Critical patent/ZA200601261B/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/58—Random or pseudo-random number generators
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/58—Random or pseudo-random number generators
    • G06F7/588—Random number generators, i.e. based on natural stochastic processes

Landscapes

  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Manipulation Of Pulses (AREA)
  • Analogue/Digital Conversion (AREA)
  • Radar Systems Or Details Thereof (AREA)
  • Variable-Direction Aerials And Aerial Arrays (AREA)
  • Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
  • Error Detection And Correction (AREA)
  • Dc Digital Transmission (AREA)
ZA200601261A 2003-08-22 2006-02-13 A hardware generator for uniform and gaussian deviates employing analog and digital correction circuits ZA200601261B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
ZA200601261A ZA200601261B (en) 2003-08-22 2006-02-13 A hardware generator for uniform and gaussian deviates employing analog and digital correction circuits

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
ZA200306559 2003-08-22
ZA200601261A ZA200601261B (en) 2003-08-22 2006-02-13 A hardware generator for uniform and gaussian deviates employing analog and digital correction circuits

Publications (1)

Publication Number Publication Date
ZA200601261B true ZA200601261B (en) 2007-05-30

Family

ID=34218353

Family Applications (1)

Application Number Title Priority Date Filing Date
ZA200601261A ZA200601261B (en) 2003-08-22 2006-02-13 A hardware generator for uniform and gaussian deviates employing analog and digital correction circuits

Country Status (8)

Country Link
US (1) US7810011B2 (https=)
EP (1) EP1660988B1 (https=)
JP (1) JP4468954B2 (https=)
CN (1) CN100498688C (https=)
AT (1) ATE374967T1 (https=)
DE (1) DE602004009321T2 (https=)
WO (1) WO2005020064A2 (https=)
ZA (1) ZA200601261B (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USRE44097E1 (en) * 2005-07-22 2013-03-19 Psigenics Corporation Device and method for responding to influences of mind
US9152380B2 (en) * 2013-03-12 2015-10-06 Qualcomm Incorporated Interrupt driven hardware random number generator
CN106020770B (zh) * 2016-05-23 2018-12-04 深圳华视微电子有限公司 一种基于电阻热噪声的真随机数发生器
US10698658B2 (en) * 2018-02-12 2020-06-30 Seagate Technology Llc Random number generation from spin torque oscillator noise
KR102155007B1 (ko) * 2019-02-14 2020-09-11 국민대학교산학협력단 독립성 측정을 이용한 엔트로피 관리 장치 및 방법, 이를 이용한 난수 생성 장치

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3706941A (en) 1970-10-28 1972-12-19 Atomic Energy Commission Random number generator
FR2390047B1 (https=) 1977-05-06 1982-09-17 Aerospatiale
JP2000066592A (ja) 1998-08-19 2000-03-03 Syst Kogaku Kk 乱数生成装置
US6643374B1 (en) 1999-03-31 2003-11-04 Intel Corporation Duty cycle corrector for a random number generator
SG101428A1 (en) * 1999-09-01 2004-01-30 Ibm Random number generator
JP3480822B2 (ja) 1999-11-02 2003-12-22 斎藤 威 熱雑音ランダムパルス発生装置及び乱数生成装置
DE10003472C1 (de) * 2000-01-27 2001-04-26 Infineon Technologies Ag Zufallszahlengenerator
US6687721B1 (en) * 2000-03-31 2004-02-03 Intel Corporation Random number generator with entropy accumulation
US6792438B1 (en) * 2000-03-31 2004-09-14 Intel Corporation Secure hardware random number generator
US6862605B2 (en) * 2001-08-15 2005-03-01 Scott A. Wilber True random number generator and entropy calculation device and method
CN1208715C (zh) * 2002-12-12 2005-06-29 浙江大学 一种真随机数发生器

Also Published As

Publication number Publication date
EP1660988A2 (en) 2006-05-31
US7810011B2 (en) 2010-10-05
WO2005020064A2 (en) 2005-03-03
EP1660988B1 (en) 2007-10-03
ATE374967T1 (de) 2007-10-15
DE602004009321T2 (de) 2008-07-10
DE602004009321D1 (de) 2007-11-15
CN1839370A (zh) 2006-09-27
US20070162809A1 (en) 2007-07-12
JP2007503643A (ja) 2007-02-22
JP4468954B2 (ja) 2010-05-26
HK1092907A1 (zh) 2007-02-16
WO2005020064A3 (en) 2005-06-16
CN100498688C (zh) 2009-06-10

Similar Documents

Publication Publication Date Title
US7683726B2 (en) Quadrature-phase voltage controlled oscillator
US20050035789A1 (en) Output circuit device for clock signal distribution in high-speed signal transmission
US20080088350A1 (en) Duty detector and duty detection/correction circuit including the same and method thereof
US8610493B2 (en) Bias circuit and analog integrated circuit comprising the same
TW200707451A (en) Sense amplifier with input offset compensation
US9319031B2 (en) High-speed CMOS ring voltage controlled oscillator with low supply sensitivity
ZA200601261B (en) A hardware generator for uniform and gaussian deviates employing analog and digital correction circuits
EP1434146A3 (en) Method for increasing storage capacity in a multi-bit mapped trie-based hardware storage engine
EP1667163B1 (en) Sample-hold circuit
US20080204089A1 (en) Dynamic frequency dividing circuit operating within limited frequency range
EP1128534A3 (en) High voltage generating circuit improved in parasitic capacitance of voltage-dividing resistance
US20210265985A1 (en) Reduced area, reduced power flip-flop
Paro Filho et al. An incremental-charge-based digital transmitter with built-in filtering
JP5334366B2 (ja) 半導体集積回路
US7436261B2 (en) Operational amplifier
US7348848B2 (en) Buffer amplifier for source driver
US8378717B1 (en) High-speed BiCMOS double sampling track-and-hold amplifier circuit
US20070018738A1 (en) Voltage-controlled oscillator circuit and PLL circuit
WO2002080179A3 (en) Digital leakage compensation circuit
US7187207B2 (en) Leakage balancing transistor for jitter reduction in CML to CMOS converters
Noh et al. Charge pump with a regulated cascode circuit for reducing current mismatch in PLLs
US6333673B2 (en) Electronic circuit
US8519799B2 (en) Voltage controlled oscillator
Paro Filho et al. 9.3 A transmitter with 10b 128MS/S incremental-charge-based DAC achieving− 155dBc/Hz out-of-band noise
US20070171112A1 (en) Robust reference generation circuit for D/A converter