DIGITALNI INSTRUMENT ZA MERENJE SREDNJE VREDNOSTI PROIZVODA DVA ANALOGNA PERIODIČNA SIGNALA koji se sastoji od sabirača S1, S2, generatora šuma GS1, GS2, komparatora K1, K2, K3, K4, logičke mreže LM, koincidentnih kola I1, I2, up/down brojača B, adaptera za paralelni interfejs PIA mikroprocesora P, gen-eratora takta GT i kola za sinhronizaciju SINC, gde je gener-ator takta spojen na ulaze koincidentnih kola I1, I2 i na ulaze za takt generatora šuma GS1, GS2 a na druge ulaze koin-cidentnih kola I1 I2 su priključeni izlazi logičke mreže LM i izlazi koincidentnih kola I1, I2 su spojeni na ulaze up/down brojača B, koji je preko adaptera PIA za paralelni interfejs spojen sa mikroprocesorom /uP,, koji je priključen na ulaz "Reset" up/down brojača B, i na koji je priključen izlaz kola za sinhronizaciju SINC, na čiji je ulaz priključen jedan od ulaznih analognih periodičnih signala u2(t), koji je takodje priključen na ulaz sabirača S2, pri čemu je ulazni analogni periodični signal u1(t) priključen na ulaz sabirača, S1, nazn ačen time, što je generator šuma (GS1) spojen na drugi ulaz sabirača (S1), a generator šuma (GS2) spojen na drugi ulaz sabirača (S2), pri čemu je izlaz sabirača (S1) spojen na "+" ulaz komparatora (K1) i "-" ulaz komparatora (K2), a izlaz sabirača (S2) spojen na "+" ulaz komparatora (K3) i "-" ulaz komparatora (K4), i što je na "-" ulaze komparatora (K1, K3) priključen referentni jednosmerni napon Uu i na "+" ulaz komparatora (K2, K4) je priključen referentni jednosmerni napon Ud, pri čemu su izlazi komparatora (K1, K2, K3, K4) spojeni na ulaz logičke mreže (LM) za množenje njenih ulaznih digitalnih veličina da bi izlazi sadržali informaciju o trenutnoj vrednosti proizvoda ulaznih veličina. - Prijava sadrži još 1 zavisan zahtev.DIGITAL INSTRUMENT FOR MEASURING THE AVERAGE VALUE OF PRODUCTS TWO ANALOGUE PERIODICAL SIGNALS consisting of the collectors S1, S2, noise generator GS1, GS2, comparators K1, K2, K3, K4, logic network LM, coincident circuits I1, B2, up , the PIA microprocessor parallel adapter P, the GT clock generator and the SINC clock circuit, where the clock generator is connected to the inputs of the coincident circuits I1, I2 and to the inputs of the noise generator GS1, GS2 and to the other inputs of the coin- of the output circuits I1 I2 are connected to the outputs of the logic network LM and the outputs of the coincidental circuits I1, I2 are connected to the inputs of the up / down counter B, which is connected via the PIA adapter for the parallel interface to the microprocessor / uP ,, which is connected to the input "Reset" up / down counter B, and to which the output of the SINC synchronization circuit is connected, to whose input one of the input analog periodic signals u2 (t) is connected, which is also connected to the input of the collector S2, wherein the input analog periodic is and a signal u1 (t) connected to the collector input, S1, characterized in that the noise generator (GS1) is connected to the second collector input (S1) and the noise generator (GS2) is connected to the second collector input (S2), wherein is the output of the collector (S1) connected to the "+" input of the comparator (K1) and the "-" input of the comparator (K2), and the output of the collector (S2) connected to the "+" input of the comparator (K3) and the "-" input of the comparator (K4) ), and the reference DC voltage Uu is connected to the "-" inputs of the comparator (K1, K3) and the reference DC voltage Ud is connected to the "+" input of the comparator (K1, K2, K3, K4) connected to the input of a logical network (LM) to multiply its input digital sizes to outputs information about the current value of the input size products. - The application contains 1 more dependent request.