YU45633B - Sistem za obradu podataka koji obuhvata više jedinica za obradu podataka - Google Patents
Sistem za obradu podataka koji obuhvata više jedinica za obradu podatakaInfo
- Publication number
- YU45633B YU45633B YU119284A YU119284A YU45633B YU 45633 B YU45633 B YU 45633B YU 119284 A YU119284 A YU 119284A YU 119284 A YU119284 A YU 119284A YU 45633 B YU45633 B YU 45633B
- Authority
- YU
- Yugoslavia
- Prior art keywords
- data processing
- data
- unit
- units
- processing
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0815—Cache consistency protocols
- G06F12/0817—Cache consistency protocols using directory methods
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/084—Multiuser, multiprocessor or multiprocessing cache systems with a shared cache
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Small-Scale Networks (AREA)
- Multi Processors (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
Abstract
SISTEM ZA OBRADU PODATAKA KOJI OBUHVATA VIŠE JEDINICA ZA OBRADU PODATAKA, (2,4) i glavnu memoriju (14,16) gde svaka jedinica za obradu podataka ima pridruzenu kes jedinicu (22,22 ) za drzanje podataka koje treba da obradi pomenuta jedinica za obradu podataka i podataka koje je obradila pomenuta jedinica, pomenuti sistem je tipa gde kada jedna od pomenutih jedinica za obradu podataka obradjuje podatke, obradjeni podaci, posle obrade, normalnose smestaju samo u pridruzenu kes jedinicu; poboljsani aparat za omogucavanje jedinice za obradu podataka da dobije podatke za obradu kada pridnizena kes jedinica nadje da nema takve podatke, naznacen time, sto sadrzi: bafer jedinicu (368^70) za svaku jedinicu za obradu podataka;centralnu kontrolnu jedinicu (6ВЈ)spregnutu sa pomenutim jedinicama za obradu podataka, pomenutim keS jedinicama i pomenutim bafer jedinicama; i kola (116-122,132-138, ltd.) spregnuta izmedju pomenutih keS jedinica i pomenutih bafer jedinica. Prijava sadrzi joS 2 patentna zahteva.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/511,616 US4695951A (en) | 1983-07-07 | 1983-07-07 | Computer hierarchy control |
Publications (2)
Publication Number | Publication Date |
---|---|
YU119284A YU119284A (en) | 1986-12-31 |
YU45633B true YU45633B (sh) | 1992-07-20 |
Family
ID=24035680
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
YU119284A YU45633B (sh) | 1983-07-07 | 1984-07-06 | Sistem za obradu podataka koji obuhvata više jedinica za obradu podataka |
Country Status (10)
Country | Link |
---|---|
US (1) | US4695951A (sh) |
EP (1) | EP0131277B1 (sh) |
JP (1) | JPS6039259A (sh) |
KR (1) | KR930002337B1 (sh) |
AU (1) | AU578420B2 (sh) |
CA (1) | CA1214884A (sh) |
DE (1) | DE3478519D1 (sh) |
FI (1) | FI80533C (sh) |
NO (1) | NO167831C (sh) |
YU (1) | YU45633B (sh) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0198574A3 (en) * | 1985-02-05 | 1989-11-29 | Digital Equipment Corporation | Apparatus and method for data copy consistency in a multi-cache data processing system |
JP2539357B2 (ja) * | 1985-03-15 | 1996-10-02 | 株式会社日立製作所 | デ−タ処理装置 |
US5349672A (en) * | 1986-03-17 | 1994-09-20 | Hitachi, Ltd. | Data processor having logical address memories and purge capabilities |
US5113510A (en) * | 1987-12-22 | 1992-05-12 | Thinking Machines Corporation | Method and apparatus for operating a cache memory in a multi-processor |
US5226146A (en) * | 1988-10-28 | 1993-07-06 | Hewlett-Packard Company | Duplicate tag store purge queue |
US5185875A (en) * | 1989-01-27 | 1993-02-09 | Digital Equipment Corporation | Method and apparatus for reducing memory read latency in a shared memory system with multiple processors |
US5206941A (en) * | 1990-01-22 | 1993-04-27 | International Business Machines Corporation | Fast store-through cache memory |
US5297269A (en) * | 1990-04-26 | 1994-03-22 | Digital Equipment Company | Cache coherency protocol for multi processor computer system |
US5263144A (en) * | 1990-06-29 | 1993-11-16 | Digital Equipment Corporation | Method and apparatus for sharing data between processors in a computer system |
JPH0827755B2 (ja) * | 1991-02-15 | 1996-03-21 | インターナショナル・ビジネス・マシーンズ・コーポレイション | データの単位を高速度でアクセスする方法 |
US5185861A (en) * | 1991-08-19 | 1993-02-09 | Sequent Computer Systems, Inc. | Cache affinity scheduler |
US5428761A (en) * | 1992-03-12 | 1995-06-27 | Digital Equipment Corporation | System for achieving atomic non-sequential multi-word operations in shared memory |
JPH0797352B2 (ja) * | 1992-07-02 | 1995-10-18 | インターナショナル・ビジネス・マシーンズ・コーポレイション | コンピュータ・システム及び入出力コントローラ |
US5655100A (en) * | 1995-03-31 | 1997-08-05 | Sun Microsystems, Inc. | Transaction activation processor for controlling memory transaction execution in a packet switched cache coherent multiprocessor system |
US5684977A (en) * | 1995-03-31 | 1997-11-04 | Sun Microsystems, Inc. | Writeback cancellation processing system for use in a packet switched cache coherent multiprocessor system |
US6018791A (en) * | 1997-04-14 | 2000-01-25 | International Business Machines Corporation | Apparatus and method of maintaining cache coherency in a multi-processor computer system with global and local recently read states |
US6477620B1 (en) * | 1999-12-20 | 2002-11-05 | Unisys Corporation | Cache-level return data by-pass system for a hierarchical memory |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1124017A (en) * | 1964-12-17 | 1968-08-14 | English Electric Computers Ltd | Data storage apparatus |
US3510844A (en) * | 1966-07-27 | 1970-05-05 | Gen Electric | Interprocessing multicomputer systems |
US3735360A (en) * | 1971-08-25 | 1973-05-22 | Ibm | High speed buffer operation in a multi-processing system |
GB1354827A (en) * | 1971-08-25 | 1974-06-05 | Ibm | Data processing systems |
US3771137A (en) * | 1971-09-10 | 1973-11-06 | Ibm | Memory control in a multipurpose system utilizing a broadcast |
US3967247A (en) * | 1974-11-11 | 1976-06-29 | Sperry Rand Corporation | Storage interface unit |
US4471429A (en) * | 1979-12-14 | 1984-09-11 | Honeywell Information Systems, Inc. | Apparatus for cache clearing |
US4394731A (en) * | 1980-11-10 | 1983-07-19 | International Business Machines Corporation | Cache storage line shareability control for a multiprocessor system |
EP0212678B1 (en) * | 1980-11-10 | 1990-05-16 | International Business Machines Corporation | Cache storage synonym detection and handling means |
US4394727A (en) * | 1981-05-04 | 1983-07-19 | International Business Machines Corporation | Multi-processor task dispatching apparatus |
US4503497A (en) * | 1982-05-27 | 1985-03-05 | International Business Machines Corporation | System for independent cache-to-cache transfer |
US4551799A (en) * | 1983-02-28 | 1985-11-05 | Honeywell Information Systems Inc. | Verification of real page numbers of stack stored prefetched instructions from instruction cache |
US4527238A (en) * | 1983-02-28 | 1985-07-02 | Honeywell Information Systems Inc. | Cache with independent addressable data and directory arrays |
-
1983
- 1983-07-07 US US06/511,616 patent/US4695951A/en not_active Expired - Lifetime
-
1984
- 1984-06-13 FI FI842384A patent/FI80533C/fi not_active IP Right Cessation
- 1984-07-04 AU AU30249/84A patent/AU578420B2/en not_active Ceased
- 1984-07-05 NO NO842747A patent/NO167831C/no unknown
- 1984-07-06 YU YU119284A patent/YU45633B/sh unknown
- 1984-07-06 CA CA000458280A patent/CA1214884A/en not_active Expired
- 1984-07-06 EP EP84107914A patent/EP0131277B1/en not_active Expired
- 1984-07-06 DE DE8484107914T patent/DE3478519D1/de not_active Expired
- 1984-07-07 KR KR1019840003948A patent/KR930002337B1/ko not_active IP Right Cessation
- 1984-07-07 JP JP59141288A patent/JPS6039259A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
DE3478519D1 (en) | 1989-07-06 |
US4695951A (en) | 1987-09-22 |
EP0131277A3 (en) | 1986-06-11 |
EP0131277B1 (en) | 1989-05-31 |
NO842747L (no) | 1985-01-08 |
EP0131277A2 (en) | 1985-01-16 |
NO167831C (no) | 1991-12-11 |
AU3024984A (en) | 1985-01-10 |
KR930002337B1 (ko) | 1993-03-29 |
FI80533C (fi) | 1990-06-11 |
FI80533B (fi) | 1990-02-28 |
FI842384A0 (fi) | 1984-06-13 |
YU119284A (en) | 1986-12-31 |
CA1214884A (en) | 1986-12-02 |
KR850001572A (ko) | 1985-03-30 |
JPH0457026B2 (sh) | 1992-09-10 |
FI842384A (fi) | 1985-01-08 |
JPS6039259A (ja) | 1985-03-01 |
AU578420B2 (en) | 1988-10-27 |
NO167831B (no) | 1991-09-02 |
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