WO2026016221A1 - 显示面板及显示装置 - Google Patents

显示面板及显示装置

Info

Publication number
WO2026016221A1
WO2026016221A1 PCT/CN2024/109098 CN2024109098W WO2026016221A1 WO 2026016221 A1 WO2026016221 A1 WO 2026016221A1 CN 2024109098 W CN2024109098 W CN 2024109098W WO 2026016221 A1 WO2026016221 A1 WO 2026016221A1
Authority
WO
WIPO (PCT)
Prior art keywords
type
pixel circuit
transistor
display panel
pixel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/CN2024/109098
Other languages
English (en)
French (fr)
Inventor
张欢喜
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Original Assignee
Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd filed Critical Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Priority to KR1020247031766A priority Critical patent/KR20260012117A/ko
Publication of WO2026016221A1 publication Critical patent/WO2026016221A1/zh
Pending legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/04164—Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2085—Special arrangements for addressing the individual elements of the matrix, other than by driving respective rows and columns in combination
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections

Definitions

  • This application relates to the field of display technology, and more particularly to a display panel and display device.
  • VR Virtual Reality
  • this application provides a display panel and a display device to achieve both high resolution and brightness uniformity in the display panel and the display device.
  • this application provides a display panel.
  • the display panel has a display area.
  • the display panel includes a plurality of light-emitting devices located in the display area, a plurality of pixel circuits, a sensing line, and an external circuit.
  • the plurality of pixel circuits include a first type of pixel circuit and a second type of pixel circuit, respectively connected to the plurality of light-emitting devices.
  • Both the first type of pixel circuit and the second type of pixel circuit include a driving transistor.
  • the sensing line is connected to the driving transistor of the second type of pixel circuit to receive an electrical signal output by the driving transistor when it is turned on in the second type of pixel circuit.
  • the external circuit is connected to the sensing line and is configured to acquire the electrical signal.
  • this application also provides a display device, which includes the aforementioned display panel.
  • multiple pixel circuits include a first type of pixel circuit and a second type of pixel circuit.
  • a sensing line is connected to the driving transistor of the second type of pixel circuit to receive the electrical signal output by the driving transistor in the second type of pixel circuit.
  • An external circuit is connected to the sensing line and configured to acquire the electrical signal.
  • the external circuit can obtain the compensation value of the threshold voltage of the driving transistor in the second type of pixel circuit based on the electrical signal, and use the compensation value to compensate the threshold voltage of the driving transistors of the first type of pixel circuit and the second type of pixel circuit, thereby improving the brightness uniformity of the display panel.
  • the first type of pixel circuit does not have the function of supporting the detection of electrical signals, the number of transistors in the first type of pixel circuit is smaller, and the layout area occupied by the first type of pixel circuit is smaller, which is conducive to increasing the number of pixel circuits, enabling the display panel and display device to achieve high-resolution display.
  • the hybrid design of the first type of pixel circuit and the second type of pixel circuit can take into account both the high resolution and brightness uniformity of the display panel and the display device.
  • Figure 1 is a schematic diagram of the planar structure of the display panel of some embodiments of this application.
  • Figure 2 is a schematic diagram of the cross-sectional structure taken along the A-A’ tangent line in the display panel shown in Figure 1;
  • Figure 3 is a schematic diagram of a planar structure of multiple pixel circuits disposed in the display area according to some embodiments of this application;
  • Figure 4 is a schematic diagram of a planar structure of multiple pixel circuits disposed in the display area according to some other embodiments of this application;
  • Figure 5 is a circuit diagram of a first type of pixel circuit according to some embodiments of this application.
  • Figure 6 is a circuit diagram of a second type of pixel circuit according to some embodiments of this application.
  • Figure 7 is a circuit diagram of a first type of pixel circuit according to some other embodiments of this application.
  • Figure 8 is a circuit diagram of a second type of pixel circuit according to some other embodiments of this application.
  • Figure 9 is the driving timing diagram of the second type of pixel circuit shown in Figure 8.
  • 32 Driving circuit layer; 321, Pixel circuit; 322, First type pixel circuit; 323, 323a, 323b, 323c, 323d, Second type pixel circuit; 324, Pixel circuit group; T1, Driving transistor; T2, Switching transistor; T3, Light emission control transistor; T4, Sensing transistor; C, Capacitor; 325, Scan line; 326, Light emission control signal line; 327, 327a, 327b, 327c, 327d, Sensing line; 328, Data line;
  • Figure 1 is a schematic diagram of the planar structure of the display panel of some embodiments of this application.
  • the display panel 100 has a display area 100a and a non-display area 100b surrounding the display area 100a.
  • the display panel 100 includes multiple data lines 328, multiple scan lines 325, multiple light emission control signal lines 326, and external circuitry 50.
  • the external circuitry 50 includes a driving unit 40.
  • Multiple scan lines 325 are disposed in the display area 100a, extending along the first direction x and spaced apart along the second direction y.
  • Multiple light-emitting control signal lines 326 are disposed in the display area 100a, extending along the first direction x and spaced apart along the second direction y.
  • One light-emitting control signal line 326 may be disposed adjacent to one scan line 325.
  • Multiple data lines 328 extend from the display area 100a to the non-display area 100b along the second direction y, and are connected to the driving unit 40 bonded to the non-display area 100b.
  • the multiple data lines 328 are also spaced apart along the first direction x.
  • the multiple data lines 328 intersect insulatedly with multiple scan lines 325 and multiple light-emitting control signal lines 326.
  • the drive unit 40 may include a source driver.
  • the first direction x intersects the second direction y.
  • the first direction x and the second direction y may be perpendicular.
  • the angle between the first direction x and the second direction y may be an acute angle or an obtuse angle.
  • Figure 2 is a schematic diagram of the cross-sectional structure taken along the A-A’ tangent line in the display panel shown in Figure 1.
  • the display panel 100 includes a substrate 31, a driving circuit layer 32, and a light-emitting device layer 33.
  • the driving circuit layer 32 is disposed on the substrate 31, and the light-emitting device layer 33 is disposed on the side of the driving circuit layer 32 opposite to the substrate 31.
  • substrate 31 may include a glass substrate, which can reduce the manufacturing cost of the display panel. In other embodiments, substrate 31 may also include a flexible substrate, enabling the display panel 100 to be bent. In still other embodiments, substrate 31 may also include a semiconductor substrate such as silicon.
  • the light-emitting device layer 33 includes a plurality of light-emitting devices 331.
  • the plurality of light-emitting devices 331 are located in the display area 100a.
  • Each light-emitting device 331 may include an anode, a cathode, and a light-emitting layer located between the anode and the cathode.
  • the plurality of light-emitting devices 331 may share a single cathode.
  • the light-emitting layer may include an organic light-emitting layer, such that the light-emitting device 331 is an organic light-emitting diode (OLED).
  • OLED organic light-emitting diode
  • the organic light-emitting layer includes organic materials.
  • the light-emitting layer may also include an inorganic light-emitting layer.
  • the display panel 100 may further include a thin-film encapsulation layer 34, which protects the light-emitting device layer 33 and reduces the risk of corrosion of the light-emitting device 331 by oxygen and moisture.
  • the thin-film encapsulation layer 34 is located on the side of the light-emitting device layer 33 facing away from the substrate 31.
  • the thin-film encapsulation layer 34 may include two inorganic thin-film encapsulation layers and an organic thin-film encapsulation layer located between the two inorganic thin-film encapsulation layers.
  • the display panel 100 may further include a functional layer (not shown), which includes at least one of a circular polarizer, a light filter layer, and a touch layer. Some functional layers may be disposed on the side of the thin-film encapsulation layer 34 opposite to the display panel 100. Some functional layers may also be integrated inside the display panel 100 to reduce the thickness of the display panel 100. For example, the touch layer may be integrated inside the display panel 100.
  • the driving circuit layer 32 includes multiple data lines 328, multiple scan lines 325, and multiple light emission control signal lines 326.
  • Figure 3 is a planar structural diagram of multiple pixel circuits disposed in the display area according to some embodiments of this application
  • Figure 4 is a planar structural diagram of multiple pixel circuits disposed in the display area according to other embodiments of this application.
  • the driving circuit layer 32 also includes multiple pixel circuits 321, which are respectively connected to multiple light-emitting devices 331 to drive the multiple light-emitting devices 331 to emit light, so that the display panel 100 can display images.
  • Multiple pixel circuits 321 are located in the display area 100a.
  • the multiple pixel circuits 321 include first type pixel circuits 322 and second type pixel circuits 323 that are different from each other, so as to achieve both high resolution and brightness uniformity of the display panel 100.
  • the first type of pixel circuit 322 does not include functional devices for detecting the threshold voltage of its internal transistors, thus reducing the number of functional devices and the area it occupies. With a fixed area of the display area 100a of the display panel 100, the smaller area occupied by the first type of pixel circuit 322 allows for more pixel circuits 321 to be installed in the display area 100a, meeting the high resolution requirements of the display panel 100.
  • the second type of pixel circuit 323 includes functional devices for detecting the threshold voltage of its internal transistors. A compensation value for the threshold voltage is calculated using the detected threshold voltage, and coarse compensation is applied to the threshold voltages of the transistors in both the first and second type of pixel circuits based on this compensation value, thereby meeting the display panel 100's requirement for good brightness uniformity.
  • Figures 3 and 4 show the first type of pixel circuit 322 and the second type of pixel circuit 323 spaced apart, this is only to illustrate the arrangement design of the first type of pixel circuit 322 and the second type of pixel circuit 323.
  • the second type of pixel circuit 323 can be arranged adjacent to and continuously with the second type of pixel circuit 323.
  • Figure 5 is a circuit diagram of a first type of pixel circuit according to some embodiments of this application
  • Figure 6 is a circuit diagram of a second type of pixel circuit according to some embodiments of this application.
  • each of the first type of pixel circuit 322 and the second type of pixel circuit 323 includes a driving transistor T1.
  • the display panel 100 also includes a sensing line 327.
  • the sensing line 327 is connected to the driving transistor T1 of the second type pixel circuit 323 to receive the electrical signal output by the driving transistor T1 when it is turned on in the second type pixel circuit 323.
  • the external circuit 50 is connected to the sensing line 327 and is configured to acquire the electrical signal.
  • the second-type pixel circuit 323, sensing line 327, and external circuit 50 work together to detect the electrical signal corresponding to the threshold voltage of the driving transistor T1 of the second-type pixel circuit 323, while the first-type pixel circuit 322 does not have the function of detecting electrical signals.
  • the external circuit 50 can obtain the compensation value of the threshold voltage of the driving transistor T1 in the second-type pixel circuit 323 based on the electrical signal, and use the compensation value to compensate the threshold voltage of the driving transistor T1 of both the first-type pixel circuit 322 and the second-type pixel circuit 323, thereby improving the brightness uniformity of the display panel 100.
  • the first-type pixel circuit 322 does not have the function of detecting electrical signals, resulting in a smaller number of transistors in the first-type pixel circuit 322 and a smaller layout area occupied by the first-type pixel circuit 322.
  • This facilitates increasing the number of pixel circuits, enabling the display panel and display device to achieve high-resolution display.
  • the hybrid design of the first-type pixel circuit 322 and the second-type pixel circuit 323 can balance the high resolution and brightness uniformity of the display panel.
  • each of the first type pixel circuit 322 and the second type pixel circuit 323 further includes a switching transistor T2.
  • the second type pixel circuit 323 also includes a sensing transistor T4, while the first type pixel circuit 322 does not include a sensing transistor T4.
  • the first type pixel circuit 322 does not include a transistor for detecting the threshold voltage of the driving transistor T1 in the first type pixel circuit 322
  • the second type pixel circuit 323 includes a transistor for detecting the threshold voltage of the driving transistor T1 in the second type pixel circuit 323, and the number of transistors in the first type pixel circuit 322 is less than the number of transistors in the second type pixel circuit 323.
  • the cathode of each light-emitting device 331 receives a first power supply voltage VSS.
  • the first power supply voltage VSS can be a low-level voltage.
  • the driving transistor T1 when the driving transistor T1 is turned on, it generates a driving current to drive the light-emitting device 331 to emit light.
  • the driving transistor T1 includes a gate, a first electrode, and a second electrode.
  • the first electrode of the driving transistor T1 is connected to the anode of the light-emitting device 331.
  • the second electrode of the driving transistor T1 receives a second power supply voltage VDD.
  • the second power supply voltage VDD is different from the first power supply voltage VSS.
  • the second power supply voltage VDD can be greater than the first power supply voltage VSS, and the second power supply voltage VDD can be a high-level voltage.
  • the first electrode is one of the source and the drain
  • the second electrode is the other of the source and the drain
  • the switching transistor T2 controls the data signal Data transmitted via the data line 328 to be transmitted to the gate of the driving transistor T1.
  • the switching transistor T2 includes a first terminal, a second terminal, and a gate. The first terminal of the switching transistor T2 receives the data signal Data.
  • the second terminal of the switching transistor T2 is connected to the gate of the driving transistor T1.
  • the gate of the switching transistor T2 receives the scan signal Pscan transmitted via the scan line 325.
  • sensing transistor T4 senses the current or voltage output from its first terminal when driving transistor T1 is turned on.
  • Sensing transistor T4 includes a first terminal and a second terminal. The first terminal of sensing transistor T4 is connected to the first terminal of driving transistor T1. The second terminal of sensing transistor T4 is connected to sensing line 327. Sensing line 327 is connected to external circuit 50.
  • the second type of pixel circuit 323 is a pixel circuit capable of externally compensating for the threshold voltage. Compared to pixel circuits that achieve internal compensation for the threshold voltage, such as the 7T1C pixel circuit (which includes 7 transistors and a capacitor), the second type of pixel circuit 323 has fewer transistors, which is more advantageous for achieving high resolution.
  • each of the first type pixel circuit 322 and the second type pixel circuit 323 further includes a capacitor C.
  • the capacitor C is connected between the first terminal of the driving transistor T1 and the gate of the driving transistor T1.
  • the driving transistor T1 when the driving transistor T1 is turned on, the capacitor C ensures that the driving transistor T1 can stably drive the light-emitting device 331 to emit light.
  • the external circuit 50 may further include an external processing circuit 51 connected to the driving unit 40.
  • the external processing circuit 51 receives the electrical signal (sensing current or sensing voltage) when the driving transistor T1 in the second type pixel circuit 323 is turned on via the sensing line 327. After converting the electrical signal from an analog signal to a digital signal, it performs calculations to obtain the threshold voltage of the driving transistor T1 or a compensation value for the threshold voltage of the driving transistor T1. Next, the storage unit (not shown) in the external processing circuit 51 stores the threshold voltage or compensation value. Then, the threshold voltage or compensation value is converted from a digital signal to an analog signal and transmitted to the driving unit 40.
  • the driving unit 40 performs refined compensation on the threshold voltage of the driving transistor T1 in the first type pixel circuit 322 and the second type pixel circuit 323 based on one of the corresponding analog signals and the brightness curve, thereby improving the brightness uniformity of the display panel 100.
  • the brightness curve is obtained by acquiring the display screen during display and calculating the brightness difference of the display panel. The acquisition of the brightness curve is a conventional technique and will not be described in detail here.
  • the external processing circuit 51 may include an analog-to-digital conversion circuit (not shown), a computing unit (not shown), a storage unit (not shown), and a digital-to-analog conversion circuit (not shown).
  • the analog-to-digital conversion circuit receives the electrical signal (sensing current or sensing voltage) when the driving transistor T1 in the second type of pixel circuit 323 is turned on through the sensing line 327, and converts the electrical signal into a digital signal.
  • the computing unit receives the digital signal output from the analog-to-digital converter circuit and calculates the threshold voltage of the driving transistor T1 or the compensation value of the threshold voltage of the driving transistor T1 based on a preset dataset and the digital signal.
  • the preset dataset may include data corresponding to the mapping relationship between a preset electrical signal and a preset threshold voltage, or the preset dataset may include data corresponding to the mapping relationship between a preset electrical signal and a preset compensation value.
  • the storage unit receives the threshold voltage or compensation value calculated by the computing unit.
  • the digital-to-analog converter circuit receives the threshold voltage or compensation value and converts it into an analog signal, which is then output to the drive unit 40.
  • the first type of pixel circuit 322 shown in Figure 5 includes two transistors and one capacitor. This first type of pixel circuit 322 has a smaller number of transistors, which meets the requirements for high resolution.
  • the second type of pixel circuit 323 shown in Figure 6 includes three transistors and one capacitor. This smaller number of transistors also meets the requirements for high resolution, while simultaneously enabling external compensation of the threshold voltage.
  • display panels typically use a single type of pixel circuit, making it difficult to simultaneously achieve high resolution and threshold voltage compensation.
  • OLED organic light-emitting diode
  • display panels often employ 7T1C pixel circuits with internal compensation capabilities, which can achieve threshold voltage compensation and thus improve brightness uniformity.
  • the large number of transistors in this pixel circuit makes it difficult to achieve a pixel density of 1500 pixels per inch or higher.
  • the second power supply voltage VDD and the first power supply voltage VSS can both be fixed power supply voltage signals, that is, the second power supply voltage VDD and the first power supply voltage VSS are both constant.
  • the difference between the second power supply voltage VDD and the first power supply voltage VSS can vary.
  • Different differences can control whether the driving transistor T1 is turned on. When the driving transistor T1 is turned on, the light-emitting device 331 emits light, and the display panel displays an image of a certain brightness. When the driving transistor T1 is turned off, the display panel displays a black image, that is, the display panel has a black pixel insertion function. Therefore, through the hybrid design of the first type pixel circuit 322 shown in Figure 5 and the second type pixel circuit 323 shown in Figure 6, the high resolution of the display panel, external compensation of the threshold voltage, and the black pixel insertion function can be simultaneously achieved.
  • the difference between the second power supply voltage VDD and the first power supply voltage VSS is a first difference.
  • the difference between the second power supply voltage VDD and the first power supply voltage VSS is a second difference, which is different from the first difference.
  • the sensing transistor T4 further includes a gate, which receives the scan signal Pscan transmitted by the scan line 325.
  • the gate of the sensing transistor T4 and the gate of the switching transistor T2 can be connected to a scan line 325 that transmits the scan signal Pscan, reducing the number of scan lines and providing more space to arrange the pixel circuits 321, further improving the resolution of the display panel 100.
  • the gates of the switching transistors T2 of the first-type pixel circuit 322 and the second-type pixel circuit 323 can also be connected to a scan line 325 that transmits the scan signal Pscan, further reducing the number of scan lines, providing more space to arrange the pixel circuits 321, and further improving the resolution of the display panel 100.
  • the gate of sensing transistor T4 and the gate of switching transistor T2 can also receive two different scan signals respectively.
  • sensing transistor T4 and switching transistor T2 are controlled by different scan signals, and can be controlled independently, thereby better realizing the writing of data signal Data and the detection of threshold voltage.
  • Figure 7 is a circuit diagram of a first type of pixel circuit according to some other embodiments of this application
  • Figure 8 is a circuit diagram of a second type of pixel circuit according to some other embodiments of this application.
  • the first type of pixel circuit shown in FIG7 is basically similar to the first type of pixel circuit shown in FIG5, and the second type of pixel circuit shown in FIG8 is basically similar to the second type of pixel circuit shown in FIG6.
  • the similarities will not be repeated.
  • the differences include that each of the first type of pixel circuit 322 shown in FIG7 and the second type of pixel circuit 323 shown in FIG8 further includes a light-emitting control transistor T3.
  • the light-emitting control transistor T3 is used to control the light-emitting time of the light-emitting device 331.
  • the light-emitting control transistor T3 When the light-emitting control transistor T3 is turned on, the light-emitting device 331 emits light, and the display panel 100 displays an image of a certain brightness.
  • the light-emitting control transistor T3 is turned off, the light-emitting device 331 does not emit light, and the display panel 100 displays a black image; that is, the display panel 100 has a black screen insertion
  • the second power supply voltage VDD and the first power supply voltage VSS can both be fixed power supply voltage signals.
  • the light-emitting control transistor T3 may include a gate, a first electrode, and a second electrode.
  • the gate of the light-emitting control transistor T3 receives the light-emitting control signal EM transmitted by the light-emitting control signal line 326.
  • the first electrode of the light-emitting control transistor T3 receives the second power supply voltage VDD.
  • the second electrode of the light-emitting control transistor T3 is connected to the second electrode of the driving transistor T1.
  • the first and second electrodes of the light-emitting control transistor T3 are connected between the second electrode of the driving transistor T1 and the power supply signal line transmitting the second power supply voltage VDD, reducing the power consumption of the first pixel circuit 322 and the second pixel circuit 321 during operation.
  • Figure 7 shows a first-type pixel circuit 322, which includes three transistors and a capacitor C.
  • This first-type pixel circuit 322 has a smaller number of transistors, meeting the requirements for high resolution and also satisfying the black pixel insertion function of the display panel.
  • Figure 8 shows a second-type pixel circuit 323, which includes four transistors and a capacitor C. This second-type pixel circuit 323 can simultaneously detect the threshold voltage of the driving transistor T1, satisfying the black pixel insertion function of the display panel.
  • the hybrid design of the first-type pixel circuit 322 and the second-type pixel circuit 323 balances external compensation for the threshold voltage of the driving transistor T1 and the black pixel insertion function of the display panel 100, while providing more space in the display panel 100 to accommodate the pixel circuit 321, thereby achieving high resolution.
  • a sensing transistor T4 is added to the second type pixel circuit 323, and a light-emitting control transistor T3 is added to both the first type pixel circuit 322 and the second type pixel circuit, so as to improve the resolution of the display panel 100 while realizing the external compensation of the threshold voltage and the black insertion function.
  • the second type of pixel circuit 323 has the function of supporting the detection of electrical signals corresponding to the threshold voltage, while the first type of pixel circuit 322 does not have the function of supporting the detection of electrical signals corresponding to the threshold voltage.
  • the number of transistors in the first type of pixel circuit 322 is less than the number of transistors in the second type of pixel circuit 323, and the number of transistors in the second type of pixel circuit 323 is less than or equal to 4. This ensures that the display panel 100 can achieve external compensation of the threshold voltage of the pixel circuit to improve the brightness uniformity of the display panel, while also improving the resolution of the display panel.
  • additional transistors can be added to the first type of pixel circuit 322 and the second type of pixel circuit 323.
  • an initialization transistor can be added to initialize the gate of the driving transistor T1
  • a reset transistor can be added to initialize the anode of the light-emitting device 331.
  • adding transistors will affect the resolution of the display panel 100 to some extent.
  • the layout area occupied by one first type of pixel circuit 322 is smaller than the layout area occupied by one second type of pixel circuit 323.
  • the layout area occupied by the first type of pixel circuit 322 is smaller, providing more space to arrange more pixel circuits 321, thereby improving the resolution of the display panel 100.
  • the area occupied by the first type of pixel circuit 322 is equal to the orthographic projection area of the first type of pixel circuit 322 on the substrate 31, and the area occupied by the second type of pixel circuit 323 is equal to the orthographic projection area of the second type of pixel circuit 323 on the substrate 31.
  • the orthographic projection area of the first type of pixel circuit 322 on the substrate 31 can be equal to the sum of the orthographic projection areas of the multiple transistors, capacitors C, and the traces connecting the multiple transistors and capacitors C in the first type of pixel circuit 322 on the substrate 31.
  • the orthographic projection area of the second type of pixel circuit 323 on the substrate 31 is similar and will not be elaborated here.
  • the first type of pixel circuit 322 does not include the sensing transistor T4, while the second type of pixel circuit 323 includes the sensing transistor T4.
  • the number of first-type pixel circuits 322 in the display area 100a is greater than the number of second-type pixel circuits 323.
  • the smaller number of second-type pixel circuits 323 with a larger area is used to detect the threshold voltage of the driving transistor T1 to achieve external compensation of the threshold voltage, giving the display panel 100 good brightness uniformity.
  • the larger number of first-type pixel circuits 322 with a smaller area can increase the number of pixel circuits 321, giving the display panel 100 high resolution.
  • the driving transistor T1 in the first type of pixel circuit 322 is the same as the driving transistor T1 in the second type of pixel circuit 323; and/or, the switching transistor T2 in the first type of pixel circuit 322 is the same as the switching transistor T2 in the second type of pixel circuit 323; and/or, the light-emitting control transistor T3 in the first type of pixel circuit 322 is the same as the light-emitting control transistor T3 in the second type of pixel circuit 323.
  • At least one transistor in the first type of pixel circuit 322 is the same as the corresponding transistor in the second type of pixel circuit 323, and the transistors in the first type of pixel circuit 322 and the second type of pixel circuit 323 are fabricated using the same process technology, simplifying the manufacturing process of the display panel 100.
  • the driving transistor T1 in the first type of pixel circuit 322 is the same as the driving transistor T1 in the second type of pixel circuit 323
  • the switching transistor T2 in the first type of pixel circuit 322 is the same as the switching transistor T2 in the second type of pixel circuit 323
  • the light-emitting control transistor T3 in the first type of pixel circuit 322 is the same as the light-emitting control transistor T3 in the second type of pixel circuit 323. This further simplifies the manufacturing process of the display panel 100.
  • the driving transistor T1 in the first type of pixel circuit 322 is the same as the driving transistor T1 in the second type of pixel circuit 323, using the detected threshold voltage or compensation value of the driving transistor T1 in the second type of pixel circuit 323 can better compensate for the threshold voltage of the driving transistor T1 in the first type of pixel circuit 322, thereby improving the uniformity of display brightness.
  • the fact that the driving transistor T1 in the first type of pixel circuit 322 is the same as the driving transistor T1 in the second type of pixel circuit 323 means that the driving transistor T1 in the first type of pixel circuit 322 and the driving transistor T1 in the second type of pixel circuit 323 are the same in type and size.
  • the driving transistor T1 in the first type of pixel circuit 322 and the driving transistor T1 in the second type of pixel circuit 323 can both be N-type low-temperature polysilicon transistors, and their dimensions are basically the same. The fact that their dimensions are basically the same takes into account the differences caused by manufacturing processes.
  • the switching transistor T2 in the first type of pixel circuit 322 is the same as the switching transistor T2 in the second type of pixel circuit 323, the light-emitting control transistor T3 in the first type of pixel circuit 322 is the same as the light-emitting control transistor T3 in the second type of pixel circuit 323, and so on, will not be elaborated further here.
  • the two transistors in the first type of pixel circuit 322 may be the same as the corresponding two transistors in the second type of pixel circuit 323, or one transistor in the first type of pixel circuit 322 may be the same as the corresponding one transistor in the second type of pixel circuit 323.
  • the driving transistor T1 in the first type of pixel circuit 322 and the driving transistor T1 in the second type of pixel circuit 323 both include low-temperature polysilicon transistors (LTPS); and/or, the switching transistor T2 in the first type of pixel circuit 322 and the switching transistor T2 in the second type of pixel circuit 323 both include LPS; and/or, the light-emitting control transistor T3 in the first type of pixel circuit 322 and the light-emitting control transistor T3 in the second type of pixel circuit 323 both include LPS; and/or, the sensing transistor T4 includes a LPS.
  • LTPS low-temperature polysilicon transistors
  • At least one transistor in the first type of pixel circuit 322 and at least one transistor in the second type of pixel circuit 323 are LPS with a smaller footprint, further reducing the footprint of a single pixel circuit 321, which is beneficial for increasing the number of pixel circuits 321, enabling the display panel 100 to achieve high resolution.
  • the driving transistor T1 in the first type of pixel circuit 322 and the driving transistor T1 in the second type of pixel circuit 323 both include low-temperature polysilicon transistors (LTPS).
  • the switching transistor T2 in the first type of pixel circuit 322 and the switching transistor T2 in the second type of pixel circuit 323 both include LPS.
  • the light-emitting control transistor T3 in the first type of pixel circuit 322 and the light-emitting control transistor T3 in the second type of pixel circuit 323 both include LPS.
  • the sensing transistor T4 also includes a LPS. This further reduces the area occupied by a single pixel circuit 321, which is beneficial for increasing the number of pixel circuits 321, enabling the display panel 100 to achieve high resolution.
  • At least one of the driving transistor T1 in the first type of pixel circuit 322 and the driving transistor T1 in the second type of pixel circuit 323 may also include a metal-oxide-semiconductor (MOD) transistor.
  • MOD metal-oxide-semiconductor
  • at least one of the switching transistor T2 in the first type of pixel circuit 322 and the switching transistor T2 in the second type of pixel circuit 323 may also include a MOD transistor.
  • at least one of the light-emitting control transistor T3 in the first type of pixel circuit 322 and the light-emitting control transistor T3 in the second type of pixel circuit 323 may also include a MOD transistor.
  • the sensing transistor T4 may also include a MOD transistor.
  • the driving transistor T1 in the first type pixel circuit 322 and the driving transistor T1 in the second type pixel circuit 323 are N-type transistors; and/or, the switching transistor T2 in the first type pixel circuit 322 and the switching transistor T2 in the second type pixel circuit 323 are P-type transistors; and/or, the light-emitting control transistor T3 in the first type pixel circuit 322 and the light-emitting control transistor T3 in the second type pixel circuit 323 are P-type transistors; and/or, the sensing transistor T4 in the second type pixel circuit 323 is a P-type transistor.
  • the driving transistor T1 in the first type of pixel circuit 322 and the driving transistor T1 in the second type of pixel circuit 323 are both N-type transistors. This facilitates the detection and compensation of the threshold voltage of the driving transistor T1.
  • the switching transistor T2 in the first type pixel circuit 322 and the switching transistor T2 in the second type pixel circuit 323 are P-type transistors.
  • the light-emitting control transistor T3 in the first type pixel circuit 322 and the light-emitting control transistor T3 in the second type pixel circuit 323 are also P-type transistors.
  • the sensing transistor T4 in the second type pixel circuit 323 is a P-type transistor. This reduces the driving power consumption of the switching transistor T2, the light-emitting control transistor T3, and the sensing transistor T4.
  • the plurality of pixel circuits 321 are divided into a plurality of pixel circuit groups 324 arranged in an array.
  • Each pixel circuit group 324 includes at least one second-type pixel circuit 323 and a plurality of first-type pixel circuits 322.
  • the display area 100a of the display panel 100 is divided into a plurality of display partitions SA arranged in an array, and each display partition SA is provided with one pixel circuit group 324.
  • a pixel circuit group 324 can serve as a minimum threshold voltage compensation unit to achieve coarse compensation of the threshold voltage and improve the brightness uniformity of the display partition SA.
  • a pixel circuit group 324 as the smallest threshold voltage compensation unit means that, based on the electrical signal corresponding to the threshold voltage of the driving transistor T1 detected by at least one second-type pixel circuit 323 in a pixel circuit group 324, threshold voltage compensation is performed on the driving transistor T1 of multiple first-type pixel circuits 322 and at least one second-type pixel circuit 323 in a pixel circuit group 324.
  • the pixel circuit group 324 is arranged in the display area 100a as the smallest repeating unit of the pixel driving circuit. Furthermore, in the display area 100a, the more pixel circuit groups 324 there are, the fewer pixel circuits 321 are in each pixel circuit group 324, the more refined the threshold voltage compensation can be achieved in each pixel circuit group 324, and the better the brightness uniformity of the display zone SA corresponding to the pixel circuit group 324 will be.
  • the number of second-type pixel circuits 323 is less than the number of first-type pixel circuits 322.
  • electrical signals can be detected, and threshold voltage compensation of the driving transistors T1 of the multiple pixel circuits in the pixel circuit group 324 can be achieved based on the electrical signals.
  • the resolution of the display panel 100 is improved based on the larger number of first-type pixel circuits 322.
  • the plurality of pixel circuit groups 324 may be arranged in a two-dimensional array in the display area 100a, for example, extending along the extension direction of the data line 328 (second direction y) and the extension direction of the scan line 325 (first direction x), to simplify the design of the wiring connected to the pixel circuit 321.
  • the plurality of display partitions SA corresponding to the plurality of pixel circuit groups 324 may also be arranged in a two-dimensional array.
  • the plurality of pixel circuits 321 may also be arranged in a one-dimensional array, for example, extending along the extension direction of the data line 328 or the extension direction of the scan line 325.
  • the plurality of display partitions SA corresponding to the plurality of pixel circuit groups 324 may also be arranged in a one-dimensional array.
  • the number of second-type pixel circuits 323 affects the resolution and threshold voltage compensation effect of the display panel 100. Specifically, the more second-type pixel circuits 323 in a pixel circuit group 324, the more electrical signals corresponding to the sensed threshold voltage can be detected, and more accurate compensation can be achieved based on the electrical signals corresponding to multiple threshold voltages. However, a large number of second-type pixel circuits 323 is not conducive to reducing the layout area occupied by a pixel circuit group 324, which is detrimental to improving the resolution of the display panel 100. Furthermore, the position of the second-type pixel circuits 323 in a pixel circuit group 324 also affects the threshold voltage compensation effect.
  • the process technology at different positions is different, resulting in differences in the threshold voltage of the driving transistor T1 of the second-type pixel circuits 323 at different positions. Based on this, some embodiments of this application optimize the number and position of the second-type pixel circuits 323 in a pixel circuit group 324.
  • a second type pixel circuit 323 is disposed between two adjacent first type pixel circuits 322.
  • the effect of process differences on the threshold voltage of the driving transistor T1 of the second type pixel circuit 323 is the same as or nearly the same as the effect of process differences on the threshold voltage of the driving transistor T1 of the two adjacent first type pixel circuits 322.
  • the threshold voltage of the driving transistor T1 of the two adjacent first type pixel circuits 322 is compensated using the electrical signal corresponding to the threshold voltage sensed by the second type pixel circuit 323, a better threshold voltage compensation effect can be obtained, resulting in better brightness uniformity of the display partition SA corresponding to the pixel circuit group 324.
  • a pixel circuit group 324 in a pixel circuit group 324, multiple first-type pixel circuits 322 are arranged around a second-type pixel circuit 323.
  • the threshold voltage of the driving transistor T1 in the second-type pixel circuit 323 tends to be the same as the threshold voltage of the driving transistors T1 of the multiple first-type pixel circuits 322 surrounding the second-type pixel circuit 323.
  • only one type of second-class pixel circuit 323 may be provided in a pixel circuit group 324.
  • the number of second-class pixel circuits 323 in a pixel circuit group 324 is minimized, while the number of first-class pixel circuits 322 is maximized. This reduces the layout area occupied by a pixel circuit group 324, allowing for the provision of more pixel circuit groups 324 to improve resolution while simplifying the threshold voltage compensation method for pixel circuits 321 within the pixel circuit group 324.
  • two or more second-type pixel circuits 323 may be provided in a pixel circuit group 324. Based on the electrical signals corresponding to the threshold voltages of the driving transistors T1 of the two or more second-type pixel circuits 323, more accurate compensation values can be obtained, external compensation of the threshold voltage can be better achieved, and the brightness uniformity of the display zone SA in which the pixel circuit group 324 is located can be better improved.
  • the second type of pixel circuits 323 in at least two pixel circuit groups 324 are arranged in the same position to simplify the manufacturing process of multiple pixel circuit groups 324 and simplify the arrangement of sensing lines 327.
  • the second type of pixel circuits 323 in at least two pixel circuit groups 324 are arranged in the same position. This simplifies the manufacturing process of multiple pixel circuit groups 324 and also facilitates the connection of the second type of pixel circuits 323 in at least two pixel circuit groups 324 with a sensing line 327 in the extension direction of the data line 328, thereby reducing the number of sensing lines 327, providing more space for pixel circuits, and thus improving the resolution of the display panel 100.
  • the second type of pixel circuit 323 in at least two pixel circuit groups 324 are arranged in the same position to simplify the manufacturing process of multiple pixel circuit groups 324.
  • the second type of pixel circuit 323 in the plurality of pixel circuit groups 324 is located in the middle position of each pixel circuit group 324.
  • the second type of pixel circuit 323 in the pixel circuit group 324 can also be located in other positions in each pixel circuit group 324 besides the middle position, such as the edge position of the display partition SA.
  • the positions of the second-type pixel circuits 323 in multiple pixel circuit groups 324 can also be the same.
  • the arrangement positions of the second type of pixel circuits 323 in at least two pixel circuit groups 324 may be different, so that the arrangement positions of the multiple second type of pixel circuits 323 in the display area 100a are disordered. Based on the multiple electrical signals detected by the second type of pixel circuits 323 at different positions in at least two pixel circuit groups 324, the threshold voltage of the driving transistor T1 of the pixel circuit in at least two pixel circuit groups 324 is compensated, which can make the brightness uniformity of the display area 100a better.
  • the second type of pixel circuits 323 in at least two pixel circuit groups 324 are misaligned.
  • the second type of pixel circuits 323 in at least two pixel circuit groups 324 are misaligned.
  • the sensing transistors T4 of at least two second-type pixel circuits 323 in adjacent pixel circuit groups 324 are aligned and connected to a sensing line 327.
  • the sensing transistors T4 aligned in adjacent pixel circuit groups 324 can share a single sensing line 327, reducing the number of sensing lines 327, decreasing the area occupied by the sensing lines 327, and allowing more space to be used for more pixel circuits 321, further improving the resolution of the display panel 100.
  • the sensing transistors T4 of four second-type pixel circuits 323 in four adjacent pixel circuit groups 324 are aligned and connected to a single sensing line 327.
  • the sensing transistors T4 of at least two second-type pixel circuits 323 in adjacent pixel circuit groups 324 are aligned and connected to at least two different sensing lines 327.
  • different sensing lines 327 can be used to independently acquire the electrical signal when the driving transistor T1 is turned on.
  • the sensing transistors T4 of the four second-type pixel circuits 323 of the four adjacent pixel circuit groups 324 are respectively connected to four different sensing lines 327 (sensing lines 327a, 327b, 327c, and 327d).
  • the sensing transistors T4 of at least two second-type pixel circuits 323 located in adjacent pixel circuit groups 324 are aligned in the extension direction of the scan line 325, i.e., in the first direction x.
  • a first type pixel circuit 322 is disposed between two second type pixel circuits 323 in adjacent pixel circuit groups 324.
  • a first type pixel circuit 322 is disposed between two second type pixel circuits 323 in adjacent pixel circuit groups 324 in both the extension direction of the data line 328 and the extension direction of the scan line 325.
  • two second-type pixel circuits 323 located in adjacent pixel circuit groups 324 may be arranged adjacently.
  • two second-type pixel circuits 323 located in adjacent pixel circuit groups 324 are arranged adjacently along the edges of adjacent display partitions SA. It should be noted that the connection point CP in Figures 3 and 4 indicates that the sensing line 327 is connected to the sensing transistor T4.
  • the following describes the operation of the second type of pixel circuit 323 in conjunction with the driving timing of the second type of pixel circuit 323.
  • Figure 9 is a timing diagram of the driving of the second type of pixel circuit shown in Figure 8.
  • the operation of the second type of pixel circuit 323 includes the external detection period t1 of the threshold voltage, the data voltage writing period t2, and the light emission period t3.
  • the light emission control signal EM is at a low level
  • the scan signal Pscan is at a low level
  • the data signal Data is a reference voltage
  • the first power supply voltage VSS and the second power supply voltage VSS are different constant voltages.
  • the driving transistor T1, the switching transistor T2, the light emission control transistor T3, and the sensing transistor T4 are all turned on.
  • the sensing line 327 outputs the sensing current from the first terminal of the driving transistor T1 to the external processing circuit 51.
  • the external processing circuit 51 calculates the threshold voltage of the driving transistor T1 based on this sensing current.
  • the driving unit 40 obtains the compensation value of the threshold voltage based on the threshold voltage of the driving transistor T1 and the brightness curve.
  • the light emission control signal EM is at a high level
  • the scan signal Pscan is at a low level
  • the data signal Data is the compensation data voltage, which is obtained based on the compensation value and the original data voltage.
  • Switching transistor T2 is turned on, light emission control transistor T3 is turned off, driving transistor T1 is turned off, and the compensation data voltage is written to the gate of driving transistor T1.
  • the light-emitting control signal EM is at a low level
  • the scan signal Pscan is at a high level
  • the data signal Data is at a low level.
  • Switching transistor T2 and sensing transistor T4 are off, while light-emitting control transistor T3 and driving transistor T1 are on, and the light-emitting device 331 emits light.
  • the external detection period t1 of the threshold voltage can be before the frame display period (including the data voltage writing period t2 and the emission period t3). Based on a single detected threshold voltage, the compensation value corresponding to the threshold voltage can be compensated during the data voltage writing period t2 of multiple frames.
  • the operation of the first type of pixel circuit 322 is basically similar to that of the second type of pixel circuit 323.
  • the similarities include that the operation of the first type of pixel circuit 322 also includes a data voltage writing period t2 and a light emission period t3.
  • the data voltage writing period t2 and the light emission period t3 of the first type of pixel circuit 322 can be found in the description of the corresponding periods in the second type of pixel circuit 323, and will not be repeated here.
  • the differences include that the operation of the first type of pixel circuit 322 does not include the aforementioned external detection period t1 of the threshold voltage.
  • this application also provides a display device, which includes the aforementioned display panel 100.
  • the display device can be applied to virtual reality products, televisions, watches, mobile phones, tablet computers, and other electronic devices.
  • the plurality of pixel circuits include a first type of pixel circuit and a second type of pixel circuit.
  • the second type of pixel circuit includes a sensing transistor capable of detecting the threshold voltage of a transistor, while the first type of pixel circuit does not include the sensing transistor.
  • threshold voltage compensation can be performed on the first type of pixel circuit and the second type of pixel circuit, thereby improving the brightness uniformity of the display panel.
  • the first type of pixel circuit does not include the sensing transistor, resulting in a smaller number of transistors in the first type of pixel circuit and a smaller layout area occupied by the first type of pixel circuit.
  • the hybrid design of the first type of pixel circuit and the second type of pixel circuit can balance the high resolution and brightness uniformity of the display panel and display device.

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Abstract

本申请提供一种显示面板及显示装置。多个像素电路包括分别与多个发光器件连接的第一类像素电路和第二类像素电路。第一类像素电路和第二类像素电路均包括驱动晶体管。感测线与第二类像素电路的驱动晶体管连接，以接收第二类像素电路中导通的驱动晶体管输出的电信号。外部电路与感测线连接，且被配置为获取电信号。

Description

显示面板及显示装置 技术领域
本申请涉及显示技术领域，尤其涉及一种显示面板及显示装置。
 背景技术
目前，虚拟现实（Virtual Reality，VR）产品是显示领域的研究热点之一。为了满足用户多样化的需求，虚拟现实产品需要具有高分辨率以及良好的亮度均一性。然而，对于制备虚拟现实产品的显示装置而言，相关技术中显示装置的像素驱动电路占用较多的空间，导致较难同时实现虚拟现实产品的高分辨率和良好的亮度均一性。
 发明概述
有鉴于此，本申请提供一种显示面板及显示装置，以兼顾显示面板和显示装置的高分辨率和亮度均一性。
第一方面，本申请提供一种显示面板。显示面板具有显示区。显示面板包括位于显示区的多个发光器件以及多个像素电路、感测线以及外部电路。多个像素电路包括分别与多个发光器件连接的第一类像素电路和第二类像素电路。第一类像素电路和第二类像素电路均包括驱动晶体管。所述感测线与所述第二类像素电路的所述驱动晶体管连接，以接收所述第二类像素电路中导通的所述驱动晶体管输出的电信号。所述外部电路与所述感测线连接，且被配置为获取所述电信号。
第二方面，本申请还提供一种显示装置，显示装置包括上述显示面板。
有益效果
在本申请的一些实施例的显示面板和显示装置中，多个像素电路包括第一类像素电路和第二类像素电路。感测线与第二类像素电路的驱动晶体管连接，以接收第二类像素电路中导通的驱动晶体管输出的电信号。外部电路与感测线连接，且被配置为获取电信号。如此，第二类像素电路、感测线以及外部电路相互搭配，能侦测第二类像素电路的驱动晶体管的阈值电压对应的电信号，而第一类像素电路不具有支持侦测电信号的功能。外部电路可以根据电信号得到第二类像素电路中驱动晶体管的阈值电压的补偿值，利用补偿值对第一类像素电路和第二类像素电路的驱动晶体管进行阈值电压补偿，进而提高显示面板的亮度均一性。同时，第一类像素电路不具有支持侦测电信号的功能，使得第一类像素电路中的晶体管的数目较小，第一类像素电路占用的布设面积较小，进而有利于增加像素电路的数目，使得显示面板和显示装置实现高分辨率显示。换言之，第一类像素电路和第二类像素电路的混合式搭配设计，可以兼顾显示面板和显示装置的高分辨率和亮度均一性。
 附图说明
图1为本申请的一些实施例的显示面板的平面结构示意图；
图2为沿图1所示显示面板中的A-A’切线截取的剖面结构示意图；
图3为本申请的一些实施例的多个像素电路设置于显示区的平面结构示意图；
图4为本申请的另一些实施例的多个像素电路设置于显示区的平面结构示意图；
图5为本申请的一些实施例的第一类像素电路的电路图；
图6为本申请的一些实施例的第二类像素电路的电路图；
图7为本申请的另一些实施例的第一类像素电路的电路图；
图8为本申请的另一些实施例的第二类像素电路的电路图；
图9为图8所示第二类像素电路的驱动时序图。
附图标记如下：
100，显示面板；100a，显示区；SA，显示分区；100b，非显示区；CP，连接点；
31，基底；
32，驱动电路层；321，像素电路；322，第一类像素电路；323，323a，323b，323c，323d，第二类像素电路；324，像素电路组；T1，驱动晶体管；T2，开关晶体管；T3，发光控制晶体管；T4，感测晶体管；C，电容器； 325，扫描线；326，发光控制信号线；327，327a，327b，327c，327d，感测线；328，数据线；
33，发光器件层；331，发光器件；
34，薄膜封装层；
40，驱动单元；50，外部电路；51，外部处理电路；
Data，数据信号；Pscan，扫描信号；EM，发光控制信号；VSS，第一电源电压；VDD，第二电源电压；
x，第一方向；y，第二方向。
 本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
图1为本申请的一些实施例的显示面板的平面结构示意图。
如图1所示，显示面板100具有显示区100a以及围绕显示区100a设置的非显示区100b。显示面板100包括多条数据线328、多条扫描线325、多条发光控制信号线326以及外部电路50。外部电路50包括驱动单元40。
多条扫描线325设置于显示区100a，且沿第一方向x延伸并沿第二方向y间隔排布。
多条发光控制信号线326设置于显示区100a，且沿第一方向x延伸并沿第二方向y间隔排布。一条发光控制信号线326可以与一条扫描线325相邻设置。
多条数据线328沿第二方向y从显示区100a延伸至非显示区100b，并与绑定于非显示区100b的驱动单元40连接。多条数据线328还沿第一方向x间隔排布。多条数据线328与多条扫描线325以及多条发光控制信号线326绝缘地相交。
驱动单元40可以包括源极驱动器。
第一方向x与第二方向y相交。在一些实施例中，第一方向x与第二方向y可以垂直。在另一些实施例中，第一方向x与第二方向y之间的夹角可以为锐角或钝角。
图2为沿图1所示显示面板中的A-A’切线截取的剖面结构示意图。
如图2所示，显示面板100包括基底31、驱动电路层32以及发光器件层33。驱动电路层32设置于基底31上，发光器件层33设置于驱动电路层32背离基底31的一侧。
在一些实施例中，基底31可以包括玻璃基底，可以降低显示面板的制造成本。在另一些实施例中，基底31也可以包括柔性基底，使得显示面板100具有可弯折的功能。在又一些实施例中，基底31还可以包括硅基等半导体基底。
发光器件层33包括多个发光器件331。多个发光器件331位于显示区100a。每个发光器件331可以包括阳极、阴极以及位于阳极与阴极之间的发光层。多个发光器件331可以共用一个阴极。在一些实施例中，发光层可以包括有机发光层，使得发光器件331为有机发光二极管。有机发光层包括有机材料。在另一些实施例中，发光层也可以包括无机发光层。
显示面板100还可以包括薄膜封装层34，薄膜封装层34对发光器件层33起到保护作用，降低氧气和水汽对发光器件331造成侵蚀的风险。薄膜封装层34位于发光器件层33背离基底31的一侧。薄膜封装层34可以包括两个无机薄膜封装层以及位于两个无机薄膜封装层之间的有机薄膜封装层。
在一些实施例中，显示面板100还可以包括功能层（未示意出），功能层包括圆偏光片、滤光层以及触控层中的至少一者。一些功能层可以设置于薄膜封装层34背离显示面板100的一侧。一些功能层也可以集成于显示面板100的内部，以薄化显示面板100的厚度。例如，将触控层集成于显示面板100的内部。
驱动电路层32包括多条数据线328、多条扫描线325以及多条发光控制信号线326。
图3为本申请的一些实施例的多个像素电路设置于显示区的平面结构示意图，图4为本申请的另一些实施例的多个像素电路设置于显示区的平面结构示意图。
如图3和图4所示，驱动电路层32还包括多个像素电路321，多个像素电路321分别与多个发光器件331连接，以驱动多个发光器件331发光，使得显示面板100能显示画面。
多个像素电路321位于显示区100a。多个像素电路321包括互相不同的第一类像素电路322和第二类像素电路323，以兼顾显示面板100的高分辨率和亮度均一性。
其中，第一类像素电路322不包括用于侦测其内部晶体管的阈值电压的功能器件，使得第一类像素电路322中的功能器件的数目可以较少，其占用的布设面积较小。在显示面板100的显示区100a的面积一定的情况下，第一类像素电路322占用的布设面积较小，显示区100a能设置更多的像素电路321，以满足对显示面板100的高分辨率需求。第二类像素电路323包括用于侦测其内部晶体管的阈值电压的功能器件。利用侦测的晶体管的阈值电压计算阈值电压的补偿值，基于补偿值对第一类像素电路322和第二类像素电路323中的晶体管的阈值电压进行粗补偿，进而满足显示面板100对良好的亮度均一性需求。
需要说明的是，尽管图3和图4示意出第一类像素电路322和第二类像素电路323间隔开，其只是为了示意出第一类像素电路322和第二类像素电路323的排布设计。第二类像素电路323与第二类像素电路323可以相邻且连续地设置。
图5为本申请的一些实施例的第一类像素电路的电路图，图6为本申请的一些实施例的第二类像素电路的电路图。
如图5和图6所示，第一类像素电路322和第二类像素电路323中的每一者均包括驱动晶体管T1。
如图3、图4以及图6所示，显示面板100还包括感测线327。感测线327与第二类像素电路323的驱动晶体管T1连接，以接收第二类像素电路323中导通的驱动晶体管T1输出的电信号。外部电路50与感测线327连接，且被配置为获取电信号。
第二类像素电路323、感测线327以及外部电路50相互搭配，能侦测第二类像素电路323的驱动晶体管T1的阈值电压对应的电信号，而第一类像素电路322不具有支持侦测电信号的功能。外部电路50可以根据电信号得到第二类像素电路323中驱动晶体管T1的阈值电压的补偿值，利用补偿值对第一类像素电路322和第二类像素电路323的驱动晶体管T1进行阈值电压补偿，进而提高显示面板100的亮度均一性。同时，第一类像素电路322不具有支持侦测电信号的功能，使得第一类像素电路322中的晶体管的数目较小，第一类像素电路322占用的布设面积较小，进而有利于增加像素电路的数目，使得显示面板和显示装置实现高分辨率显示。换言之，第一类像素电路322和第二类像素电路323的混合式搭配设计，可以兼顾显示面板的高分辨率和亮度均一性。
如图5和图6所示，在一些实施例中，第一类像素电路322和第二类像素电路323中的每一者还包括开关晶体管T2。第二类像素电路323还包括感测晶体管T4，而第一类像素电路322不包括感测晶体管T4。如此，第一类像素电路322不包括用于侦测第一类像素电路322中驱动晶体管T1的阈值电压的晶体管，而第二类像素电路323包括用于侦测第二类像素电路323中驱动晶体管T1的阈值电压的晶体管，第一类像素电路322中晶体管的数目少于第二类像素电路323中晶体管的数目。
每个发光器件331的阴极接收第一电源电压VSS。第一电源电压VSS可以为低电平电压。
在第一类像素电路322和第二类像素电路323中，驱动晶体管T1导通时产生驱动电流，以驱动发光器件331发光。驱动晶体管T1包括栅极、第一极以及第二极。驱动晶体管T1的第一极与发光器件331的阳极连接。驱动晶体管T1的第二极接收第二电源电压VDD。第二电源电压VDD与第一电源电压VSS不同。例如，第二电源电压VDD可以大于第一电源电压VSS，且第二电源电压VDD可以为高电平电压。
在本申请中，第一极为源极和漏极中的一者，第二极为源极和漏极中的另一者。
在第一类像素电路322和第二类像素电路323中，开关晶体管T2控制数据线328传输的数据信号Data传输至驱动晶体管T1的栅极。开关晶体管T2包括第一极、第二极以及栅极。开关晶体管T2的第一极接收数据信号Data。开关晶体管T2的第二极与驱动晶体管T1的栅极连接。开关晶体管T2的栅极接收扫描线325传输的扫描信号Pscan。
在第二类像素电路323中，感测晶体管T4控制驱动晶体管T1导通时其第一极输出的电流或电压的感测。感测晶体管T4包括第一极和第二极。感测晶体管T4的第一极与驱动晶体管T1的第一极连接。感测晶体管T4的第二极与感测线327连接。感测线327与外部电路50连接。如此，第二类像素电路323是可以实现阈值电压的外部补偿的像素电路。比起实现阈值电压的内部补偿的像素电路，例如，7T1C像素电路，即包括7个晶体管和一个电容器的像素电路，第二类像素电路323中晶体管的数目更少，更有利于实现高分辨率。
在一些实施例中，如图5和图6所示，第一类像素电路322和第二类像素电路323中的每一者均还均包括电容器C。电容器C连接于驱动晶体管T1的第一极与驱动晶体管T1的栅极之间。如此，驱动晶体管T1导通时，电容器C保证驱动晶体管T1能稳定地驱动发光器件331发光。
如图1、图3以及图4所示，外部电路50还可以包括与驱动单元40连接的外部处理电路51。外部处理电路51可以通过感测线327接收第二类像素电路323中驱动晶体管T1导通时的电信号（感测电流或感测电压），将电信号从模拟信号转换为数字信号后，再进行运算，得到驱动晶体管T1的阈值电压或者驱动晶体管T1的阈值电压的补偿值。接着，外部处理电路51中的存储单元（未示意出）存储阈值电压或者补偿值，然后，阈值电压或者补偿值从数字信号转换为模拟信号后传输至驱动单元40，驱动单元40根据阈值电压或补偿值中的一种对应的模拟信号和亮度曲线，对第一类像素电路322和第二类像素电路323中的驱动晶体管T1的阈值电压进行精细化的补偿，改善显示面板100的亮度均一性。其中，亮度曲线是通过获取显示面板显示时的显示画面，计算显示面板的亮度差异得到。亮度曲线的获取是常规技术，此处不再赘述。
在一些实施例中，外部处理电路51可以包括模数转换电路（未示意出）、计算单元（未示意出）、存储单元（未示意出）以及数模转换电路（未示意出）。
模数转换电路通过感测线327接收第二类像素电路323中驱动晶体管T1导通时的电信号（感测电流或感测电压），将电信号转换为数字信号。
计算单元接收模数转换电路输出的数字信号，并基于预设数据集和数字信号计算得到驱动晶体管T1的阈值电压或者驱动晶体管T1的阈值电压的补偿值。预设数据集可以包括预设电信号与预设阈值电压之间映射关系对应的数据，或者，预设数据集可以包括预设电信号与预设补偿值之间映射关系对应的数据。
存储单元接收计算单元计算得到的阈值电压或者补偿值。
数模转换电路接收阈值电压或者补偿值，并将其转换为模拟信号输出至驱动单元40。
图5所示第一类像素电路322包括两个晶体管和一个电容器，该第一类像素电路322的晶体管的数目较少，能满足高分辨率的要求。图6所示第二类像素电路323包括三个晶体管和一个电容器，晶体管的数目较少进而满足高分辨率的要求，同时还能实现阈值电压的外部补偿。图5所示第一类像素电路322和图6所示第二类像素电路323的混合式设计，兼顾驱动晶体管T1的阈值电压的外部补偿的同时，显示面板100中有更多的空间设置像素电路321进而实现高分辨率。
在相关技术中，显示面板的像素电路通常使用单一类型的像素电路，难以同时兼顾高分辨率和阈值电压补偿。例如，玻璃基有机发光二极管显示面板通常采用具有内部补偿功能的7T1C像素电路，可以实现阈值电压补偿进而改善亮度均一性，但该像素电路中的晶体管数目太多，导致难以实现1500每英寸像素及以上的像素密度。
在一些实施例中，对于图5和图6所示的第一类像素电路322和第二类像素电路323，第二电源电压VDD和第一电源电压VSS可以均是固定电源电压信号，即第二电源电压VDD和第一电源电压VSS均是不变的。
在另一些实施例中，对于图5和图6所示的第一类像素电路322和第二类像素电路323，第二电源电压VDD和第一电源电压VSS中的至少一者是可以变化，以使得第二电源电压VDD与第一电源电压VSS的差值可以变化。通过不同的差值可以控制驱动晶体管T1是否导通。驱动晶体管T1导通时，发光器件331发光，显示面板显示一定亮度的画面。驱动晶体管T1关闭时，显示面板显示黑画面，即显示面板具有插黑功能。因此，通过图5所示的第一类像素电路322和图6所示的第二类像素电路323的混合式设计，可以兼顾显示面板的高分辨率、阈值电压的外部补偿以及插黑功能。
在另一些实施例中，在驱动晶体管T1导通的情况下，第二电源电压VDD与第一电源电压VSS的差值为第一差值。在驱动晶体管T1关闭的情况下，第二电源电压VDD与第一电源电压VSS的差值为第二差值，第二差值与第一差值不同。
在一些实施例中，感测晶体管T4还包括栅极，感测晶体管T4的栅极接收扫描线325传输的扫描信号Pscan。如此，在每个第二类像素电路323中，感测晶体管T4的栅极和开关晶体管T2的栅极可以连接传输扫描信号Pscan的一条扫描线325，减少扫描线的数目，提供更多的空间设置像素电路321，进一步地提高显示面板100的分辨率。并且，在扫描线325的延伸方向上，第一类像素电路322和第二类像素电路323的开关晶体管T2的栅极也可以连接传输扫描信号Pscan的一条扫描线325，进一步地减少扫描线的数目，提供更多的空间设置像素电路321，进一步地提高显示面板100的分辨率。
在另一些实施例中，在第二类像素电路323中，感测晶体管T4的栅极与开关晶体管T2的栅极也可以分别接收两个不同的扫描信号。如此，感测晶体管T4和开关晶体管T2分别受控于不同的扫描信号，两者能独立地被控制，进而更好地实现数据信号Data的写入和阈值电压的侦测。
图7为本申请的另一些实施例的第一类像素电路的电路图，图8为本申请的另一些实施例的第二类像素电路的电路图。
在另一些实施例中，图7所示的第一类像素电路与图5所示第一类像素电路基本相似，图8所示的第二类像素电路与图6所示的第二类像素电路基本相似，相同之处不再赘述，不同之处包括，图7所示第一类像素电路322和图8所示第二类像素电路323中的每一者均还均包括发光控制晶体管T3。发光控制晶体管T3用于控制发光器件331的发光时间。发光控制晶体管T3导通时，发光器件331发光，显示面板100显示一定亮度的画面。发光控制晶体管T3关闭时，发光器件331不发光，显示面板100显示黑画面，即显示面板100具有插黑功能。
在图7所示第一类像素电路322和图8所示第二类像素电路323中，第二电源电压VDD和第一电源电压VSS可以均是固定电源电压信号。
在一些实施例中，发光控制晶体管T3可以包括栅极、第一极以及第二极。发光控制晶体管T3的栅极接收发光控制信号线326传输的发光控制信号EM。发光控制晶体管T3的第一极接收第二电源电压VDD。发光控制晶体管T3的第二极与驱动晶体管T1的第二极连接。如此，发光控制晶体管T3的第一极和第二极连接于驱动晶体管T1的第二极与传输第二电源电压VDD的电源信号线之间，降低第一类像素电路322和第二像素电路321工作时的功耗。
图7所示第一类像素电路322包括3个晶体管和一个电容器C，该第一类像素电路322中晶体管的数目较少，能满足高分辨率的要求，还满足显示面板的插黑功能。图8所示第二类像素电路323包括4个晶体管和一个电容器C，该第二类像素电路323中能同时实现驱动晶体管T1的阈值电压的侦测，满足显示面板的插黑功能。如此，第一类像素电路322和第二类像素电路323的混合式设计，兼顾驱动晶体管T1的阈值电压的外部补偿以及显示面板100的插黑功能的同时，显示面板100中有更多的空间设置像素电路321进而实现高分辨率。
对于图7至图8所示的第一类像素电路322和第二类像素电路323，在第二类像素电路323中增设感测晶体管T4，并在第一类像素电路322和第二类像素中同时增设发光控制晶体管T3，以在实现阈值电压的外部补偿和插黑功能的同时，提高显示面板100的分辨率。
并且，结合图5至图8可知，在第二类像素电路323具有支持侦测阈值电压对应的电信号的功能，而第一类像素电路322不具有支持侦测阈值电压对应的电信号的功能的基础之上，第一类像素电路322中晶体管的数目小于第二类像素电路323中晶体管的数目，且第二类像素电路323中晶体管的数目小于或等于4，可以保证显示面板100能实现像素电路的阈值电压的外部补偿以提高显示面板的亮度均一性的同时，能提高显示面板的分辨率。
可以理解的是，还可以基于显示面板100的其他功能需求，在第一类像素电路322和第二类像素电路323中增加一些晶体管。例如可以增设对驱动晶体管T1的栅极进行初始化的初始化晶体管，或者，增设对发光器件331的阳极进行初始化的复位晶体管等。当然，增设晶体管，一定程度上会影响显示面板100的分辨率。在一些实施例中，一个第一类像素电路322占用的布设面积小于一个第二类像素电路323占用的布设面积。如此，第一类像素电路322占用的布设面积较小，提供更多的空间设置更多的像素电路321，进而提高显示面板100的分辨率。
需要说明的是，第一类像素电路322占用的布设面积等于第一类像素电路322在基底31上的正投影面积，第二类像素电路323占用的布设面积等于第二类像素电路323在基底31上的正投影面积。第一类像素电路322在基底31上的正投影面积可以等于第一类像素电路322中的多个晶体管、电容器C以及连接多个晶体管和电容器C的走线在基底31上的正投影面积的总和。第二类像素电路323在基底31上的正投影面积同理，此处不再赘述。
如前所述，第一类像素电路322不包括感测晶体管T4，第二类像素电路323包括感测晶体管T4，使得第一类像素电路322中晶体管的数目小于第二类像素电路323中晶体管的数目，有利于一个第一类像素电路322占用的布设面积小于一个第二类像素电路323占用的布设面积。
在一些实施例中，在显示区100a中，第一类像素电路322的数目大于第二类像素电路323的数目。如此，布设面积较大且数目较少的第二类像素电路323用于侦测驱动晶体管T1的阈值电压，以实现阈值电压的外部补偿，使显示面板100具有良好的亮度均一性，同时布设面积较小且数目较多的第一类像素电路322可以增加像素电路321的数目，使显示面板100具有高分辨率。
对于图5至图8所示的像素电路，在一些实施例中，第一类像素电路322中的驱动晶体管T1与第二类像素电路323中的驱动晶体管T1相同；和/或，第一类像素电路322中的开关晶体管T2与第二类像素电路323中的开关晶体管T2相同；和/或，第一类像素电路322中的发光控制晶体管T3与第二类像素电路323中的发光控制晶体管T3相同。如此，第一类像素电路322中的至少一个晶体管和第二类像素电路323中对应的晶体管相同，采用相同的制程工艺制备第一类像素电路322和第二类像素电路323中的晶体管，简化显示面板100的制造工艺。
在一个具体的实施例中，第一类像素电路322中的驱动晶体管T1与第二类像素电路323中的驱动晶体管T1相同，第一类像素电路322中的开关晶体管T2与第二类像素电路323中的开关晶体管T2相同，且第一类像素电路322中的发光控制晶体管T3与第二类像素电路323中的发光控制晶体管T3相同。如此，进一步地简化显示面板100的制造工艺。并且，第一类像素电路322中的驱动晶体管T1与第二类像素电路323中的驱动晶体管T1相同，采用侦测到的第二类像素电路323中的驱动晶体管T1的阈值电压或者补偿值，能更好地补偿第一类像素电路322中的驱动晶体管T1的阈值电压，更好地提高显示亮度均一性。
需要说明的是，第一类像素电路322中的驱动晶体管T1与第二类像素电路323中的驱动晶体管T1相同是指，第一类像素电路322中的驱动晶体管T1与第二类像素电路323中的驱动晶体管T1的类型和大小相同。例如，第一类像素电路322中的驱动晶体管T1与第二类像素电路323中的驱动晶体管T1均可以为N型低温多晶硅晶体管，且两者的尺寸基本相同。其中，两者的尺寸基本相同考虑了制程原因导致的差异。第一类像素电路322中的开关晶体管T2与第二类像素电路323中的开关晶体管T2相同、第一类像素电路322中的发光控制晶体管T3与第二类像素电路323中的发光控制晶体管T3相同，可以依此类推，此处不再赘述。
在另一个具体的实施例中，第一类像素电路322中的两个晶体管与第二类像素电路323中对应的两个晶体管也可以相同，或者，第一类像素电路322中的一个晶体管与第二类像素电路323中对应的一个晶体管相同也可以相同。
对于图5至图8所示的像素电路，在一些实施例中，第一类像素电路322中的驱动晶体管T1和第二类像素电路323中的驱动晶体管T1均包括低温多晶硅晶体管；和/或，第一类像素电路322中的开关晶体管T2和第二类像素电路323中的开关晶体管T2均包括低温多晶硅晶体管；和/或，第一类像素电路322中的发光控制晶体管T3和第二类像素电路323中的发光控制晶体管T3均包括低温多晶硅晶体管；和/或，感测晶体管T4包括低温多晶硅晶体管。如此，第一类像素电路322的至少一个晶体管和第二类像素电路323中的至少一个晶体管为布设面积较小的低温多晶硅晶体管，进一步地减小单个像素电路321占用的布设面积，有利于增加像素电路321的数目，显示面板100能实现高分辨率。
在一个具体的实施例中，第一类像素电路322中的驱动晶体管T1和第二类像素电路323中的驱动晶体管T1均包括低温多晶硅晶体管，第一类像素电路322中的开关晶体管T2和第二类像素电路323中的开关晶体管T2均包括低温多晶硅晶体管，第一类像素电路322中的发光控制晶体管T3和第二类像素电路323中的发光控制晶体管T3均包括低温多晶硅晶体管，感测晶体管T4包括低温多晶硅晶体管。如此，以进一步地减小单个像素电路321占用的布设面积，有利于增加像素电路321的数目，显示面板100能实现高分辨率。
在另一些实施例中，第一类像素电路322中的驱动晶体管T1和第二类像素电路323中的驱动晶体管T1中的至少一者也可以包括金属氧化物晶体管。在另一些实施例中，第一类像素电路322中的开关晶体管T2和第二类像素电路323中的开关晶体管T2中的至少一者也可以包括金属氧化物晶体管。在另一些实施例中，第一类像素电路322中的发光控制晶体管T3和第二类像素电路323中的发光控制晶体管T3中的至少一者也可以包括金属氧化物晶体管。在另一些实施例中，感测晶体管T4也可以包括金属氧化物晶体管。
对于图5至图8所示的像素电路，在一些实施例中，第一类像素电路322中的驱动晶体管T1和第二类像素电路323中的驱动晶体管T1为N型晶体管；和/或，第一类像素电路322中的开关晶体管T2和第二类像素电路323中的开关晶体管T2为P型晶体管；和/或，第一类像素电路322中的发光控制晶体管T3和第二类像素电路323中的发光控制晶体管T3为P型晶体管；和/或，第二类像素电路323中的感测晶体管T4为P型晶体管。
在一个具体的实施例中，第一类像素电路322中的驱动晶体管T1和第二类像素电路323中的驱动晶体管T1均为N型晶体管。如此，以便于实现驱动晶体管T1的阈值电压的侦测和补偿。
在一个具体的实施例中，第一类像素电路322中的开关晶体管T2和第二类像素电路323中的开关晶体管T2为P型晶体管。第一类像素电路322中的发光控制晶体管T3和第二类像素电路323中的发光控制晶体管T3为P型晶体管。第二类像素电路323中的感测晶体管T4为P型晶体管。如此，降低开关晶体管T2、发光控制晶体管T3以及感测晶体管T4的驱动功耗。
在一些实施例中，如图3和图4所示，多个像素电路321划分为阵列排布的多个像素电路组324，一个像素电路组324包括至少一个第二类像素电路323和多个第一类像素电路322。显示面板100的显示区100a划分为多个阵列排布的显示分区SA，一个显示分区SA设置有一个像素电路组324。如此，在采用第一类像素电路322和第二类像素电路323相互搭配的基础上，一个像素电路组324可以作为最小的阈值电压的补偿单元，以实现阈值电压的粗补偿，改善显示分区SA的亮度均一性。
一个像素电路组324作为最小的阈值电压补偿单元是指，基于一个像素电路组324中的至少一个第二类像素电路323侦测的驱动晶体管T1的阈值电压对应的电信号，对一个像素电路组324中的多个第一类像素电路322和至少一个第二类像素电路323的驱动晶体管T1均进行阈值电压补偿。
需要说明的是，像素电路组324是作为像素驱动电路的最小重复单元在显示区100a阵列排布。并且，在显示区100a，像素电路组324的数目越多，每个像素电路组324中的像素电路321的数目越少，每个像素电路组324能实现更精细化的阈值电压补偿，像素电路组324对应的显示分区SA的亮度均一性会更好。
在一些实施例中，在一个像素电路组324中，第二类像素电路323的数目小于第一类像素电路322的数目。如此，基于数目较少的第二类像素电路323可以侦测电信号，并基于电信号实现一个像素电路组324中多个像素电路的驱动晶体管T1的阈值电压的补偿。与此同时，还基于数目较多的第一类像素电路322提高显示面板100的分辨率。
在一些实施例中，多个像素电路组324在显示区100a可以呈二维阵列排布，例如沿数据线328的延伸方向（第二方向y）和扫描线325的延伸方向（第一方向x）延伸排布，以简化与像素电路321连接的走线的设计。在多个像素电路组324呈二维阵列排布的情况下，与多个像素电路组324对应的多个显示分区SA也可以呈二维阵列排布。
在另一些实施例中，多个像素电路321也可以呈一维阵列排布，例如沿数据线328的延伸方向或扫描线325的延伸方向延伸排布。在多个像素电路组324呈一维阵列排布的情况下，与多个像素电路组324对应的多个显示分区SA也可以呈一维阵列排布。
在一个像素电路组324中，第二类像素电路323的数目会影响显示面板100的分辨率和阈值电压补偿效果。具体而言，一个像素电路组324中的第二类像素电路323的数目越多，感测的阈值电压对应的电信号的数目可以更多，基于多个阈值电压对应的电信号可以实现更精准的补偿。然而，第二类像素电路323中的数目多，不利于减小一个像素电路组324占用的布设面积，进而不利于提高显示面板100的分辨率。并且，在一个像素电路组324中，第二类像素电路323的位置也会影响阈值电压的补偿效果。具体而言，不同位置的制程工艺存在差别，导致不同位置的第二类像素电路323的驱动晶体管T1的阈值电压也存在差别。基于此，本申请的一些实施例对一个像素电路组324中第二类像素电路323的数目和位置进行了优化。
在一些实施例中，在一个像素电路组324中，一个第二类像素电路323设置于相邻两个第一类像素电路322之间。如此，制程差异对第二类像素电路323的驱动晶体管T1的阈值电压的影响，与制程差异对相邻两个第一类像素电路322的驱动晶体管T1的阈值电压的影响相同或趋于相同。采用第二类像素电路323感测的阈值电压对应的电信号对相邻两个第一类像素电路322的驱动晶体管T1的阈值电压进行补偿时，能获得更好的阈值电压补偿效果，一个像素电路组324对应的显示分区SA的亮度均一性更好。
在一个具体的实施例中，如图3和图4所示，在一个像素电路组324中，多个第一类像素电路322围绕一个第二类像素电路323设置。如此，一个第二类像素电路323中驱动晶体管T1的阈值电压，与该第二类像素电路323周围的多个第一类像素电路322的驱动晶体管T1的阈值电压趋于相同。基于一个第二类像素电路323侦测的阈值电压对应的电信号，就可以实现多个第一类像素电路322的驱动晶体管T1的阈值电压的补偿，减小一个像素电路组324占用的面积，同时减小需要感测的阈值电压对应的电信号的数目，以简化与感测线327连接的外部处理电路51的结构，进而简化显示面板100的制造工艺。
在一些实施例中，如图3和图4所示，在一个像素电路组324中，可以只是设置一个第二类像素电路323。如此，一个像素电路组324中第二类像素电路323的数目最少，而第一类像素电路322的数目最多，减小一个像素电路组324占用的布设面积，进而可以设置更多像素电路组324以提高分辨率的同时，简化一个像素电路组324中像素电路321的阈值电压的补偿方法。
在另一些实施例中，在一个像素电路组324中，可以设置两个或两个以上的第二类像素电路323。基于两个或两个以上第二类像素电路323的驱动晶体管T1的阈值电压对应的电信号，可以得到更精准的补偿值，更好地实现阈值电压的外部补偿，更好地改善一个像素电路组324所在的显示分区SA的亮度均一性。
在一些实施例中，至少两个像素电路组324中的第二类像素电路323的布设位置相同，以简化多个像素电路组324的制程，并简化感测线327的布设方式。
可选地，在数据线328的延伸方向上，至少两个像素电路组324中的第二类像素电路323的布设位置相同。如此，简化多个像素电路组324的制程，还便于数据线328的延伸方向上至少两个像素电路组324中的第二类像素电路323与一条感测线327连接，进而减少感测线327的数目，有更多的空间设置像素电路，进而提高显示面板100的分辨率。
可选地，在扫描线325的延伸方向上，至少两个像素电路组324中第二类像素电路323的布设位置相同，以简化多个像素电路组324的制程。
示例性地，如图3和图4所示，在数据线328的延伸方向以及扫描线325的延伸方向上，多个像素电路组324中的第二类像素电路323均位于每个像素电路组324的中间位置。
可以理解的是，像素电路组324中的第二类像素电路323也可以位于每个像素电路组324除中间位置之外的其他位置，例如显示分区SA的边缘位置。
另外，每个像素电路组324中第二类像素电路323的数目为两个或两个以上时，多个像素电路组324中的第二类像素电路323的位置也可以相同。
在另一些实施例中，至少两个像素电路组324中第二类像素电路323的布设位置可以不同，使得显示区100a中多个第二类像素电路323的布设位置具有无序性，基于至少两个像素电路组324中不同位置的第二类像素电路323侦测的多个电信号，对至少两个像素电路组324中像素电路的驱动晶体管T1的阈值电压进行补偿，能使得显示区100a的亮度均一性更佳。
可选地，在数据线328的延伸方向上，和/或，在扫描线325的延伸方向上，至少两个像素电路组324中的第二类像素电路323错位设置。
示例性地，在扫描线325的延伸方向上，至少两个像素电路组324中的第二类像素电路323错位设置。
在一些实施例中，如图3所示，在数据线328的延伸方向上，也即第二方向y上，分别位于相邻像素电路组324的至少两个第二类像素电路323的感测晶体管T4对齐设置且与一条感测线327连接。如此，在数据线328的延伸方向上，分别位于相邻像素电路组324中对齐设置的感测晶体管T4可以共用一条感测线327，感测线327的数目可以更少，感测线327占用的布设面积更小，更多的空间设置更多的像素电路321，进一步地提高显示面板100的分辨率。例如，在数据线328的延伸方向上，四个相邻像素电路组324的四个第二类像素电路323的感测晶体管T4对齐设置且与一条感测线327连接。在另一些实施例中，如图4所示，在数据线328的延伸方向上，分别位于相邻像素电路组324中的至少两个第二类像素电路323的感测晶体管T4对齐设置且分别与至少两条不同的感测线327连接。如此，在数据线328的延伸方向上，对于分别位于相邻像素电路组324中对齐设置的感测晶体管T4，可以采用不同的感测线327独立地采集驱动晶体管T1导通时的电信号。例如，在数据线328的延伸方向上，四个相邻像素电路组324的四个第二类像素电路323的感测晶体管T4（第二类像素电路323a、第二类像素电路323b、第二类像素电路323c以及第二类像素电路323d）分别与四条不同的感测线327（感测线327a、感测线327b、感测线327c以及感测线327d）连接。
在一些实施例中，如图3和图4所示，在扫描线325的延伸方向上，也即第一方向x上，分别位于相邻像素电路组324的至少两个第二类像素电路323的感测晶体管T4对齐设置。
在一些实施例中，如图3和图4所示，分别位于相邻像素电路组324中的两个第二类像素电路323之间设置有第一类像素电路322。示例性地，在数据线328的延伸方向以及扫描线325的延伸方向上，分别位于相邻像素电路组324中的两个第二类像素电路323之间设置有第一类像素电路322。
在另一些实施例中，分别位于相邻像素电路组324的两个第二类像素电路323可以相邻设置。示例性地，分别位于相邻像素电路组324的两个第二类像素电路323沿着相邻显示分区SA的边缘相邻设置。需要说明的是，图3和图4中的连接点CP示意感测线327与感测晶体管T4连接。
以下结合第二类像素电路323的驱动时序，对第二类像素电路323的工作过程中进行描述。
图9为图8所示第二类像素电路的驱动时序图。第二类像素电路323的工作过程包括阈值电压的外部侦测时段t1、数据电压写入时段t2以及发光时段t3。
在阈值电压的外部侦测时段t1，发光控制信号EM为低电平电压，扫描信号Pscan分别为低电平电压，数据信号Data为参考电压，第一电源电压VSS和第二电源电压VSS为不同的恒定电压。驱动晶体管T1、开关晶体管T2导通、发光控制晶体管T3以及感测晶体管T4导通，感测线327将驱动晶体管T1的第一极输出的感测电流输出至外部处理电路51，外部处理电路51基于该感测电流计算得到驱动晶体管T1的阈值电压。然后，驱动单元40基于驱动晶体管T1的阈值电压和亮度曲线得到阈值电压的补偿值。
在数据电压写入时段t2，发光控制信号EM为高电平电压，扫描信号Pscan为低电平电压，数据信号Data为补偿数据电压，补偿数据电压是根据补偿值以及原始数据电压得到。开关晶体管T2导通，发光控制晶体管T3关闭，驱动晶体管T1关闭，补偿数据电压写入至驱动晶体管T1的栅极。
在发光时段t3，发光控制信号EM为低电平电压，扫描信号Pscan为高电平电压，数据信号Data为低电平电压。开关晶体管T2和感测晶体管T4关闭，发光控制晶体管T3和驱动晶体管T1导通，发光器件331发光。
在一些实施例中，阈值电压的外部侦测时段t1可以在帧画面显示时段（包括数据电压写入时段t2和发光时段t3）之前。基于一次侦测到的阈值电压，可以在多个帧画面的数据电压写入时段t2补偿阈值电压对应的补偿值。
需要说明的是，第一类像素电路322的工作过程与第二类像素电路323的工作过程中基本相似，相同之处包括，第一类像素电路322的工作过程也包括数据电压写入时段t2以及发光时段t3。第一类像素电路322的数据电压写入时段t2以及发光时段t3，可以参见第二类像素电路323中对应的时段的描述，此处不再赘述。不同之处包括，第一类像素电路322的工作过程不包括上述阈值电压的外部侦测时段t1。基于相同的发明构思，本申请还提供一种显示装置，显示装置包括上述显示面板100。显示装置可以应用于虚拟现实产品、电视、手表、手机、平板电脑等电子设备。
综上所述，在本申请的一些实施例的显示面板和显示装置中，多个像素电路包括第一类像素电路和第二类像素电路。第二类像素电路包括能实现晶体管的阈值电压侦测的感测晶体管，而第一类像素电路不包括该感测晶体管。利用侦测的阈值电压，可以对第一类像素电路和第二类像素电路进行阈值电压补偿，进而提高显示面板的亮度均一性。同时，第一类像素电路不包括该感测晶体管，使得第一类像素电路中的晶体管的数目较小，第一类像素电路占用的布设面积较小，增加像素电路的数目，使得显示面板和显示装置实现高分辨率显示。换言之，第一类像素电路和第二类像素电路的混合式搭配设计，可以兼顾显示面板和显示装置的高分辨率和亮度均一性。
以上实施例的说明只是用于帮助理解本申请的技术方案及其核心思想；本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例的技术方案的范围。

Claims (20)

  1. 一种显示面板，其中，所述显示面板具有显示区，所述显示面板包括：
    多个发光器件，位于所述显示区；以及
    多个像素电路，位于所述显示区，且包括多个所述发光器件连接的第一类像素电路和第二类像素电路，所述第一类像素电路和所述第二类像素电路均包括驱动晶体管；
    感测线，与所述第二类像素电路的所述驱动晶体管连接，以接收所述第二类像素电路中导通的所述驱动晶体管输出的电信号；以及
    外部电路，与所述感测线连接，且被配置为获取所述电信号。
  2. 根据权利要求1所述的显示面板，其中，所述第一类像素电路中晶体管的数目小于所述第二类像素电路中晶体管的数目，且所述第二类像素电路中晶体管的数目小于或等于4。
  3. 根据权利要求1所述的显示面板，其中，一个所述第一类像素电路占用的布设面积小于一个所述第二类像素电路占用的布设面积。
  4. 根据权利要求1所述的显示面板，其中，在所述显示区中，所述第一类像素电路的数目大于所述第二类像素电路的数目。
  5. 根据权利要求1所述的显示面板，其中，多个所述像素电路划分为阵列排布的多个像素电路组，一个所述像素电路组包括至少一个所述第二类像素电路和多个所述第一类像素电路。
  6. 根据权利要求5所述的显示面板，其中，在一个所述像素电路组中，一个所述第二类像素电路设置于相邻两个所述第一类像素电路之间。
  7. 根据权利要求5所述的显示面板，其中，在一个所述像素电路组中，多个所述第一类像素电路组围绕一个所述第二类像素电路设置。
  8. 根据权利要求5所述的显示面板，其中，至少两个所述像素电路组中的所述第二类像素电路的布设位置相同。
  9. 根据权利要求1所述的显示面板，其中，每个所述发光器件包括阳极和接收第一电源电压的阴极；
    所述驱动晶体管包括栅极、第一极和第二极，所述驱动晶体管的第一极与所述发光器件的阳极连接，所述驱动晶体管的第二极接收第二电源电压，所述第二电源电压与所述第一电源电压不同；
    所述第一类像素电路和所述第二类像素电路中的每一者均还包括：
    开关晶体管，包括第一极和第二极，所述开关晶体管的第一极接收数据信号，所述开关晶体管的第二极与所述驱动晶体管的栅极连接；
    其中，所述第二类像素电路还包括感测晶体管，所述感测晶体管包括第一极和第二极，所述感测晶体管的第一极和第二极连接于所述第二类像素电路的所述驱动晶体管的第一极与所述感测线之间。
  10. 根据权利要求9所述的显示面板，其中，所述第一类像素电路和所述第二类像素电路中的每一者均还包括：
    发光控制晶体管，包括第一极、第二极以及栅极，所述发光控制晶体管的栅极接收发光控制信号，所述发光控制晶体管的第一极接收所述第二电源电压，所述发光控制晶体管的第二极与所述驱动晶体管的第二极连接；以及
    电容器，连接于所述驱动晶体管的第一极与所述驱动晶体管的栅极之间。
  11. 根据权利要求9所述的显示面板，其中，多个所述像素电路划分为阵列排布的多个像素电路组，一个所述像素电路组包括至少一个所述第二类像素电路和多个所述第一类像素电路；
    所述显示面板还包括：
    多条数据线，用于传输所述数据信号，并分别与所述第一类像素电路和所述第二类像素电路的所述开关晶体管的第一极连接；
    在所述数据线的延伸方向上，分别位于相邻所述像素电路组的至少两个所述第二类像素电路的所述感测晶体管对齐设置且与一条所述感测线连接。
  12. 根据权利要求9所述的显示面板，其中，多个所述像素电路划分为阵列排布的多个像素电路组，一个所述像素电路组包括至少一个所述第二类像素电路和多个所述第一类像素电路；
    所述显示面板还包括：
    多条数据线，用于传输所述数据信号，并分别与所述第一类像素电路和所述第二类像素电路的所述开关晶体管的第一极连接；
    在所述数据线的延伸方向上，分别位于相邻所述像素电路组中的至少两个第二类像素电路的所述感测晶体管对齐设置且分别与至少两条不同的所述感测线连接。
  13. 根据权利要求9所述的显示面板，其中，所述第一电源电压和所述第二电源电压分别为不同的恒定电压。
  14. 根据权利要求9所述的显示面板，其中，在所述驱动晶体管导通的情况下，第二电源电压与所述第一电源电压的差值为第一差值；
    在所述驱动晶体管关闭的情况下，所述第二电源电压与所述第一电源电压的差值为第二差值，所述第二差值与所述第一差值不同。
  15. 根据权利要求9所述的显示面板，其中，所述感测晶体管还包括接收扫描信号的栅极，所述第一类像素电路和所述第二类像素电路的所述开关晶体管还包括接收所述扫描信号的栅极。
  16. 根据权利要求9所述的显示面板，其中，所述第一类像素电路中的所述驱动晶体管与所述第二类像素电路中的所述驱动晶体管相同；和/或，
    所述第一类像素电路中的所述开关晶体管与所述第二类像素电路中的所述开关晶体管相同。
  17. 根据权利要求9所述的显示面板，其中，所述第一类像素电路中的所述驱动晶体管和所述第二类像素电路中的所述驱动晶体管均包括低温多晶硅晶体管；和/或，
    所述第一类像素电路中的所述开关晶体管和所述第二类像素电路中的所述开关晶体管均包括低温多晶硅晶体管；和/或，
    所述第二类像素电路中的所述感测晶体管包括低温多晶硅晶体管。
  18. 根据权利要求9所述的显示面板，其中，所述第一类像素电路中的所述驱动晶体管和所述第二类像素电路中的所述驱动晶体管为N型晶体管；和/或，
    所述第一类像素电路中的所述开关晶体管和所述第二类像素电路中的所述开关晶体管为P型晶体管；和/或，
    所述第二类像素电路中的所述感测晶体管为P型晶体管。
  19. 一种显示装置，其中，所述显示装置包括显示面板，所述显示面板包括：
    多个发光器件，位于所述显示区；以及
    多个像素电路，位于所述显示区，且包括多个所述发光器件连接的第一类像素电路和第二类像素电路，所述第一类像素电路和所述第二类像素电路均包括驱动晶体管；
    感测线，与所述第二类像素电路的所述驱动晶体管连接，以接收所述第二类像素电路中导通的所述驱动晶体管输出的电信号；以及
    外部电路，与所述感测线连接，且被配置为获取所述电信号。
  20. 根据权利要求19所述的显示装置，其中，每个所述发光器件包括阳极和接收第一电源电压的阴极；
    所述驱动晶体管包括栅极、第一极和第二极，所述驱动晶体管的第一极与所述发光器件的阳极连接，所述驱动晶体管的第二极接收第二电源电压，所述第二电源电压与所述第一电源电压不同；
    所述第一类像素电路和所述第二类像素电路中的每一者均还包括：
    开关晶体管，包括第一极和第二极，所述开关晶体管的第一极接收数据信号，所述开关晶体管的第二极与所述驱动晶体管的栅极连接；
    其中，所述第二类像素电路还包括感测晶体管，所述感测晶体管包括第一极和第二极，所述感测晶体管的第一极和第二极连接于所述第二类像素电路的所述驱动晶体管的第一极与所述感测线之间。
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106504705A (zh) * 2016-11-24 2017-03-15 京东方科技集团股份有限公司 像素电路及其驱动方法、以及显示面板
CN107749280A (zh) * 2017-12-06 2018-03-02 京东方科技集团股份有限公司 显示装置的驱动方法及显示装置
CN108630147A (zh) * 2017-03-17 2018-10-09 昆山工研院新型平板显示技术中心有限公司 有源矩阵有机发光显示器及其驱动方法
CN110235193A (zh) * 2019-04-30 2019-09-13 京东方科技集团股份有限公司 像素电路及其驱动方法、显示装置及其驱动方法
CN110429120A (zh) * 2019-08-05 2019-11-08 京东方科技集团股份有限公司 一种阵列基板、其驱动方法、显示面板及显示装置
US20240169944A1 (en) * 2022-11-17 2024-05-23 Cytesi, Inc. Apparatus and system using active-matrix electrowetting-on-dielectric (am-ewod)

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106504705A (zh) * 2016-11-24 2017-03-15 京东方科技集团股份有限公司 像素电路及其驱动方法、以及显示面板
CN108630147A (zh) * 2017-03-17 2018-10-09 昆山工研院新型平板显示技术中心有限公司 有源矩阵有机发光显示器及其驱动方法
CN107749280A (zh) * 2017-12-06 2018-03-02 京东方科技集团股份有限公司 显示装置的驱动方法及显示装置
CN110235193A (zh) * 2019-04-30 2019-09-13 京东方科技集团股份有限公司 像素电路及其驱动方法、显示装置及其驱动方法
CN110429120A (zh) * 2019-08-05 2019-11-08 京东方科技集团股份有限公司 一种阵列基板、其驱动方法、显示面板及显示装置
US20240169944A1 (en) * 2022-11-17 2024-05-23 Cytesi, Inc. Apparatus and system using active-matrix electrowetting-on-dielectric (am-ewod)

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