WO2025223151A1 - 带输入功率保护的射频前端模组 - Google Patents

带输入功率保护的射频前端模组

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Publication number
WO2025223151A1
WO2025223151A1 PCT/CN2025/085806 CN2025085806W WO2025223151A1 WO 2025223151 A1 WO2025223151 A1 WO 2025223151A1 CN 2025085806 W CN2025085806 W CN 2025085806W WO 2025223151 A1 WO2025223151 A1 WO 2025223151A1
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WIPO (PCT)
Prior art keywords
terminal
resistor
circuit
mos transistor
capacitor
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PCT/CN2025/085806
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English (en)
French (fr)
Inventor
毛斌科
邵一祥
郭嘉帅
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Lansus Technologies Inc
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Lansus Technologies Inc
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Publication of WO2025223151A1 publication Critical patent/WO2025223151A1/zh
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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/52—Circuit arrangements for protecting such amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40—Circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier

Definitions

  • This invention relates to the field of radio frequency front-end technology, and in particular to a radio frequency front-end module with input power protection.
  • a typical TDD system RF front-end module such as a WIFI RF front-end module, consists of the following parts:
  • Power amplifier components are used to amplify the radio frequency signals output by the radio frequency chip
  • the receiving circuitry used to receive the signal path, typically includes a low-noise amplifier (LNA);
  • LNA low-noise amplifier
  • Radio frequency switching assembly used to switch between transmit and receive paths
  • the logic control component is used to control the working state of other components.
  • radio frequency (RF) power amplifiers primarily amplify small RF signals before outputting them to antennas or other carriers. If the input signal exceeds the power amplifier's capacity, it can easily overload and damage the amplifier, causing the entire system to fail.
  • Some technologies protect power amplifier transistors by limiting the peak power of the input signal, but this method is often not suitable for high peak-to-average power ratio (PAPR) radio frequency signals such as Wi-Fi and 5G NR.
  • PAPR peak-to-average power ratio
  • the PAPR of signals such as Wi-Fi and 5G NR can reach around 10dB.
  • the input limiting circuit may prematurely reduce the peak signal, resulting in signal quality degradation.
  • This invention provides an RF front-end module with input power protection, which aims to solve the problem that existing methods for limiting the peak value of amplifier input signals can lead to signal quality degradation.
  • this invention provides an RF front-end module with input power protection, comprising a signal input terminal, a bias circuit, an amplifier, and a signal output terminal; the signal input terminal, the bias circuit, the amplifier, and the signal output terminal are sequentially electrically connected.
  • the signal input terminal is connected to the input terminal of the amplifier
  • the bias circuit includes a coupling circuit, a rectifier circuit, a switching circuit, and a current mirror circuit.
  • the first terminal of the coupling circuit is connected to the signal input terminal, and the second terminal of the coupling circuit is connected to the first terminal of the rectifier circuit.
  • the coupling circuit isolates the DC signal input to the signal input terminal and allows the radio frequency signal to pass through.
  • the second terminal of the rectifier circuit is connected to the first terminal of the switching circuit.
  • the rectifier circuit rectifies the radio frequency signal and outputs an envelope signal.
  • the first terminal of the current mirror circuit is connected to the second terminal of the switching circuit, and the second terminal of the current mirror circuit is connected to the input terminal of the amplifier.
  • the current mirror circuit is controlled by the envelope signal and outputs a bias current to the amplifier.
  • the amplifier includes a first MOSFET, the gate of which serves as the input terminal of the amplifier, the source of which serves as the first output terminal of the amplifier, and the drain of which serves as the second output terminal of the amplifier.
  • the RF front-end module also includes a first capacitor, a second capacitor, and a first inductor.
  • the signal input terminal is connected to the gate of the first MOSFET through the first capacitor in series.
  • the first end of the second capacitor is connected to the drain of the first MOSFET, and the second end of the second capacitor is connected to the signal output terminal.
  • the source of the first MOSFET is grounded, the first end of the first inductor is connected to the drain of the first MOSFET, and the second end of the first inductor is connected to a first external power supply.
  • the first external power supply outputs a bias current to the drain of the first MOSFET.
  • the rectifier circuit includes a third capacitor, a second MOSFET, a fourth capacitor, and a fifth capacitor;
  • the first terminal of the third capacitor serves as the first terminal of the rectifier circuit and is connected to the second terminal of the coupling circuit;
  • the second terminal of the third capacitor is connected to the source, drain, and gate of the second MOSFET;
  • the drain of the second MOSFET is connected to the gate of the second MOSFET and is also grounded;
  • the source of the third MOSFET is connected to the first terminal of the fourth capacitor and the first terminal of the fifth capacitor, and serves as the second terminal of the rectifier circuit and is connected to the first terminal of the switching circuit;
  • the second terminal of the fourth capacitor is connected to the second terminal of the fifth capacitor and is also grounded.
  • the capacitance value of the fourth capacitor is greater than the capacitance value of the fifth capacitor.
  • the switching circuit includes a fourth MOSFET, a first resistor, and a second resistor; the first end of the first resistor serves as the first end of the switching circuit and is connected to the second end of the rectifier circuit, and the second end of the first resistor is connected to the gate of the fourth MOSFET; the source of the fourth MOSFET is grounded, the drain of the fourth MOSFET serves as the second end of the switching circuit and is connected to the first end of the mirror current source circuit, the gate of the fourth MOSFET is connected to the first end of the second resistor, and the second end of the second resistor is grounded.
  • the current mirror circuit includes a fifth MOSFET, a sixth MOSFET, a seventh MOSFET, a third resistor, and a fourth resistor;
  • the drain of the fifth MOSFET serves as the first terminal of the current mirror circuit and is connected to the second terminal of the switching circuit;
  • the gate of the fifth MOSFET is connected to both the drain of the fifth MOSFET and the gate of the seventh MOSFET;
  • the source of the fifth MOSFET is connected to both the drain of the sixth MOSFET and the gate of the sixth MOSFET;
  • the source of the sixth MOSFET is grounded;
  • the source of the seventh MOSFET serves as the second terminal of the current mirror circuit and is connected to the input terminal of the amplifier;
  • the first terminal of the fourth resistor is connected to the drain of the seventh MOSFET, and the second terminal of the fourth resistor is connected
  • the coupling circuit includes a fifth resistor, the first end of which serves as the first end of the coupling circuit and is connected to the signal input terminal, and the second end of which serves as the second end of the coupling circuit and is connected to the first end of the rectifier circuit.
  • the coupling circuit includes a fifth resistor, a sixth capacitor, and a coupler; the first end of the fifth resistor is grounded, the second end of the fifth resistor is connected to the first input end of the coupler, the first output end of the coupler is connected to the first end of the sixth capacitor, the second input end of the coupler serves as the first end of the coupling circuit and is connected to the signal input end, and the second output end of the coupler is connected to the input end of the amplifier;
  • the coupling circuit further includes an eighth MOS transistor, a sixth resistor, and a seventh resistor; the gate of the eighth MOS transistor is connected to the second terminal of the sixth capacitor and the first terminal of the sixth resistor, the drain of the eighth MOS transistor is connected to the first terminal of the seventh resistor, and serves as the second terminal of the coupling circuit while also being connected to the first terminal of the rectifier circuit; the second terminals of the sixth resistor and the seventh resistor are both connected to a second external power supply.
  • the coupling circuit includes a fifth resistor and a sixth capacitor, with the first end of the fifth resistor serving as the first end of the coupling circuit and connected to the signal input terminal, and the second end of the fifth resistor connected to the first end of the sixth capacitor;
  • the coupling circuit further includes an eighth MOS transistor, a sixth resistor, and a seventh resistor.
  • the gate of the eighth MOS transistor is connected to the second terminal of the sixth capacitor and the first terminal of the sixth resistor, respectively.
  • the drain of the eighth MOS transistor is connected to the first terminal of the seventh resistor and serves as the second terminal of the coupling circuit, which is also connected to the first terminal of the rectifier circuit.
  • the second terminals of the sixth resistor and the seventh resistor are both connected to a second external power supply.
  • the beneficial effect achieved by this invention is that it proposes a radio frequency power module with a bias circuit for input power protection.
  • the bias circuit in this radio frequency power module can detect the power of the input amplifier and actively reduce the bias current of the input power amplifier based on the detected average power of the input signal, thereby protecting the power amplifier.
  • Figure 1 is a schematic diagram of the existing radio frequency front-end module structure
  • Figure 2 is a circuit diagram of the RF front-end module with input power protection provided in an embodiment of the present invention
  • Figure 3 is a circuit diagram of another RF front-end module with input power protection provided in an embodiment of the present invention.
  • Figure 4 is a circuit diagram of another RF front-end module with input power protection provided in an embodiment of the present invention.
  • FIG. 2 is a circuit diagram of an RF front-end module with input power protection provided in an embodiment of the present invention.
  • the RF front-end module 100 includes a signal input terminal 101, a bias circuit 102, an amplifier 103, and a signal output terminal 104.
  • the signal input terminal 101, the bias circuit 102, the amplifier 103, and the signal output terminal 104 are electrically connected in sequence.
  • the signal input terminal is connected to the input terminal of the amplifier
  • the bias circuit 102 includes a coupling circuit 1021, a rectifier circuit 1022, a switching circuit 1023, and a current mirror circuit 1024.
  • the first end of the coupling circuit 1021 is connected to the signal input terminal, and the second end of the coupling circuit 1021 is connected to the first end of the rectifier circuit.
  • the coupling circuit 1021 is used to pick up the radio frequency signal input from the signal input terminal.
  • the second end of the rectifier circuit 1022 is connected to the first end of the switching circuit 1023.
  • the rectifier circuit 1022 is used to rectify the radio frequency signal and output an envelope signal.
  • the first end of the current mirror circuit 1024 is connected to the second end of the switching circuit 1023, and the second end of the current mirror circuit 1024 is connected to the input terminal of the amplifier 103.
  • the current mirror circuit 1024 is controlled by the envelope signal and outputs a bias current to the amplifier 103.
  • the amplifier 103 includes a first MOSFET Q1, the gate of the first MOSFET Q1 serves as the input terminal of the amplifier, the source of the first MOSFET Q1 serves as the first output terminal of the amplifier, and the drain of the first MOSFET Q1 serves as the second output terminal of the amplifier.
  • the RF front-end module also includes a first capacitor C1, a second capacitor C2, and a first inductor L1.
  • the signal input terminal 101 is connected to the gate of the first MOSFET Q1 through series connection of the first capacitor C1.
  • the first end of the second capacitor C2 is connected to the drain of the first MOSFET Q1, and the second end of the second capacitor C2 is connected to the signal output terminal.
  • the source of the first MOSFET Q1 is grounded, the first end of the first inductor L1 is connected to the drain of the first MOSFET Q1, and the second end of the first inductor L1 is connected to a first external power supply.
  • the first external power supply outputs a bias current to the drain of the first MOSFET Q1.
  • the rectifier circuit 1022 includes a third capacitor C3, a second MOSFET Q2, a third MOSFET Q3, a fourth capacitor C4, and a fifth capacitor C5.
  • the first terminal of the third capacitor C3 serves as the first terminal of the rectifier circuit 1022 and is connected to the second terminal of the coupling circuit 1021.
  • the second terminal of the third capacitor C3 is connected to the source, drain, and gate of the second MOSFET Q2.
  • the drain of the second MOSFET Q2 is connected to the gate of the second MOSFET Q2 and is also grounded.
  • the source of the third MOSFET Q3 is connected to the first terminals of the fourth capacitor C4 and the fifth capacitor C5, and serves as the second terminal of the rectifier circuit 1022 and is connected to the first terminal of the switching circuit 1023.
  • the second terminal of the fourth capacitor C4 is connected to the second terminal of the fifth capacitor C5 and is also grounded.
  • the third capacitor, C3, is used to isolate DC signals between circuits.
  • the gates and drains of the second MOSFET Q2 and the third MOSFET Q3 are connected together to form a diode rectifier circuit, which rectifies the input RF signal and outputs the RF envelope signal to the fourth capacitor C4 and the fifth capacitor C5.
  • the capacitance of the fourth capacitor C4 is greater than that of the fifth capacitor C5.
  • the fifth capacitor C5 has a smaller capacitance and is used to filter out unwanted radio frequency signals, while the fourth capacitor C4 has a larger capacitance and is used to filter out envelope fluctuation signals, so that the final output signal can more accurately reflect the average power of the input signal.
  • the fourth capacitor C4 can be removed to simplify the circuit.
  • the switching circuit 1023 includes a fourth MOSFET Q4, a first resistor R1, and a second resistor R2.
  • the first end of the first resistor R1 serves as the first end of the switching circuit 1023 and is connected to the second end of the rectifier circuit 1022.
  • the second end of the first resistor R1 is connected to the gate of the fourth MOSFET Q4.
  • the source of the fourth MOSFET Q4 is grounded, and the drain of the fourth MOSFET Q4 serves as the second end of the switching circuit 1023 and is connected to the first end of the current mirror circuit 1024.
  • the gate of the fourth MOSFET Q4 is connected to the first end of the second resistor R2, and the second end of the second resistor R2 is grounded.
  • the rectified output passes through the first resistor R1 to the current mirror circuit 1024, which is used to control the current of the current mirror circuit 1024.
  • the second resistor R2 is used to provide a pull-down path for the MOSFET in the current mirror circuit 1024.
  • the current mirror circuit 1024 includes a fifth MOSFET Q5, a sixth MOSFET Q6, a seventh MOSFET Q7, a third resistor R3, and a fourth resistor R4.
  • the drain of the fifth MOSFET serves as the first terminal of the current mirror circuit 1024 and is connected to the second terminal of the switching circuit 1023.
  • the gate of the fifth MOSFET Q5 is connected to both the drain of the fifth MOSFET Q5 and the gate of the seventh MOSFET Q7.
  • the source of the fifth MOSFET Q5 is connected to both the drain of the sixth MOSFET Q6 and the gate of the sixth MOSFET Q6.
  • the source of the sixth MOSFET Q6 is grounded.
  • the source of the seventh MOSFET Q7 serves as the second terminal of the current mirror circuit 1024 and is connected to the input terminal of the amplifier 103.
  • the first terminal of the third resistor R3 is connected to the drain of the fifth MOSFET Q5, and the second terminal of the third resistor R3 is connected to a second external power supply.
  • the first terminal of the fourth resistor R4 is connected to the drain of the seventh MOSFET Q7, and the second terminal of the fourth resistor R4 is connected to the second external power supply.
  • the fifth MOSFET Q5, the sixth MOSFET Q6, and the seventh MOSFET Q7 form a current mirror circuit, whose overall output is used to provide a bias current IBIAS to the drain of the first MOSFET Q1.
  • the coupling circuit 1021 includes a fifth resistor R5.
  • the first end of the fifth resistor R5 is connected to the signal input terminal 101 as the first end of the coupling circuit 1021, and the second end of the fifth resistor R5 is connected to the first end of the rectifier circuit 1022 as the second end of the coupling circuit 1021.
  • the fifth resistor R5 is connected to the RF path of the first MOSFET Q1. By selecting an appropriate value for the fifth resistor R5, a small portion of the RF energy of the input signal flows through the fifth resistor R5, while most of the RF energy enters the gate of the first MOSFET Q1 through the first capacitor C1. At the same time, the connection of the fifth resistor R5 has a small impact on the impedance of the RF path.
  • the coupling circuit 1021 includes a fifth resistor R5, a sixth capacitor C6, and a coupler Coup1.
  • the first end of the fifth resistor R5 is grounded, the second end of the fifth resistor R5 is connected to the first input end of the coupler Coup1, the first output end of the coupler Coup1 is connected to the first end of the sixth capacitor C6, the second input end of the coupler Coup1 serves as the first end of the coupling circuit 1021 and is connected to the signal input end 101, and the second output end of the coupler Coup1 is connected to the input end of the amplifier 103.
  • the sixth capacitor C6 is mainly used to isolate DC signals and allow radio frequency signals to pass through.
  • the coupling circuit 1021 further includes an eighth MOSFET Q8, a sixth resistor R6, and a seventh resistor R7.
  • the gate of the eighth MOSFET Q8 is connected to the second terminal of the sixth capacitor C6 and the first terminal of the sixth resistor R6, respectively.
  • the drain of the eighth MOSFET Q8 is connected to the first terminal of the seventh resistor R7, and serves as the second terminal of the coupling circuit 1021, simultaneously connecting to the first terminal of the rectifier circuit 1022.
  • the second terminals of both the sixth resistor R6 and the seventh resistor R7 are connected to a second external power supply.
  • the sixth resistor R6 and the seventh resistor R7 provide a suitable DC bias for the eighth MOSFET Q8, enabling it to operate in the amplification range.
  • the coupling circuit 1021 further includes an eighth MOSFET Q8, a sixth resistor R6, and a seventh resistor R7.
  • the gate of the eighth MOSFET Q8 is connected to the second terminal of the sixth capacitor C6 and the first terminal of the sixth resistor R6, respectively.
  • the drain of the eighth MOSFET Q8 is connected to the first terminal of the seventh resistor R7 and serves as the second terminal of the coupling circuit 1021, which is also connected to the first terminal of the rectifier circuit 1022.
  • the second terminals of the sixth resistor R6 and the seventh resistor R7 are both connected to a second external power supply.
  • the signal power when the input RF signal power is low, the signal power is also low after passing through the eighth MOSFET Q8 to the rectifier circuit.
  • the DC voltage output by the rectifier circuit is low, which makes the fourth MOSFET Q4 cut off.
  • the bias current IBIAS output by the current mirror is large, and the first MOSFET Q1 in the amplifier circuit works normally.
  • the signal power is also large as it passes through the eighth MOSFET Q8 to the rectifier circuit.
  • the DC voltage output by the rectifier circuit is high, which turns on the fourth MOSFET Q4.
  • the current flowing through the third MOSFET Q3 increases, the voltage drop of the first resistor R1 increases, the bias current IBIAS output by the current mirror decreases, and the gain of the first MOSFET Q1 decreases, thereby protecting the first MOSFET Q1.
  • the circuit structure shown in Figure 2 is essentially a simplified circuit structure without the eighth MOS transistor Q8 shown in Figures 3 and 4. It is mainly designed for cases where the preset input signal power threshold is large. In this circuit structure, some bipolar transistors can be used to replace the circuit to perform the same electrical function. It is understood that the rectifier circuits in all embodiments of this invention achieve the same technical effect.
  • the beneficial effect achieved by this invention is that it proposes a radio frequency power module with a bias circuit for input power protection.
  • the bias circuit in this radio frequency power module can detect the power of the input amplifier and actively reduce the bias current of the input power amplifier based on the detected average power of the input signal, thereby protecting the power amplifier.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Amplifiers (AREA)

Abstract

本发明适用于射频前端技术领域，尤其涉及一种带输入功率保护的射频前端模组，包括依次电连接的信号输入端，偏置电路，放大器，信号输出端；偏置电路包括耦合电路、整流电路、开关电路和镜像电流源电路，耦合电路用于隔离信号输入端输入的直流信号、通过射频信号；整流电路用于对所述射频信号进行整流，输出包络信号；所镜像电流源电路受包络信号控制，向所述放大器输出偏置电流。本发明射频功率模组中的偏置电路可以检测输入放大器的功率，并根据检测到的输入信号平均功率，主动降低输入功率放大器的偏置电流，达到保护功率放大器的目的。

Description

带输入功率保护的射频前端模组 技术领域
本发明适用于射频前端技术领域，尤其涉及一种带输入功率保护的射频前端模组。
背景技术
如图1所示，现有技术中，一个典型的TDD系统射频前端模组，如WIFI射频前端模组，由以下几部分组成：
功率放大组件，用于放大射频芯片输出射频信号；
接收电路组件，用于接收信号通路，通常包括一个低噪声放大器(LNA)；
射频开关组件，用于切换发射和接收通路；
逻辑控制组件，用于控制其他组件工作状态。
在无线通信系统中，射频功率放大器主要对射频小信号进行放大，再输出到天线或其他载体中。如果输入信号超出了功率放大器承受范围，很可能导致放大器因过载而损坏，使得整个系统失效。
某些技术通过限制输入信号峰值功率的方法来保护功率放大管，但这种方法对于WIFI、5G NR等大峰均比射频信号往往并不适用。WIFI、5G NR等信号的峰均比可达10dB左右，此时输入限制电路有可能会过早地削减峰值信号，导致信号质量受损。
发明内容
本发明提供一种带输入功率保护的射频前端模组，旨在解决现有技术限制放大器输入信号峰值的方法会导致信号质量受损的问题。
为解决上述问题，本发明提供一种带输入功率保护的射频前端模组，包括，信号输入端，偏置电路，放大器，信号输出端；所述信号输入端、所述偏置电路、所述放大器、所述信号输出端依次电连接；
所述信号输入端连接所述放大器的输入端；
所述偏置电路包括耦合电路、整流电路、开关电路和镜像电流源电路；所述耦合电路的第一端连接所述信号输入端，所述耦合电路的第二端连接所述整流电路的第一端，所述耦合电路用于隔离所述信号输入端输入的直流信号、通过射频信号；所述整流电路的第二端连接所述开关电路的第一端，所述整流电路用于对所述射频信号进行整流，输出包络信号；所述镜像电流源电路的第一端连接所述开关电路的第二端，所述镜像电流源电路的第二端连接所述放大器的输入端，所述镜像电流源电路受所述包络信号控制，向所述放大器输出偏置电流。
更进一步地，所述放大器包括第一MOS管，所述第一MOS管的栅极作为所述放大器的输入端，所述MOS管的源极作为所述放大器的第一输出端，所述MOS管的漏极作为所述放大器的第二输出端；所述射频前端模组还包括第一电容、第二电容、第一电感；所述信号输入端通过串联所述第一电容后连接至所述第一MOS管的栅极，所述第二电容的第一端连接所述第一MOS管的漏极，所述第二电容的第二端连接所述信号输出端；所述第一MOS管的源极接地，所述第一电感的第一端连接所述第一MOS管的漏极，所述第一电感的第二端连接第一外部电源，所述第一外部电源向所述第一MOS管的漏极输出偏置电流。
更进一步地，所述整流电路包括第三电容、第二MOS管、第三MOS管、第四电容、第五电容；所述第三电容的第一端作为所述整流电路的第一端连接所述耦合电路的第二端，所述第三电容的第二端分别连接所述第二MOS管的源极、所述第三MOS管的漏极和所述第三MOS管的栅极；所述第二MOS管的漏极连接所述第二MOS管的栅极，且同时接地；所述第三MOS管的源极连接分别连接所述第四电容的第一端、所述第五电容的第一端，并作为所述整流电路的第二端连接所述开关电路的第一端，所述第四电容的第二端连接所述第五电容的第二端，且同时接地。
更进一步地，所述第四电容的电容值大于所述第五电容的电容值。
更进一步地，所述开关电路包括第四MOS管、第一电阻和第二电阻；所述第一电阻的第一端作为所述开关电路的第一端连接所述整流电路的第二端，所述第一电阻的第二端连接所述第四MOS管的栅极；所述第四MOS管的源极接地，所述第四MOS管的漏极作为所述开关电路的第二端连接所述镜像电流源电路的第一端，所述第四MOS管的栅极连接所述第二电阻的第一端，所述第二电阻的第二端接地。
更进一步地，所述镜像电流源电路包括第五MOS管、第六MOS管、第七MOS管、第三电阻和第四电阻；所述第五MOS的漏极作为所述镜像电流源电路的第一端连接所述开关电路的第二端，所述第五MOS管的栅极分别连接所述第五MOS管的漏极和所述第七MOS管的栅极，所述第五MOS管的源极分别连接所述第六MOS管的漏极和所述第六MOS管的栅极；所述第六MOS管的源极接地；所述第七MOS管的源极作为所述镜像电流源电路的第二端连接所述放大器的输入端；所述第三电阻的第一端连接所述第五MOS管的漏极，所述第三电阻的第二端连接第二外部电源；所述第四电阻的第一端连接所述第七MOS管的漏极，所述第四电阻的第二端连接所述第二外部电源。
更进一步地，所述耦合电路包括第五电阻，所述第五电阻的第一端作为所述耦合电路的第一端连接所述信号输入端，所述第五电阻的第二端作为所述耦合电路的第二端连接所述整流电路的第一端。
更进一步地，所述耦合电路包括第五电阻、第六电容和耦合器；所述第五电阻的第一端接地，所述第五电阻的第二端连接所述耦合器的第一输入端，所述耦合器的第一输出端连接所述第六电容的第一端，所述耦合器的第二输入端作为所述耦合电路的第一端连接所述信号输入端，所述耦合器的第二输出端连接所述放大器的输入端；
所述耦合电路还包括第八MOS管、第六电阻和第七电阻；所述第八MOS管的栅极分别连接所述第六电容的第二端和所述第六电阻的第一端，所述第八MOS管的漏极连接所述第七电阻的第一端，且作为所述耦合电路的第二端同时连接所述整流电路的第一端，所述第六电阻的第二端和所述第七电阻的第二端皆连接第二外部电源。
更进一步地，所述耦合电路包括第五电阻和第六电容，所述第五电阻的第一端作为所述耦合电路的第一端连接所述信号输入端，所述第五电阻的第二端连接所述第六电容的第一端；
所述耦合电路还包括第八MOS管、第六电阻和第七电阻，所述第八MOS管的栅极分别连接所述第六电容的第二端和所述第六电阻的第一端，所述第八MOS管的漏极连接所述第七电阻的第一端，且作为所述耦合电路的第二端同时连接所述整流电路的第一端，所述第六电阻的第二端和所述第七电阻的第二端皆连接第二外部电源。
本发明所达到的有益效果，在于提出了一种带输入功率保护的偏置电路的射频功率模组，该射频功率模组中的偏置电路可以检测输入放大器的功率，并根据检测到的输入信号平均功率，主动降低输入功率放大器的偏置电流，达到保护功率放大器的目的。
附图说明
图1是现有的射频前端模组结构示意图；
图2是本发明实施例提供的带输入功率保护的射频前端模组的电路示意图；
图3是本发明实施例提供的另一种带输入功率保护的射频前端模组的电路示意图；
图4是本发明实施例提供的另一种带输入功率保护的射频前端模组的电路示意图。
具体实施方式
为了使本发明的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本发明进行进一步详细说明。应当理解，此处所描述的具体实施例仅仅用以解释本发明，并不用于限定本发明。
请参照图2，图2是本发明实施例提供的带输入功率保护的射频前端模组的电路示意图，所述射频前端模组100包括，信号输入端101，偏置电路102，放大器103，信号输出端104；所述信号输入端101、所述偏置电路102、所述放大器103、所述信号输出端104依次电连接；
所述信号输入端连接所述放大器的输入端；
所述偏置电路102包括耦合电路1021、整流电路1022、开关电路1023和镜像电流源电路1024；所述耦合电路1021的第一端连接所述信号输入端，所述耦合电路1021的第二端连接所述整流电路的第一端，所述耦合电路1021用于拾取所述信号输入端输入的射频信号；所述整流电路1022的第二端连接所述开关电路1023的第一端，所述整流电路1022用于对所述射频信号进行整流，输出包络信号；所述镜像电流源电路1024的第一端连接所述开关电路1023的第二端，所述镜像电流源电路1024的第二端连接所述放大器103的输入端，所述镜像电流源电路1024受所述包络信号控制，向所述放大器103输出偏置电流。
具体的，所述放大器103包括第一MOS管Q1，所述第一MOS管Q1的栅极作为所述放大器的输入端，所述MOS管Q1的源极作为所述放大器的第一输出端，所述MOS管的漏极Q1作为所述放大器的第二输出端；所述射频前端模组还包括第一电容C1、第二电容C2、第一电感L1，所述信号输入端101通过串联所述第一电容C1后连接至所述第一MOS管Q1的栅极，所述第二电容C2的第一端连接所述第一MOS管Q1的漏极，所述第二电容C2的第二端连接所述信号输出端；所述第一MOS管Q1的源极接地，所述第一电感L1的第一端连接所述第一MOS管Q1的漏极，所述第一电感L1的第二端连接第一外部电源，所述第一外部电源向所述第一MOS管Q1的漏极输出偏置电流。
所述整流电路1022包括第三电容C3、第二MOS管Q2、第三MOS管Q3、第四电容C4、第五电容C5；所述第三电容C3的第一端作为所述整流电路1022的第一端连接所述耦合电路1021的第二端，所述第三电容C3的第二端分别连接所述第二MOS管Q2的源极、所述第三MOS管Q3的漏极和所述第三MOS管Q3的栅极；所述第二MOS管Q2的漏极连接所述第二MOS管Q2的栅极，且同时接地；所述第三MOS管Q3的源极连接分别连接所述第四电容C4的第一端、所述第五电容C5的第一端，并作为所述整流电路1022的第二端连接所述开关电路1023的第一端，所述第四电容C4的第二端连接所述第五电容C5的第二端，且同时接地。
第三电容C3用于隔离电路之间的直流信号。
第二MOS管Q2、第三MOS管Q3的栅极和漏极都连接在一起，形成二极管整流电路，对输入的射频信号进行整流，输出射频包络信号到第四电容C4、第五电容C5。
所述第四电容C4的电容值大于所述第五电容C5的电容值。第五电容C5容值较小，用于滤除混杂的射频信号，第四电容C4容值较大，用于滤除包络起伏信号，使得最终输出的信号能更准确地反映输入信号平均功率。在一种可能的实现方式中，如果放大电路只用于放大恒包络射频信号，则第四电容C4可以移除，以简化电路。
所述开关电路1023包括第四MOS管Q4、第一电阻R1和第二电阻R2；所述第一电阻R1的第一端作为所述开关电路1023的第一端连接所述整流电路1022的第二端，所述第一电阻R1的第二端连接所述第四MOS管Q4的栅极；所述第四MOS管Q4的源极接地，所述第四MOS管Q4的漏极作为所述开关电路1023的第二端连接所述镜像电流源电路1024的第一端，所述第四MOS管Q4的栅极连接所述第二电阻R2的第一端，所述第二电阻R2的第二端接地。
整流输出经第一电阻R1，到达镜像电流源电路1024，用于控制镜像电流源电路1024的电流。第二电阻R2用于提供镜像电流源电路1024中MOS管的下拉通路。
所述镜像电流源电路1024包括第五MOS管Q5、第六MOS管Q6、第七MOS管Q7、第三电阻R3和第四电阻R4；所述第五MOS的漏极作为所述镜像电流源电路1024的第一端连接所述开关电路1023的第二端，所述第五MOS管Q5的栅极分别连接所述第五MOS管Q5的漏极和所述第七MOS管Q7的栅极，所述第五MOS管Q5的源极分别连接所述第六MOS管Q6的漏极和所述第六MOS管Q6的栅极；所述第六MOS管Q6的源极接地；所述第七MOS管Q7的源极作为所述镜像电流源电路1024的第二端连接所述放大器103的输入端；所述第三电阻R3的第一端连接所述第五MOS管Q5的漏极，所述第三电阻R3的第二端连接第二外部电源；所述第四电阻R4的第一端连接所述第七MOS管Q7的漏极，所述第四电阻R4的第二端连接所述第二外部电源。
显然的，第五MOS管Q5、第六MOS管Q6、第七MOS管Q7组成了电流镜电路，其总体输出用于提供给所述第一MOS管Q1的漏极以偏置电流IBIAS。
本发明实施例中，提供了三种耦合电路1021的实现方式。
具体的，第一种实现方式如图2所示，所述耦合电路1021包括第五电阻R5，所述第五电阻R5的第一端作为所述耦合电路1021的第一端连接所述信号输入端101，所述第五电阻R5的第二端作为所述耦合电路1021的第二端连接所述整流电路1022的第一端。
第五电阻R5连接在第一MOS管Q1的射频通路上，通过选取合适的第五电阻R5阻值，使得输入信号的少部分射频能量流过第五电阻R5，大部分射频能量通过第一电容C1进入第一MOS管Q1的栅极，同时使得第五电阻R5的接入对射频通路阻抗影响较小。
第二种实现方式如图3所示，所述耦合电路1021包括第五电阻R5、第六电容C6和耦合器Coup1；所述第五电阻R5的第一端接地，所述第五电阻R5的第二端连接所述耦合器Coup1的第一输入端，所述耦合器Coup1的第一输出端连接所述第六电容C6的第一端，所述耦合器Coup1的第二输入端作为所述耦合电路1021的第一端连接所述信号输入端101，所述耦合器Coup1的第二输出端连接所述放大器103的输入端；其中，第六电容C6主要用于隔离直流信号，通过射频信号；
所述耦合电路1021还包括第八MOS管Q8、第六电阻R6和第七电阻R7，所述第八MOS管Q8的栅极分别连接所述第六电容C6的第二端和所述第六电阻R6的第一端，所述第八MOS管Q8的漏极连接所述第七电阻R7的第一端，且作为所述耦合电路1021的第二端同时连接所述整流电路1022的第一端，所述第六电阻R6的第二端和所述第七电阻R7的第二端皆连接第二外部电源。第六电阻R6和第七电阻R7给第八MOS管Q8提供合适的直流偏置，使第八MOS管Q8工作在放大区间。
第三种实现方式如图4所示，所述耦合电路1021包括第五电阻R5和第六电容C6，所述第五电阻R5的第一端作为所述耦合电路1021的第一端连接所述信号输入端101，所述第五电阻R5的第二端连接所述第六电容C6的第一端；
所述耦合电路1021还包括第八MOS管Q8、第六电阻R6和第七电阻R7，所述第八MOS管Q8的栅极分别连接所述第六电容C6的第二端和所述第六电阻R6的第一端，所述第八MOS管Q8的漏极连接所述第七电阻R7的第一端，且作为所述耦合电路1021的第二端同时连接所述整流电路1022的第一端，所述第六电阻R6的第二端和所述第七电阻R7的第二端皆连接第二外部电源。
通过上述电路结构，当输入射频信号功率较小时，经过第八MOS管Q8至整流电路和信号功率也较小，整流电路输出的直流电压较低，使得第四MOS管Q4截止，电流镜输出的偏置电流IBIAS较大，放大电路中的第一MOS管Q1正常工作。
当输入射频信号功率较大时，经过第八MOS管Q8至整流电路和信号功率也较大，整流电路输出的直流电压较高，使得第四MOS管Q4导通，流过第三MOS管Q3的电流增加，第一电阻R1压降增大，电流镜输出的偏置电流IBIAS减小，第一MOS管Q1增益减小，从而保护了第一MOS管Q1。
对于如图2所示的电路结构，相当于是不包含如图3、图4中第八MOS管Q8的简化电路结构，其主要是针对预先设置的输入信号功率门限值较大的情况，其中，部分电路结构可以使用双极性晶体管替代来完成相同的电学功能，可以理解的是，本发明实施例中所有实施方式的整流电路所达到的技术效果仍然相同。
本发明所达到的有益效果，在于提出了一种带输入功率保护的偏置电路的射频功率模组，该射频功率模组中的偏置电路可以检测输入放大器的功率，并根据检测到的输入信号平均功率，主动降低输入功率放大器的偏置电流，达到保护功率放大器的目的。
需要说明的是，在本文中，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者装置不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者装置所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括该要素的过程、方法、物品或者装置中还存在另外的相同要素。
上面结合附图对本发明的实施例进行了描述，所揭露的仅为本发明较佳实施例而已，但是本发明并不局限于上述的具体实施方式，上述的具体实施方式仅仅是示意性的，而不是限制性的，本领域的普通技术人员在本发明的启示下，在不脱离本发明宗旨和权利要求所保护的范围情况下，还可做出很多形式用等同变化，均属于本发明的保护之内。

Claims (9)

  1. 一种带输入功率保护的射频前端模组，包括，信号输入端，偏置电路，放大器，信号输出端；所述信号输入端、所述偏置电路、所述放大器、所述信号输出端依次电连接；其特征在于，
    所述信号输入端连接所述放大器的输入端；
    所述偏置电路包括耦合电路、整流电路、开关电路和镜像电流源电路；所述耦合电路的第一端连接所述信号输入端，所述耦合电路的第二端连接所述整流电路的第一端，所述耦合电路用于隔离所述信号输入端输入的直流信号、通过射频信号；所述整流电路的第二端连接所述开关电路的第一端，所述整流电路用于对所述射频信号进行整流，输出包络信号；所述镜像电流源电路的第一端连接所述开关电路的第二端，所述镜像电流源电路的第二端连接所述放大器的输入端，所述镜像电流源电路受所述包络信号控制，向所述放大器输出偏置电流。
  2. 如权利要求1所述的带输入功率保护的射频前端模组，其特征在于，所述放大器包括第一MOS管，所述第一MOS管的栅极作为所述放大器的输入端，所述MOS管的源极作为所述放大器的第一输出端，所述MOS管的漏极作为所述放大器的第二输出端；所述射频前端模组还包括第一电容、第二电容、第一电感；所述信号输入端通过串联所述第一电容后连接至所述第一MOS管的栅极，所述第二电容的第一端连接所述第一MOS管的漏极，所述第二电容的第二端连接所述信号输出端；所述第一MOS管的源极接地，所述第一电感的第一端连接所述第一MOS管的漏极，所述第一电感的第二端连接第一外部电源，所述第一外部电源向所述第一MOS管的漏极输出偏置电流。
  3. 如权利要求1所述的带输入功率保护的射频前端模组，其特征在于，所述整流电路包括第三电容、第二MOS管、第三MOS管、第四电容、第五电容；所述第三电容的第一端作为所述整流电路的第一端连接所述耦合电路的第二端，所述第三电容的第二端分别连接所述第二MOS管的源极、所述第三MOS管的漏极和所述第三MOS管的栅极；所述第二MOS管的漏极连接所述第二MOS管的栅极，且同时接地；所述第三MOS管的源极连接分别连接所述第四电容的第一端、所述第五电容的第一端，并作为所述整流电路的第二端连接所述开关电路的第一端，所述第四电容的第二端连接所述第五电容的第二端，且同时接地。
  4. 如权利要求3所述的带输入功率保护的射频前端模组，其特征在于，所述第四电容的电容值大于所述第五电容的电容值。
  5. 如权利要求1所述的带输入功率保护的射频前端模组，其特征在于，所述开关电路包括第四MOS管、第一电阻和第二电阻；所述第一电阻的第一端作为所述开关电路的第一端连接所述整流电路的第二端，所述第一电阻的第二端连接所述第四MOS管的栅极；所述第四MOS管的源极接地，所述第四MOS管的漏极作为所述开关电路的第二端连接所述镜像电流源电路的第一端，所述第四MOS管的栅极连接所述第二电阻的第一端，所述第二电阻的第二端接地。
  6. 如权利要求1所述的带输入功率保护的射频前端模组，其特征在于，所述镜像电流源电路包括第五MOS管、第六MOS管、第七MOS管、第三电阻和第四电阻；所述第五MOS的漏极作为所述镜像电流源电路的第一端连接所述开关电路的第二端，所述第五MOS管的栅极分别连接所述第五MOS管的漏极和所述第七MOS管的栅极，所述第五MOS管的源极分别连接所述第六MOS管的漏极和所述第六MOS管的栅极；所述第六MOS管的源极接地；所述第七MOS管的源极作为所述镜像电流源电路的第二端连接所述放大器的输入端；所述第三电阻的第一端连接所述第五MOS管的漏极，所述第三电阻的第二端连接第二外部电源；所述第四电阻的第一端连接所述第七MOS管的漏极，所述第四电阻的第二端连接所述第二外部电源。
  7. 如权利要求1所述的带输入功率保护的射频前端模组，其特征在于，所述耦合电路包括第五电阻，所述第五电阻的第一端作为所述耦合电路的第一端连接所述信号输入端，所述第五电阻的第二端作为所述耦合电路的第二端连接所述整流电路的第一端。
  8. 如权利要求1所述的带输入功率保护的射频前端模组，其特征在于，所述耦合电路包括第五电阻、第六电容和耦合器；所述第五电阻的第一端接地，所述第五电阻的第二端连接所述耦合器的第一输入端，所述耦合器的第一输出端连接所述第六电容的第一端，所述耦合器的第二输入端作为所述耦合电路的第一端连接所述信号输入端，所述耦合器的第二输出端连接所述放大器的输入端；
    所述耦合电路还包括第八MOS管、第六电阻和第七电阻；所述第八MOS管的栅极分别连接所述第六电容的第二端和所述第六电阻的第一端，所述第八MOS管的漏极连接所述第七电阻的第一端，且作为所述耦合电路的第二端连接所述整流电路的第一端，所述第六电阻的第二端和所述第七电阻的第二端皆连接第二外部电源。
  9. 如权利要求1所述的带输入功率保护的射频前端模组，其特征在于，所述耦合电路包括第五电阻和第六电容，所述第五电阻的第一端作为所述耦合电路的第一端连接所述信号输入端，所述第五电阻的第二端连接所述第六电容的第一端；
    所述耦合电路还包括第八MOS管、第六电阻和第七电阻，所述第八MOS管的栅极分别连接所述第六电容的第二端和所述第六电阻的第一端，所述第八MOS管的漏极连接所述第七电阻的第一端，且作为所述耦合电路的第二端连接所述整流电路的第一端，所述第六电阻的第二端和所述第七电阻的第二端皆连接第二外部电源。
PCT/CN2025/085806 2024-04-24 2025-03-28 带输入功率保护的射频前端模组 Pending WO2025223151A1 (zh)

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Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN118074638B (zh) * 2024-04-24 2024-07-09 深圳飞骧科技股份有限公司 带输入功率保护的射频前端模组
CN118300630B (zh) * 2024-06-05 2025-04-01 深圳飞骧科技股份有限公司 射频前端模组及射频芯片
CN121239153B (zh) * 2025-12-03 2026-03-24 深圳飞骧科技股份有限公司 功率放大器及射频芯片
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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040232989A1 (en) * 2003-05-19 2004-11-25 Samsung Electronics Co., Ltd. Integratable, voltage-controlled RF power amplifier
CN111200408A (zh) * 2020-03-19 2020-05-26 四川和芯微电子股份有限公司 线性补偿功率放大器
CN111262534A (zh) * 2020-03-19 2020-06-09 西安博瑞集信电子科技有限公司 一种用于功率放大器芯片的自适应偏置电路
US20220052656A1 (en) * 2020-08-17 2022-02-17 Qualcomm Incorporated Radio frequency (rf) amplifier bias circuit
CN216599556U (zh) * 2021-12-08 2022-05-24 深圳市时代速信科技有限公司 一种自适应偏置电路
CN117424567A (zh) * 2023-10-30 2024-01-19 锐石创芯(深圳)科技股份有限公司 一种多尔蒂功率放大器
CN118074638A (zh) * 2024-04-24 2024-05-24 深圳飞骧科技股份有限公司 带输入功率保护的射频前端模组

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1696558A1 (en) * 2005-02-25 2006-08-30 STMicroelectronics S.r.l. Protection of output stage transistor of an RF power amplifier
CN117914273A (zh) * 2023-11-24 2024-04-19 北京紫光青藤微系统有限公司 低噪声放大电路
CN117395761B (zh) * 2023-12-12 2024-02-20 深圳飞骧科技股份有限公司 电源和偏置可调的射频前端模组及射频芯片

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040232989A1 (en) * 2003-05-19 2004-11-25 Samsung Electronics Co., Ltd. Integratable, voltage-controlled RF power amplifier
CN111200408A (zh) * 2020-03-19 2020-05-26 四川和芯微电子股份有限公司 线性补偿功率放大器
CN111262534A (zh) * 2020-03-19 2020-06-09 西安博瑞集信电子科技有限公司 一种用于功率放大器芯片的自适应偏置电路
US20220052656A1 (en) * 2020-08-17 2022-02-17 Qualcomm Incorporated Radio frequency (rf) amplifier bias circuit
CN216599556U (zh) * 2021-12-08 2022-05-24 深圳市时代速信科技有限公司 一种自适应偏置电路
CN117424567A (zh) * 2023-10-30 2024-01-19 锐石创芯(深圳)科技股份有限公司 一种多尔蒂功率放大器
CN118074638A (zh) * 2024-04-24 2024-05-24 深圳飞骧科技股份有限公司 带输入功率保护的射频前端模组

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