Classifications

• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
  • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W72/00—Interconnections or connectors in packages
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W74/00—Encapsulations, e.g. protective coatings
  • H10W74/01—Manufacture or treatment
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W74/00—Encapsulations, e.g. protective coatings
  • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W74/00—Encapsulations, e.g. protective coatings
  • H10W74/40—Encapsulations, e.g. protective coatings characterised by their materials
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W90/00—Package configurations

Definitions

• the disclosure in this specification relates to semiconductor devices.
• Patent Document 1 discloses a semiconductor module comprising a substrate having metal bodies on both sides, a semiconductor element disposed on the substrate, and an encapsulating resin body that encapsulates the substrate and semiconductor element.
• the contents of this prior art document are incorporated by reference as an explanation of the technical elements in this specification.
• One of the purposes of this disclosure is to provide a semiconductor device that can suppress the occurrence of insulation failure.
• a semiconductor device includes: a substrate having an insulating base material, a patterned front surface metal body disposed on the front surface of the insulating base material, and a rear surface metal body disposed on the rear surface of the insulating base material; a semiconductor element having a first main electrode and a second main electrode provided on a surface opposite to the first main electrode in a plate thickness direction, the semiconductor element being disposed on a substrate and electrically connected to a surface metal body; a sealing resin body that seals the substrate and the semiconductor element, the back surface metal body has an exposed surface exposed from the sealing resin body and thermally connected to the cooler; the surface metal body has a plurality of corners in a plan view in the plate thickness direction, At least a portion of the corners are cut away.
• the multiple corners of the front surface metal body are intentionally cut out.
• the cutouts make it difficult for voids to remain in the corners, for example, when forming the sealing resin body.
• the cutouts distance the corners of the front surface metal body from the back surface metal body, so even if voids occur in the corners, it is possible to prevent the front surface metal body and the back surface metal body from being connected by the voids, making it impossible to ensure insulation. As a result, it is possible to provide a semiconductor device that can prevent poor insulation caused by voids.
• Another aspect of the disclosed semiconductor device includes: a substrate having an insulating base material, a patterned front surface metal body disposed on the front surface of the insulating base material, and a rear surface metal body disposed on the rear surface of the insulating base material; a semiconductor element having a first main electrode and a second main electrode provided on a surface opposite to the first main electrode in a plate thickness direction, the semiconductor element being disposed on a substrate and electrically connected to a surface metal body; a sealing resin body that seals the substrate and the semiconductor element, the back surface metal body has an exposed surface exposed from the sealing resin body and thermally connected to the cooler; the sealing resin body has a gate mark; the substrate has four sides forming a rectangular outline in a plan view in the thickness direction, the four sides being a first side, a second side, and a third side and a fourth side that are positioned farther from the gate mark than the first side and the second side; The insulation width, which is the width from the end of the surface metal body to the end of the insulating substrate
• the insulation width is wider on the third and fourth sides, which are located away from the gate mark, than on the first and second sides, which are closer to the gate mark.
• FIG. 1 is a diagram illustrating a power conversion circuit and a drive system to which a semiconductor device according to a first embodiment is applied;
• FIG. 1 is a plan view showing a semiconductor device.
• FIG. 3 is a cross-sectional view taken along line III-III in FIG. 2.
• FIG. 2 is a plan view showing a portion covered with a sealing resin body.
• FIG. 2 is a plan view showing the substrate on the drain electrode side.
• FIG. 2 is a plan view showing the substrate on the source electrode side.
• FIG. 2 is a cross-sectional view showing a power conversion module.
• FIG. 10 is a diagram showing a removed area on the substrate on the drain electrode side.
• FIG. 10 is a diagram showing a removal area on the substrate on the source electrode side.
• FIG. 10 is a diagram showing the final joining portion during molding of the sealing resin body.
• FIG. FIG. 10 is a plan view showing a substrate on the drain electrode side in a semiconductor device according to a second embodiment.
• FIG. 2 is a plan view showing the substrate on the source electrode side.
• FIG. 11 is a plan view showing a substrate on the drain electrode side in a semiconductor device according to a third embodiment.
• FIG. 2 is a plan view showing the substrate on the source electrode side.
• FIG. 10 is a diagram illustrating a power conversion circuit and a drive system to which a semiconductor device according to a fourth embodiment is applied.
• FIG. 1 is a plan view showing a semiconductor device.
• FIG. 2 is a plan view showing a portion covered with a sealing resin body.
• FIG. 2 is a plan view showing the substrate on the drain electrode side.
• FIG. 2 is a plan view showing the substrate on the source electrode side.
• the semiconductor device of this embodiment is applied to, for example, a mobile object using a rotating electric machine as a drive source.
• the mobile object include electric vehicles such as battery electric vehicles (BEVs), hybrid electric vehicles (HEVs), and plug-in hybrid electric vehicles (PHEVs), electric flying objects such as drones and electric vertical take-off and landing (eVTOL) aircraft, ships, construction machinery, and agricultural machinery.
• BEVs battery electric vehicles
• HEVs hybrid electric vehicles
• PHEVs plug-in hybrid electric vehicles
• eVTOL electric vertical take-off and landing
• a vehicle drive system 1 includes a DC power supply 2 , a motor generator 3 , and a power conversion circuit 4 .
• the DC power supply 2 is a DC voltage source made up of a rechargeable secondary battery. Examples of secondary batteries include lithium-ion batteries and nickel-metal hydride batteries.
• the motor generator 3 is a three-phase AC rotating electric machine. The motor generator 3 functions as a drive source for the vehicle, in other words, an electric motor. The motor generator 3 functions as a generator during regeneration.
• the power conversion circuit 4 converts power between the DC power supply 2 and the motor generator 3.
• ⁇ Power conversion circuit> 1 shows an example of a power conversion circuit 4.
• the power conversion circuit 4 shown in FIG. 1 shows an example of a power conversion circuit 4.
• Smoothing capacitor 6 mainly smoothes the DC voltage supplied from DC power supply 2. Smoothing capacitor 6 is connected to P line 7, which is the high-potential power supply line, and N line 8, which is the low-potential power supply line. P line 7 is connected to the positive electrode of DC power supply 2, and N line 8 is connected to the negative electrode of DC power supply 2. The positive electrode of smoothing capacitor 6 is connected to P line 7 between DC power supply 2 and inverter 5. The negative electrode of smoothing capacitor 6 is connected to N line 8 between DC power supply 2 and inverter 5. Smoothing capacitor 6 is connected in parallel to DC power supply 2.
• the inverter 5 is a DC-AC conversion circuit. In accordance with switching control by the control circuit, the inverter 5 converts DC voltage into three-phase AC voltage and outputs it to the motor generator 3. This drives the motor generator 3 to generate a predetermined torque. During regenerative braking of the vehicle, the inverter 5 converts the three-phase AC voltage generated by the motor generator 3 in response to rotational force from the wheels into DC voltage in accordance with switching control by the control circuit and outputs it to the P line 7. In this way, the inverter 5 performs bidirectional power conversion between the DC power source 2 and the motor generator 3.
• the inverter 5 is configured with upper and lower arm circuits 9 for three phases.
• the upper and lower arm circuits 9 are sometimes referred to as legs.
• the upper and lower arm circuits 9 have an upper arm 9H and a lower arm 9L.
• the upper arm 9H and lower arm 9L are connected in series between the P line 7 and the N line 8, with the upper arm 9H on the P line 7 side.
• the connection point between the upper arm 9H and the lower arm 9L is connected to the winding 3a of the corresponding phase in the motor generator 3 via the output line 10.
• the inverter 5 has six arms. Each arm is configured with a switching element. There is no particular limit to the number of switching elements that make up each arm. There may be one or more. When there are multiple switching elements, the multiple switching elements connected in parallel to each other are turned on and off at the same time by a common gate drive signal (drive voltage).
• the exemplary switching element is an n-channel MOSFET 11.
• MOSFET is an abbreviation for Metal Oxide Semiconductor Field Effect Transistor.
• the drain terminal of the MOSFET 11 is connected to the P line 7.
• the source terminal of the MOSFET 11 is connected to the N line 8.
• the source terminal of the MOSFET 11 in the upper arm 9H and the drain terminal of the MOSFET 11 in the lower arm 9L are connected to each other.
• a freewheeling diode 12 is connected in anti-parallel to each MOSFET 11.
• the diode 12 may be a parasitic diode (body diode) of the MOSFET 11, or may be provided separately from the parasitic diode.
• the anode terminal of the diode 12 is connected to the source terminal of the corresponding MOSFET 11, and the cathode terminal is connected to the drain terminal.
• the switching element is not limited to a MOSFET 11.
• an IGBT may be used.
• IGBT is an abbreviation for Insulated Gate Bipolar Transistor.
• a freewheeling diode is also connected in inverse parallel.
• the power conversion circuit 4 may also include a converter.
• the converter is a DC-DC conversion circuit configured to be able to convert a DC voltage, for example, into a DC voltage of a different value.
• the converter is provided between the DC power source 2 and the smoothing capacitor 6.
• the converter is configured, for example, with a reactor and the above-mentioned upper and lower arm circuits 9. This configuration allows for voltage step-up and step-down.
• the power conversion circuit 4 may also include a filter capacitor that removes power supply noise from the DC power source 2.
• the filter capacitor is provided between the DC power source 2 and the converter.
• the power conversion circuit 4 may also include a snubber circuit.
• the snubber circuit is connected in parallel to the upper and lower arm circuits 9.
• the snubber circuit reduces the inductance of the upper and lower arm circuits 9. In other words, the snubber circuit absorbs the transient high voltage, or so-called switching surge, that occurs when the switching elements (MOSFETs 11) that make up the upper and lower arm circuits 9 are switched. This enables the inverter 5 to perform high-speed switching.
• the power conversion circuit 4 may include a drive circuit for the switching elements that make up the inverter 5, etc.
• the drive circuit supplies a drive voltage to the gate of the MOSFET 11 of the corresponding arm based on a drive command from the control circuit. By applying the drive voltage, the drive circuit drives the corresponding MOSFET 11, i.e., turns it on and off.
• the drive circuit is sometimes called a driver.
• the power conversion circuit 4 may include a control circuit for the switching element.
• the control circuit generates a drive command for operating the MOSFET 11 and outputs it to the drive circuit.
• the control circuit generates the drive command based on, for example, a torque request input from a higher-level ECU (not shown) and signals detected by various sensors.
• ECU is an abbreviation for Electronic Control Unit.
• the various sensors include, for example, a current sensor, a rotation angle sensor, and a voltage sensor.
• the current sensor detects the phase current flowing through the winding 3a of each phase.
• the rotation angle sensor detects the rotation angle of the rotor of the motor generator 3.
• the voltage sensor detects the voltage across the smoothing capacitor 6.
• the control circuit outputs, for example, a PWM signal as a drive command.
• the control circuit is configured with, for example, a processor and memory.
• PWM is an abbreviation for Pulse Width Modulation.
• FIG. 2 is a plan view showing an example of a semiconductor device according to this embodiment.
• FIG. 3 is a cross-sectional view showing an example of a semiconductor device.
• FIG. 3 is a cross-sectional view taken along line III-III in FIG. 2.
• FIG. 4 is a plan view showing a portion covered with a sealing resin body.
• the sealing resin body is indicated by a dashed line, and the substrate and conductor pattern on the source electrode side are indicated by dashed lines.
• bonding wires are omitted from FIG. 4.
• FIG. 5 is a plan view showing the substrate on the drain electrode side.
• FIG. 6 is a plan view showing the substrate on the source electrode side.
• FIGS. 5 and 6 show a surface metal body.
• the sealing resin body is also indicated by a dashed line.
• the thickness direction of a semiconductor element is referred to as the Z direction.
• the direction perpendicular to the Z direction is referred to as the Y direction.
• the direction perpendicular to both the Z direction and the Y direction is referred to as the X direction.
• the X, Y, and Z directions are mutually orthogonal.
• the shape viewed from the Z direction in other words, the shape along the XY plane defined by the X and Y directions, is referred to as the planar shape.
• the planar view from the Z direction is sometimes simply referred to as the planar view.
• the semiconductor device 20 constitutes the upper and lower arm circuits 9, i.e., the inverter 5, described above.
• the illustrated semiconductor device 20 constitutes one of the upper and lower arm circuits 9, i.e., one phase of the upper and lower arm circuit 9.
• the semiconductor device 20 is sometimes referred to as a semiconductor module, a power module, etc.
• the semiconductor device 20 includes an encapsulating resin body 30, a semiconductor element 40, substrates 50 and 60, a conductive spacer 70, a joint portion 80, and an external connection terminal 90.
• the sealing resin body 30 seals some of the other elements that make up the semiconductor device 20. The remaining parts of the other elements are exposed outside the sealing resin body 30.
• the sealing resin body 30 is formed using a resin material.
• a resin material is epoxy resin.
• the sealing resin body 30 may be potting resin filled into the housing's storage space.
• the illustrated sealing resin body 30 is molded using a resin material by a transfer molding method. Such a sealing resin body 30 is sometimes referred to as a molded resin or a resin molded body.
• the sealing resin body 30 has a generally rectangular planar shape.
• the sealing resin body 30 has one surface 30a, a back surface 30b, and side surfaces 30c, 30d, 30e, and 30f as surfaces that form its outer periphery.
• the back surface 30b is the surface opposite to the one surface 30a in the Z direction.
• the one surface 30a and the back surface 30b are, for example, flat surfaces.
• the side surface 30d is the surface opposite to the side surface 30c in the Y direction.
• the side surface 30f is the surface opposite to the side surface 30e in the X direction.
• the sealing resin body 30 has recesses 31 provided between adjacent external connection terminals 90.
• the recesses 31 are provided on the side surfaces.
• the recesses 31 are provided to ensure a creepage distance between adjacent external connection terminals 90.
• the recesses 31 penetrate the sealing resin body 30 in the Z direction, for example.
• the illustrated recesses 31 are provided on the side surfaces 30c and 30d.
• the recesses 31 are open on the one surface 30a and the back surface 30b in addition to the side surfaces.
• On the side surface 30c one recess 31 is provided between the P terminal 91 and the N terminal 92, and the other is provided between the N terminal 92 and the O terminal 93.
• On the side surface 30d one recess 31 is provided between the signal terminal 94 on the upper arm side and the suspension lead 95, and the other is provided between the signal terminal 94 on the lower arm side and the suspension lead 95.
• the sealing resin body 30 has a gate mark 32.
• the gate mark 32 is a mark left by a gate when molding the sealing resin body 30.
• the gate mark 32 is recessed relative to the surrounding area of the sealing resin body 30.
• the illustrated gate mark 32 is provided on side surface 30f.
• the gate mark 32 is provided at a position closer to side surface 30d than to side surface 30c in the Y direction.
• Semiconductor element 40 consists of a switching element formed on a semiconductor substrate made of silicon (Si) or a wide bandgap semiconductor with a wider bandgap than silicon. Examples of wide bandgap semiconductors include silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), and diamond. Semiconductor element 40 is sometimes called a power element, semiconductor chip, etc.
• the illustrated semiconductor element 40 has the above-mentioned n-channel MOSFET 11 formed on a semiconductor substrate made of SiC.
• the MOSFET 11 has a vertical structure so that the main current flows in the thickness direction of the semiconductor element 40 (semiconductor substrate), i.e., in the Z direction.
• the semiconductor element 40 has main electrodes of the switching element on both sides in the thickness direction, i.e., the Z direction.
• the main electrodes include a drain electrode 41 on one side and a source electrode 42 on the back side.
• the source electrode 42 also serves as the anode electrode
• the drain electrode 41 also serves as the cathode electrode.
• the diode 12 may be configured on a chip separate from the MOSFET 11.
• the drain electrode 41 is the main electrode on the high potential side
• the source electrode 42 is the main electrode on the low potential side.
• the drain electrode 41 corresponds to the first main electrode
• the source electrode corresponds to the second main electrode.
• the semiconductor element 40 has a generally rectangular shape in plan view.
• the semiconductor element 40 has a pad 43 formed on the back surface at a position different from the source electrode 42.
• the source electrode 42 and pad 43 are exposed from a protective film (not shown) formed on the back surface of the semiconductor substrate.
• the drain electrode 41 is formed on almost the entire surface.
• the source electrode 42 is formed on a portion of the back surface of the semiconductor element 40.
• the pad 43 is a signal electrode.
• the pad 43 is formed at the end opposite the area where the source electrode 42 is formed in the Y direction.
• the pad 43 includes a pad for a gate electrode.
• the semiconductor device 20 includes multiple semiconductor elements 40.
• the multiple semiconductor elements 40 may include multiple types of semiconductor elements with different specifications. As in the illustrated semiconductor device 20, all of the semiconductor elements 40 may have a common configuration.
• the multiple semiconductor elements 40 include a semiconductor element 40H that constitutes the upper arm 9H and a semiconductor element 40L that constitutes the lower arm 9L.
• the semiconductor element 40H is sometimes referred to as the upper arm element, and the semiconductor element 40L is sometimes referred to as the lower arm element.
• the semiconductor elements 40H and 40L are aligned in the X direction.
• the semiconductor elements 40H and 40L are positioned at approximately the same position as each other in the Z direction.
• the drain electrodes 41 of the semiconductor elements 40H and 40L face the substrate 50.
• the source electrodes 42 of the semiconductor elements 40H and 40L face the substrate 60.
• the substrates 50, 60 are arranged in the Z direction so as to sandwich the multiple semiconductor elements 40 therebetween.
• the substrates 50, 60 are arranged so that at least a portion of each substrate faces the other in the Z direction.
• the substrates 50, 60 contain all of the multiple semiconductor elements 40 when viewed in a plan view.
• Substrate 50 is disposed on the drain electrode 41 side.
• Substrate 60 is disposed on the source electrode 42 side.
• Substrate 50 is electrically connected to drain electrode 41 and provides wiring functionality.
• Substrate 60 is electrically connected to source electrode 42 and provides wiring functionality.
• Substrates 50 and 60 provide a heat dissipation function to dissipate heat generated by semiconductor element 40.
• Substrate 50 comprises an insulating substrate 51, a front metal body 52, and a back metal body 53.
• Substrate 60 comprises an insulating substrate 61, a front metal body 62, and a back metal body 63.
• Insulating substrates 51, 61 may be made of resin or ceramic.
• Insulating substrate 51 electrically separates front metal body 52 from back metal body 53.
• Insulating substrate 61 electrically separates front metal body 62 from back metal body 63.
• the front surface metal bodies 52, 62 and the back surface metal bodies 53, 63 are provided as metal plates or metal foils.
• the front surface metal bodies 52, 62 and the back surface metal bodies 53, 63 are made of metals with good electrical and thermal conductivity, such as Cu or Al.
• the front surface metal bodies 52, 62 are patterned.
• the front surface metal bodies 52, 62 may have a plating film of Ni or Au on the metal surface.
• the front surface metal body 52 has a P wiring 521 and a relay wiring 522.
• the P wiring 521 and the relay wiring 522 are electrically separated by a predetermined gap. This gap is filled with the sealing resin body 30.
• the P wiring 521 is connected to the P terminal 91 and the drain electrode 41 of the semiconductor element 40H.
• the P wiring 521 electrically connects the P terminal 91 and the drain electrode 41 of the semiconductor element 40H.
• the P wiring 521 is generally rectangular in shape with its longitudinal axis in the Y direction in a plan view.
• the relay wiring 522 is connected to the drain electrode 41 of the semiconductor element 40L, the joint portion 80, and the O terminal 93.
• the relay wiring 522 electrically connects the O terminal 93 and the drain electrode 41 of the semiconductor element 40L.
• the relay wiring 522 is generally L-shaped in plan view.
• the relay wiring 522 has a base portion that is generally rectangular in plan view and an extension portion that continues to the base portion.
• the P wiring 521 and the relay wiring 522 are arranged side by side in the X direction.
• the relay wiring 522 is arranged so that its extended portion is adjacent to the P wiring 521.
• the relay wiring 522 is arranged so that its base is closer to the side surface 30d than to the side surface 30d.
• the drain electrode 41 of the semiconductor element 40L is connected to the relay wiring 522.
• the joint portion 80 is connected to the extended portion of the relay wiring 522.
• the P terminal 91 is connected to one end of the P wiring 521 in the Y direction.
• the O terminal 93 is connected to one end of the relay wiring 522 in the Y direction.
• the P terminal 91 and the O terminal 93 are arranged on the same side in the Y direction relative to the semiconductor element 40.
• the surface metal body 62 has an N wiring 621 and a relay wiring 622.
• the N wiring 621 and the relay wiring 622 are electrically separated by a predetermined distance (gap). This gap is filled with the sealing resin body 30.
• the N wiring 621 is connected to the N terminal 92 and the source electrode 42 of the semiconductor element 40L.
• the N wiring 621 electrically connects the N terminal 92 and the source electrode 42 of the semiconductor element 40L.
• the relay wiring 622 is connected to the source electrode 42 of the semiconductor element 40H and the joint part 80.
• the relay wiring 622 electrically connects the source electrode 42 of the semiconductor element 40H and the drain electrode 41 of the semiconductor element 40L via the joint part 80.
• N wiring 621 is generally L-shaped in plan view.
• Relay wiring 622 is also generally L-shaped in plan view.
• N wiring 621 and relay wiring 622 each have a generally rectangular base in plan view and an extension connected to the base.
• N wiring 621 and relay wiring 622 are arranged so that they interdigitate with each other.
• N wiring 621 and relay wiring 622 are arranged so that the extension of N wiring 621 is located on the side surface 30c side, and the extension of relay wiring 622 is located on the side surface 30d side.
• the base of N wiring 621 and the base of relay wiring 622 are aligned in the X direction.
• the extension of N wiring 621 and the extension of relay wiring 622 are aligned in the Y direction.
• the source electrode 42 of the semiconductor element 40L is connected to the base of the N wiring 621.
• the N terminal 92 is connected to the extended portion of the N wiring 621.
• the source electrode 42 of the semiconductor element 40H is connected to the base of the relay wiring 622.
• the joint portion 80 is connected to the extended portion of the relay wiring 622.
• the back metal bodies 53, 63 are electrically isolated from the front metal bodies 52, 62 by the insulating base materials 51, 61.
• the illustrated back metal bodies 53, 63 are so-called solid conductors arranged over almost the entire back surface of the insulating base materials 51, 61.
• the back metal body 53 is exposed from one surface 30a of the sealing resin body 30, and the back metal body 63 is exposed from the back surface 30b.
• the exposed surface 53a of the back metal body 53 is approximately flush with the one surface 30a.
• the exposed surface 63a of the back metal body 63 is approximately flush with the back surface 30b.
• the conductive spacer 70 functions as a spacer to ensure a predetermined distance between the semiconductor element 40 and the substrate 60.
• the conductive spacer 70 ensures the height required to electrically connect the corresponding signal terminal 94 to the pad 43 of the semiconductor element 40, for example.
• the conductive spacer 70 is located midway along the electrical and thermal conduction paths between the source electrode 42 of the semiconductor element 40 and the substrate 60, providing wiring and heat dissipation functions.
• the conductive spacer 70 includes a metal material with good electrical and thermal conductivity, such as Cu.
• the conductive spacer 70 may have a plated film on its surface.
• the conductive spacer 70 is a generally rectangular columnar body that is approximately the same size as the source electrode 42 in a plan view.
• the conductive spacers 70 are sometimes referred to as terminals, terminal blocks, metal blocks, etc.
• the semiconductor device 20 includes the same number of conductive spacers 70 as the semiconductor elements 40. Specifically, the semiconductor device 20 includes two conductive spacers 70. One of the conductive spacers 70 electrically connects the source electrode 42 of the semiconductor element 40H to the relay wiring 622. The other conductive spacer 70 electrically connects the source electrode 42 of the semiconductor element 40L to the N wiring 621.
• the joint 80 electrically connects the relay wirings 522, 622.
• the joint 80 electrically connects the upper arm 9H and the lower arm 9L.
• the joint 80 is provided between the semiconductor elements 40H and 40L in the X direction.
• the joint 80 is disposed in the overlapping region of the extended portions of the relay wirings 522, 622 in a plan view.
• the illustrated joint 80 is a metal column provided separately from the surface metal bodies 52, 62.
• the joint 80 extends in the Z direction. One end of the joint 80 is connected to the relay wiring 522, and the other end is connected to the relay wiring 622.
• the joint portion 80 may be integrally connected to the surface metal bodies 52, 62.
• the joint portion 80 may be provided integrally with the surface metal bodies 52, 62 as part of the substrates 50, 60.
• a part of the joint portion 80 may be provided as part of the substrate 50, and another part of the joint portion 80 may be provided as part of the substrate 60.
• the external connection terminals 90 are terminals for electrically connecting the semiconductor device 20 to external equipment.
• the external connection terminals 90 are formed using a metal material with good conductivity, such as Cu.
• the external connection terminals 90 are, for example, plate material.
• the external connection terminals 90 are sometimes referred to as leads.
• the external connection terminals 90 include a P terminal 91, an N terminal 92, an O terminal 93, and a signal terminal 94.
• the P terminal 91, the N terminal 92, and the O terminal 93 are sometimes referred to as main terminals because they are electrically connected to the main electrodes of the semiconductor element 40.
• the P terminal 91 and the N terminal 92 are sometimes referred to as power terminals.
• the P terminal 91 is connected to the P wiring 521 near one end in the Y direction.
• the P terminal 91 extends generally in the Y direction in a plan view.
• a portion of the P terminal 91, including the connection portion with the P wiring 521, is covered by the sealing resin body 30, and the remaining portion protrudes from the sealing resin body 30.
• the P terminal 91 protrudes from the sealing resin body 30 near the center in the Z direction on the side surface 30c.
• the N terminal 92 is connected to an extended portion of the N wiring 621.
• the N terminal 92 extends generally in the Y direction in a plan view.
• a portion of the N terminal 92, including the connection portion with the N wiring 621, is covered by the sealing resin body 30, and the remaining portion protrudes from the sealing resin body 30.
• the N terminal 92 protrudes outside the sealing resin body 30 from near the center of the side surface 30c in the Z direction.
• the O terminal 93 is connected near one end in the Y direction at the base of the relay wiring 522.
• the O terminal 93 extends generally in the Y direction in a plan view.
• a portion of the O terminal 93, including the connection portion with the relay wiring 522, is covered by the sealing resin body 30, and the remaining portion protrudes from the sealing resin body 30.
• the O terminal 93 protrudes outside the sealing resin body 30 from near the center in the Z direction on the side surface 30c.
• the P terminal 91, N terminal 92, and O terminal 93 are arranged side by side in the X direction. In the X direction, they are arranged in the order of P terminal 91, N terminal 92, and O terminal 93.
• the P terminal 91 and N terminal 92 which are power supply terminals, have their sides facing each other in a portion that includes the portion that protrudes from the sealing resin body 30.
• the protruding length of the N terminal 92 is approximately the same as the protruding length of the P terminal 91.
• the protruding lengths of the P terminal 91 and N terminal 92 are different from the protruding length of the O terminal 93.
• the protruding length of the O terminal 93 is longer than the protruding length of the N terminal 92 and the protruding length of the P terminal 91.
• the signal terminals 94 are electrically connected to the pads 43 of the corresponding semiconductor elements 40.
• the signal terminals 94 include a signal terminal connected to the pads 43 of the semiconductor element 40H and a signal terminal connected to the pads 43 of the semiconductor element 40L.
• the signal terminals 94 are connected to the corresponding pads 43, for example, via bonding wires (not shown).
• the signal terminals 94 extend generally in the Y direction in a plan view. A portion of the signal terminals 94, including the connection portion with the pads 43, is covered by the sealing resin body 30, and the remaining portion protrudes from the sealing resin body 30.
• the signal terminals 94 protrude outside the sealing resin body 30 from near the center in the Z direction on the side surface 30d.
• the external connection terminals 90 are provided as part of the lead frame.
• unnecessary portions of the lead frame, such as tie bars, are removed.
• the semiconductor device 20 is equipped with suspension leads 95. Before the unnecessary portions are removed, the suspension leads 95 hold the signal terminals 94 in place via the tie bars.
• One of the suspension leads 95 is connected to the P wiring 521, and the other is connected to the relay wiring 522.
• the suspension leads 95 extend generally in the Y direction in a plan view.
• the two suspension leads 95 are arranged in the X direction to sandwich the signal terminal 94 corresponding to the semiconductor element 40H and the signal terminal 94 corresponding to the semiconductor element 40L.
• a portion of the suspension lead 95, including the connection portion with the front surface metal body 52, is covered by the encapsulating resin body 30, and the remaining portion protrudes from the side surface 30d of the encapsulating resin body 30.
• the semiconductor device 20 includes a bonding material 100.
• the bonding material 100 may be solder or a sintered material.
• the drain electrode 41 of the semiconductor element 40 is connected to the surface metal body 52 via the bonding material 100.
• the source electrode 42 of the semiconductor element 40 is connected to the conductive spacer 70 via the bonding material 100.
• the conductive spacer 70 is connected to the surface metal body 62 via the bonding material 100.
• the joint portion 80 is connected to the surface metal bodies 52, 62 via the bonding material 100.
• the multiple bonding materials 100 may be made of a common material, or the material of some of the bonding materials 100 may be different from the material of the other bonding materials 100.
• the P terminal 91, N terminal 92, O terminal 93, and hanging lead 95 may be connected to the corresponding surface metal bodies 52, 62 using the above-mentioned bonding material 100.
• the P terminal 91, N terminal 92, O terminal 93, and hanging lead 95 may be solid-state bonded to the corresponding surface metal bodies 52, 62. Examples of solid-state bonding include ultrasonic bonding, room temperature bonding, friction stir bonding, diffusion bonding, and friction welding.
• the illustrated P terminal 91, N terminal 92, O terminal 93, and hanging lead 95 are ultrasonically bonded to the corresponding surface metal bodies 52, 62.
• the sealing resin body 30 seals the multiple semiconductor elements 40 that make up one phase of the upper and lower arm circuits 9.
• the sealing resin body 30 integrally seals the multiple semiconductor elements 40, part of the substrate 50, part of the substrate 60, the multiple conductive spacers 70, the joint portion 80, and part of each of the external connection terminals 90.
• the sealing resin body 30 seals the insulating base materials 51, 61 and the surface metal bodies 52, 62 on the substrates 50, 60.
• the semiconductor element 40 is disposed between the substrates 50 and 60 in the Z direction.
• the semiconductor element 40 is sandwiched between the opposing substrates 50 and 60. This allows heat from the semiconductor element 40 to be dissipated to both sides in the Z direction.
• the semiconductor device 20 has a double-sided heat dissipation structure.
• the exposed surface 53a of the back surface metal body 53 is approximately flush with one surface 30a of the encapsulating resin body 30.
• the exposed surface 63a of the back surface metal body 63 is approximately flush with the back surface 30b of the encapsulating resin body 30.
• the exposed surfaces 53a and 63a improve heat dissipation.
• the power conversion module 110 includes the semiconductor device 20 described above and a cooler 111.
• the cooler 111 is made of a metal material such as Al or Cu.
• the cooler 111 may have a flow path therein through which a refrigerant flows.
• the cooler 111 may be a heat dissipation member such as a heat sink.
• a heat sink is sometimes called a heat sink or cooling plate.
• the heat dissipation member may include heat dissipation fins.
• a bonding material such as solder or sintered Ag may be interposed between the exposed surfaces 53a, 63a of the rear surface metal bodies 53, 63 and the cooler 111.
• the cooler 111 may form part of the housing that houses the semiconductor device 20, or may be provided separately from the housing.
• the exposed surfaces 53a, 63a are thermally connected to the cooler 111.
• the power conversion module 110 includes three semiconductor devices 20 that constitute the inverter 5.
• the power conversion module 110 may have a structure in which the semiconductor devices 20 and the coolers 111 are stacked alternately in the Y direction.
• the power conversion module 110 may also have a structure in which three semiconductor devices 20 are arranged side by side between a pair of coolers 111.
• the rear surface metal bodies 53, 63 which are partially exposed from the sealing resin body 30, are electrically connected to, for example, the chassis of a moving object (vehicle). In other words, they are connected to the chassis ground.
• the chassis ground is the reference potential (ground potential) of the vehicle.
• the rear surface metal bodies 53, 63 are connected to the chassis ground, for example, via the cooler 111.
• the insulating base material 51 has a generally rectangular shape in plan view.
• the insulating base material 51 has four corners 510, 511, 512, and 513 and four sides 514, 515, 516, and 517.
• the corners 510, 511, 512, and 513 are the four corners of the substrate 50 (insulating base material 51).
• the side 515 is the end opposite the side 514 in the Y direction.
• the side 517 is the end opposite the side 516 in the X direction.
• the side 517 is the side on the side of the side surface 30f having the gate mark 32.
• the corner 510 is defined by the sides 514 and 516.
• the corner 511 is defined by the sides 514 and 517.
• the corner 512 is defined by the sides 515 and 516.
• the corner 513 is defined by sides 515 and 517 .
• the surface metal body 52 has multiple corners 54.
• the corners 54 include four corners 540, 541, 542, and 543 that correspond to the four corners of the substrate 50, as well as other corners 544, 545, 546, 547, and 548.
• Corner 540 corresponds to corner 510.
• Corner 541 corresponds to corner 511.
• Corner 542 corresponds to corner 512.
• Corner 543 corresponds to corner 513.
• the corners 54 are outwardly convex corners.
• the corner 540 located farthest from the gate mark 32 in a plan view is cut out.
• the corners of the corner 540 are rounded. Corners 544 and 545 are also cut out in the same way as corner 540.
• the other corners 541, 542, 543, 546, 547, and 548 are not cut out. Corner 543 located closest to the gate mark 32 is not cut out.
• Figure 8 shows the removal area on the drain electrode side substrate. Corners 540 and 542 are shown in Figure 8. Corner 540 has been intentionally cut out. In Figure 8, the cut-out area of corner 540 is shown as removal area 540S. Removal area 540S forms the outer contour of surface metal body 52 in a plan view, and is the area of the portion defined by corner 540 and the imaginary extensions of two straight lines connecting to corner 540. The two straight lines connecting to corner 540 are the two sides that define corner 540. The dashed dotted lines are imaginary extensions of the two straight lines. The length from the boundary between corner 540 and the straight lines to the intersection of the imaginary extensions is, for example, approximately 2 cm to 5 cm. The same applies to corners 544 and 545.
• Corner 542 is not cut out. Corner 542 has a chamfered shape with a small radius. Removal area 542S resulting from the chamfering of corner 542 is the area defined by corner 542 and the imaginary extensions of two straight lines connecting to corner 542. Removal area 542S is smaller than removal area 540S. The two straight lines connecting to corner 542 are the two sides that define corner 542. The dashed dotted lines are imaginary extensions of the two straight lines. The radius of curvature (R) of corner 542 is, for example, approximately 0.5 cm. The same applies to corners 541, 543, 546, 547, and 548.
• the insulating substrate 61 has a generally rectangular shape in plan view.
• the insulating substrate 61 has four corners 610, 611, 612, and 613, and four sides 614, 615, 616, and 617. Corners 610, 611, 612, and 613 are the four corners of the substrate 60 (insulating substrate 61).
• Side 615 is the end opposite side 614 in the Y direction.
• Side 617 is the end opposite side 616 in the X direction.
• Side 617 is the side on the side of side 30f having gate mark 32.
• Corner 610 is defined by sides 614 and 616.
• Corner 611 is defined by sides 614 and 617.
• Corner 612 is defined by sides 615 and 616.
• Corner portion 613 is defined by sides 615 and 617.
• the surface metal body 62 has multiple corners 64.
• the corners 64 include four corners 640, 641, 642, and 643 that correspond to the four corners of the substrate 60, as well as other corners 644, 645, 646, 647, 648, and 649.
• Corner 640 corresponds to corner 610.
• Corner 641 corresponds to corner 611.
• Corner 642 corresponds to corner 612.
• Corner 643 corresponds to corner 613.
• the corners 64 are outwardly convex corners.
• Corner portions 644, 645, 646, 647, 648, and 649 are connected to the side portions that define the gap between the N wiring 621 and the relay wiring 622.
• Corner portion 644 is a corner of the extended portion of the N wiring 621 on the side 614 side.
• Corner portion 645 is a corner of the base of the relay wiring 622 opposite corner portion 641 in the X direction.
• the gap between the N wiring 621 and the relay wiring 622 is crank-shaped in plan view. Corners 644 and 645 are provided at the end of the gap on the side 614 side.
• Corner portion 646 is a corner of the extended portion of the N wiring 621 on the side 615 side. Corner portion 646 is located opposite corner portion 644 in the Y direction in the extended portion of the N wiring 621.
• Corner 647 is a corner of the extended portion of relay wiring 622 on the side 614 side. Corner 648 is an end of N wiring 621 opposite corner 642 in the X direction. Corner 649 is an end of relay wiring 622 opposite corner 643 in the X direction. Corner 647 is a corner of the extended portion of relay wiring 622 on the side 615 side. Corners 648 and 649 are provided at the ends of the gap on the side 615 side.
• the corner 640 located farthest from the gate mark 32 in a plan view is cut out.
• the corner 640 has been rounded off.
• the other corners 641, 642, 643, 644, 645, 646, 647, 648, and 649 are not cut out.
• the corner 643 located closest to the gate mark 32 is not cut out.
• Figure 9 is a diagram showing the removal area on the substrate on the source electrode side.
• Figure 9 shows corners 640 and 642. Corner 640, like corner 540, has been intentionally cut out.
• Removal area 640S forms the outer contour of surface metal body 62 in a plan view, and is the area of the portion defined by corner 640 and the imaginary extensions of two straight lines continuing to corner 640.
• the two straight lines continuing to corner 640 are the two sides that define corner 640.
• the dashed dotted lines are imaginary extensions of the two straight lines.
• the length from the boundary between corner 640 and the straight lines to the intersection of the imaginary extensions is, for example, approximately 2 cm to 5 cm, similar to corner 540.
• Corner 642 is not cut out. Corner 642 has a chamfered shape with a small radius.
• the removal area 642S resulting from the chamfering of corner 642 is the area defined by corner 642 and the imaginary extensions of two straight lines continuing to corner 642. Removal area 642S is smaller than removal area 640S.
• the two straight lines continuing to corner 642 are the two sides that define corner 642.
• the dashed-dotted lines are imaginary extensions of the two straight lines.
• the radius of curvature (R) of corner 642 is, for example, approximately 0.5 cm. The same applies to corners 641, 643, 644, 645, 646, 647, 648, and 649.
• the semiconductor device 20 of this embodiment includes substrates 50, 60, a semiconductor element 40, and an encapsulating resin body 30.
• the back surface metal bodies 53, 63 have exposed surfaces 53a, 63a that are exposed from the encapsulating resin body 30 and thermally connected to the cooler 111.
• the front surface metal bodies 52, 62 are patterned and have multiple corners 54, 64 in a plan view. Some of the multiple corners are intentionally cut out. In the illustrated semiconductor device 20, corners 540, 544, 545, and 640 are cut out.
• voids are less likely to remain in the cut-out corners.
• voids are less likely to get caught in the corners than with pin corners.
• the corners of the front surface metal bodies 52, 62 the corners are separated from the back surface metal bodies 53, 63. Therefore, even if voids do occur in the corners, it is possible to prevent the front surface metal bodies 52, 62 and the back surface metal bodies 53, 63 from being connected by voids and failing to ensure insulation. Therefore, it is possible to prevent poor insulation caused by voids.
• the removal area of the portion that forms the outer contour of the surface metal body 52, 62 in a plan view and is defined by the corner 54, 64 and the imaginary extension of two straight lines that connect to any corner 54, 64 may be larger at the cut-out first corner than at the second corner.
• the removal area 540S of the first corner 540 is sufficiently larger than the removal area 542S of the second corner 542.
• the removal area 640S of the first corner 640 is sufficiently larger than the removal area 642S of the second corner 642.
• the encapsulating resin body 30 may have a gate mark 32.
• the encapsulating resin body 30 may be a resin molded body.
• the first corner may include the corner located farthest from the gate mark 32.
• the corners 54, 64 located farthest from the gate mark 32 are corners 540, 640.
• Figure 10 shows the final confluence point during molding of the encapsulating resin body. This shows the state immediately before the resins converge during molding of the encapsulating resin body.
• Figure 10 illustrates a substrate 50.
• Reference numeral 120 indicates the cavity wall.
• the corner farthest from the gate is designed to be the final confluence point for the resin 33 that forms the encapsulating resin body 30.
• the resin 33 converges at corner 540, eliminating voids in corner 540.
• corner 54 excluding corner 540, is located midway between the gate and the final confluence point, so the voids are pushed by the flow of resin 33, making it less likely for voids to remain than at corner 540.
• the front surface metal bodies 52, 62 are moved away from the back surface metal bodies 53, 63 at the corners 540, 640. Therefore, even if air is drawn in at the final junction and voids remain at the corners 540, 640, it is possible to prevent the front surface metal bodies 52, 62 and the back surface metal bodies 53, 63 from being connected by voids and failing to ensure insulation.
• the second corner may include the corner closest to the gate mark 32.
• the corners 54, 64 closest to the gate mark 32 are corners 543, 643. Because corners 543, 643 are located near the gate, voids are pushed out by the flow of resin 33, making it less likely for voids to remain compared to corner 540.
• the multiple corners 54, 64 may include four corners corresponding to the four corners of the planar, generally rectangular substrates 50, 60. At least one of the four corners may be the first corner.
• the four corners are corners 540, 541, 542, and 543 on substrate 50, and corners 640, 641, 642, and 643 on substrate 60.
• At least one corner 54 cut out, but not corner 64 it is also possible to have at least one corner 54 cut out, but not corner 64. It is also possible to have at least one corner 64 cut out, but not corner 54. For example, all corners 54, 64 may be cut out. However, if corners 54, 64 are cut out, the surface metal bodies 52, 62 will become smaller accordingly. Therefore, it is better not to cut out corners where insulation failure due to voids is less likely to occur. For example, this can increase the degree of freedom in connecting the external connection terminal 90, that is, the degree of freedom in wiring.
• corners 54 and 64 excluding corners 540, 544, 545, and 640, an example of a small R chamfer shape is shown, but this is not limited to this.
• a C-chamfer shape or a pin angle may also be used.
• FIG. 12 is a plan view showing the substrate on the drain electrode side in the semiconductor device 20 according to this embodiment.
• FIG. 12 corresponds to FIG. 5.
• FIG. 13 is a plan view showing the substrate on the source electrode side.
• FIG. 13 corresponds to FIG. 6.
• the sealing resin body is indicated by a dashed line.
• the substrates 50, 60 have a generally rectangular planar shape.
• the insulation width which is the distance from the end of the surface metal body 52 to the end of the insulating substrate 51, is wider at sides 514, 516 than at sides 515, 517.
• the insulation width W51 at sides 514, 516 away from the gate mark 32 is wider than the insulation width W52 at sides 515, 517 closer to the gate mark 32.
• the insulation width is the width excluding the corners 54, 64 when the corners 54, 64 are cut out.
• the other configurations are the same as those described in the previous embodiment. For example, corners 540, 544, 545, and 640 are cut out.
• the substrates 50, 60 may have four sides that form a rectangular outline in a plan view, including a first side, a second side, and a third side and a fourth side that are located farther from the gate mark 32 than the first and second sides.
• the insulation width which is the width from the end of the surface metal body 52, 62 to the end of the insulating base material 51, 61, may be wider on the third and fourth sides than on the first and second sides.
• the sides 515, 615 correspond to the first side
• the sides 517, 617 correspond to the second side
• the sides 514, 614 correspond to the third side
• the sides 516, 616 correspond to the fourth side.
• the insulation width of the third and fourth sides, which are located away from the gate mark 32, is wider than the insulation width of the first and second sides, which are closer to the gate mark 32, and the front surface metal bodies 52, 62 are spaced apart from the back surface metal bodies 53, 63 at the third and fourth sides. Therefore, even if voids occur adjacent to the ends of the front surface metal bodies 52, 62, it is possible to prevent the front surface metal bodies 52, 62 and the back surface metal bodies 53, 63 from being connected by a void, which could result in insulation being impaired. This synergistic effect with the configuration in which at least one of the corners 54, 64 is cut out effectively prevents poor insulation caused by voids.
• the insulation width of the third and fourth sides located away from the gate mark 32 is wider than the insulation width of the first and second sides close to the gate mark 32.
• this is not limiting.
• the insulation width of the third and fourth sides located away from the gate mark 32 may be wider than the insulation width of the first and second sides close to the gate mark 32.
• the insulation width W1 of the sides 514, 516 located away from the gate mark 32 may be wider than the insulation width W2 of the sides 515, 517 close to the gate mark 32.
• the insulation width of the sides 614, 616 located away from the gate mark 32 may be wider than the insulation width of the sides 615, 617 close to the gate mark 32.
• This embodiment is a modification of the previous embodiment, and the description of the previous embodiment can be used.
• the insulation width was varied depending on the positional relationship with the gate trace. Alternatively, or in addition, the spacing between the conductor patterns and the insulation width may satisfy a predetermined relationship.
• FIG. 15 is a plan view showing the substrate on the drain electrode side in the semiconductor device 20 according to this embodiment.
• FIG. 15 corresponds to FIG. 5.
• FIG. 16 is a plan view showing the substrate on the source electrode side.
• FIG. 16 corresponds to FIG. 6.
• the sealing resin body is indicated by a dashed line.
• the substrate 50 has a generally rectangular shape in plan view.
• the surface metal body 52 has a P wiring 521 that is generally rectangular in plan view and a relay wiring 522 that is generally L-shaped in plan view. Of the corners 54, corners 540, 544, and 545 are cut out.
• the distance between the P wiring 521 and the relay wiring 522 over its entire length is the insulation width, which is the width from the end of the surface metal body 52 to the end of the insulating base material 51, and is wider than the insulation width of the portion excluding the cut-out corners 540, 544, and 545.
• the distance W531 between the P wiring 521 and the extended portion of the relay wiring 522 is wider than the insulation width W54.
• the distance W531 is at least 1.5 times the insulation width W54.
• the distance W532 between the P wiring 521 and the base of the relay wiring 522 is wider than the distance W531.
• the distance W532 is at least twice the insulation width W54.
• the substrate 60 has a generally rectangular shape in plan view.
• the surface metal body 62 has an N wiring 621 that is generally L-shaped in plan view and a relay wiring 622 that is generally L-shaped in plan view. Of the corners 64, corner 640 is cut out.
• the distance between the N wiring 621 and the relay wiring 622 over their entire length is the insulation width, which is the distance from the end of the surface metal body 62 to the end of the insulating substrate 61, and is wider than the insulation width excluding the cut-out corner 640.
• the distance between the N wiring 621 and the relay wiring 622 is approximately the same (constant width) over their entire length.
• the distance W63 between the N wiring 621 and the relay wiring 622 is wider than the insulation width W64.
• the distance W63 is at least 1.5 times the insulation width W64.
• the rest of the configuration is the same as that described in the preceding embodiment (first embodiment).
• the surface metal bodies 52, 62 may include a first conductor pattern and a second conductor pattern that has a different potential from the first conductor pattern and is positioned adjacent to the first conductor pattern.
• the distance between the first conductor pattern and the second conductor pattern may be an insulation width, which is the width from the end of the surface metal bodies 52, 62 to the end of the insulating base material 51, 61, and may be wider than the insulation width of the portion excluding the cutout corners.
• the P wiring 521 and the N wiring 621 correspond to the first conductor pattern
• the relay wirings 522, 622 correspond to the second conductor pattern.
• the distance between the first and second conductor patterns By making the distance between the first and second conductor patterns wider than the insulation width, it is possible to improve the flow of resin between the first and second conductor patterns. For example, it is possible to suppress the entrapment of voids and make it easier for entrapped voids to escape. This makes it possible to suppress the occurrence of voids between the first and second conductor patterns and short-circuiting between the first and second conductor patterns. Therefore, it is possible to suppress the occurrence of poor insulation due to voids.
• the spacing between the first conductor pattern and the second conductor pattern may be 1.5 times the insulation width or more.
• the spacing W532 on the side farther from the gate mark 32 i.e., the spacing on the exit side where the resin escapes, is made wider. This improves the flow of resin from between the patterns to the outer periphery, making it easier for trapped voids to escape.
• the distance between the first conductor pattern and the second conductor pattern may be wider than the insulation width.
• the distance between the P wiring 521 and the relay wiring 522 may be wider than the insulation widths W51 and W52.
• the distance between the N wiring 621 and the relay wiring 622 may be wider than the insulation widths W61 and W62.
• the distance between the first conductor pattern and the second conductor pattern may be wider than the insulation width.
• the distance between the first and second conductor patterns and the insulation width are not particularly limited.
• the distance between the first and second conductor patterns may be narrower than the insulation width.
• the distance between the first and second conductor patterns may be equal to the insulation width.
• the distance between the P wiring 521 and the relay wiring 522 may be narrower than the insulation widths W51 and W52.
• the distance between the N wiring 621 and the relay wiring 622 may be narrower than the insulation widths W61 and W62.
• FIG. 17 shows an example of a power conversion circuit to which the semiconductor device according to this embodiment is applied.
• FIG. 17 corresponds to FIG. 1.
• the power conversion circuit 4 includes an inverter 5 and a smoothing capacitor 6, as in the preceding embodiment.
• the inverter 5 includes upper and lower arm circuits 9 for three phases.
• Each arm includes a plurality of switching elements.
• each arm includes two MOSFETs 11 connected in parallel.
• the two parallel-connected MOSFETs 11 are turned on and off at the same timing by a common gate drive signal (drive voltage).
• the other configurations are the same as those shown in the preceding embodiment.
• Fig. 18 is a plan view showing an example of a semiconductor device.
• Fig. 19 is a plan view showing a portion covered with a sealing resin body.
• the sealing resin body is shown by a dashed line, and the substrate and conductor pattern on the source electrode side are shown by a broken line.
• Fig. 19 omits the pads of the semiconductor element, the bonding wires, and the conductor pattern of the relay substrate.
• Fig. 20 is a plan view showing the substrate on the drain electrode side.
• Fig. 21 is a plan view showing the substrate on the source electrode side. Figs. 20 and 21 show a surface metal body.
• the sealing resin body is also shown by a dashed line.
• the semiconductor device 20 includes an encapsulating resin body 30, a semiconductor element 40, substrates 50 and 60, a conductive spacer 70, a joint portion 80, and an external connection terminal 90.
• the semiconductor device 20 further includes an interconnect substrate 105.
• the exposed surface 53a of the back surface metal body 53 is exposed from one surface 30a.
• the exposed surface 63a of the back surface metal body 63 is exposed from the back surface 30b.
• the exposed surfaces 53a, 63a are connected to a cooler (not shown).
• the P terminal 91, the N terminal 92, and the signal terminal 94 on the semiconductor element 40H side protrude from the side surface 30c.
• the O terminal 93 and the signal terminal 94 on the semiconductor element 40L side protrude from the side surface 30d.
• the gate mark 32 is provided on the side surface 30f of the sealing resin body 30.
• the gate mark 32 is provided in a central region including the center of the side surface 30f in the Y direction.
• the semiconductor device 20 includes two semiconductor elements 40H and two semiconductor elements 40L.
• the two semiconductor elements 40H are aligned in the X direction.
• the two semiconductor elements 40L are aligned in the X direction.
• the semiconductor elements 40H and 40L are aligned in the Y direction.
• the semiconductor element 40H is positioned so that its pads 43 are located on the side surface 30c.
• the semiconductor element 40L is positioned so that its pads 43 are located on the side surface 30d.
• the surface metal body 52 of the substrate 50 has a P wiring 521, a relay wiring 522, and an island 523.
• the relay substrate 105 is mounted on the island 523.
• the P wiring 521 and the relay wiring 522 are generally U-shaped in plan view.
• the island 523 is provided at the opening of the U shape for each of the P wiring 521 and the relay wiring 522.
• the P wiring 521 and the relay wiring 522 are aligned in the Y direction with the opening facing outward.
• the distance between the P wiring 521 and the relay wiring 522 is approximately the same (constant width) over the entire length.
• the surface metal body 52 has multiple corners 55.
• the corners 55 include four corners 550, 551, 552, and 553 corresponding to corners 510, 511, 512, and 513, as well as other corners 554, 555, 556, 557, 558, 559, 55A, and 55B.
• Corner 554 of P wiring 521 is located opposite corner 550 in the Y direction. Corner 555 is located opposite corner 551 in the Y direction. Corner 556 of relay wiring 522 is located opposite corner 552 in the Y direction. Corner 557 is located opposite corner 553 in the Y direction. Corners 554 and 556 are formed between P wiring 521 and relay wiring 522 and are located at one end of a gap extending in the X direction, while corners 555 and 557 are located at the other end of the gap.
• Corner 558 is located opposite corner 550 at one end of the U-shape. Corner 559 is located opposite corner 551 at the other end of the U-shape. Corner 55A is located opposite corner 552 at one end of the U-shape. Corner 55B is located opposite corner 553 at the other end of the U-shape.
• All corners 550, 551, 552, and 553 are notched. Corners 554, 555, 556, 557, 558, 559, 55A, and 55B are not cut out. Although not shown, as in the previous embodiment, the removed area of the notched corners 550, 551, 552, and 553 is larger than the removed area of the unnotched corners 554, 555, 556, 557, 558, 559, 55A, and 55B.
• the spacing W55 between the P wiring 521 and the relay wiring 522 is wider than the insulation width W56. The spacing W55 is 1.5 times or more the insulation width W56.
• the insulation width W56 is the width from the end of the surface metal body 52 to the end of the insulating substrate 51, excluding the notched corners 540, 541, 542, and 543.
• the surface metal body 62 of the substrate 60 has an N wiring 621 and a relay wiring 622.
• the N wiring 621 is roughly C-shaped in plan view.
• the relay wiring 622 is hexagonal, similar to the home plate in baseball.
• the relay wiring 622 is located at the opening of the C-shape of the N wiring 621.
• the surface metal body 62 has multiple corners 65.
• the corners 65 include four corners 650, 651, 652, and 653 corresponding to corners 610, 611, 612, and 613, as well as other corners 654, 655, 656, 657, 658, 659, 65A, 65B, 65C, and 65D.
• Corner 654 of N wiring 621 is located opposite corner 650 at one end of the C-shape. Corner 655 is located opposite corner 651 at the other end of the C-shape. Corner 656 is located opposite corner 654 in the Y direction. Corner 657 is located opposite corner 655 in the Y direction. Corner 658 is provided at one end of relay wiring 622 in the Y direction. Corner 659 is located opposite corner 658 in the X direction. Corner 65A is located in the middle of relay wiring 622 in the Y direction. Corner 65B is located opposite corner 65A in the X direction. Corner 65C is provided at the other end of relay wiring 622. Corner 65D is located opposite corner 65C in the X direction.
• the corners 65 are not cut out.
• the distance W65 between the N wiring 621 and the relay wiring 622 is wider than the insulation width W66.
• the distance W65 is 1.5 times or more the insulation width W66.
• the insulation width W66 is the width from the end of the surface metal body 62 to the end of the insulating substrate 61. In the N wiring 621, the distance between the ends of the C-shape is wider than the distance W65.
• the drain electrode 41 of semiconductor element 40H is connected to P wiring 521.
• the source electrode 42 is connected to relay wiring 622 via a conductive spacer 70.
• the drain electrode 41 of semiconductor element 40L is connected to relay wiring 522.
• the source electrode 42 is connected to N wiring 621 via a conductive spacer 70.
• the joint portion 80 is disposed in the area where the relay wirings 522, 622 overlap in a plan view. One end of the joint portion 80 is connected to relay wiring 522, and the other end is connected to relay wiring 622.
• the illustrated semiconductor device 20 has two P terminals 91, two N terminals 92, and two O terminals 93.
• the P terminals 91 are connected to both ends of the U-shape of the P wiring 521, respectively.
• the N terminals 92 are connected to both ends of the C-shape of the N wiring 621, respectively.
• the O terminals 93 are connected to both ends of the U-shape of the relay wiring 522, respectively.
• the signal terminals 94 are electrically connected to the corresponding pads 43 via the conductor pattern of the relay substrate 105.
• the relay substrate 105 is connected to the pads 43, for example, by bonding wires.
• the signal terminals 94 are connected to the relay substrate 105, for example, by bonding wires.
• the other configurations are the same as those described in the previous embodiment.
• the semiconductor device 20 of this embodiment includes substrates 50, 60, a semiconductor element 40, and an encapsulating resin body 30.
• the back surface metal bodies 53, 63 are exposed from the encapsulating resin body 30.
• the front surface metal bodies 52, 62 are patterned and have multiple corners 55, 65 in a plan view. Some of the multiple corners are intentionally cut out. In the illustrated semiconductor device 20, some of the corners 55 are cut out. Therefore, as in the previous embodiment, insulation failure due to voids can be suppressed.
• the cut-out first corner may include the corners 550, 552 located farthest from the gate mark 32. Cutting out the corners 550, 552 moves the front surface metal body 52 away from the back surface metal body 53 at the corners 550, 552. Therefore, even if air is drawn in at the final junction and voids remain at the corners 550, 552, it is possible to prevent the front surface metal body 52 and the back surface metal body 53 from being connected by voids, which would make it impossible to ensure insulation.
• the multiple corners 55 may include four corners corresponding to the four corners of the substrate 50, which is generally rectangular in plan view. At least one of the four corners may be the first corner.
• all four corners 550, 551, 552, and 553 are cut out. By cutting out the corners 550, 551, 552, and 553, where voids are likely to occur, it is possible to prevent insulation failure due to voids.
• the surface metal body 52 may include a first conductor pattern and a second conductor pattern that has a different potential from the first conductor pattern and is located adjacent to the first conductor pattern.
• the distance between the first conductor pattern and the second conductor pattern may be an insulation width, which is the width from the end of the surface metal body 52 to the end of the insulating substrate 51, and may be wider than the insulation width of the portion excluding the cut-out corner.
• the P wiring 521 corresponds to the first conductor pattern
• the relay wiring 522 corresponds to the second conductor pattern.
• the distance between the first conductor pattern and the second conductor pattern By making the distance between the first conductor pattern and the second conductor pattern wider than the insulation width, it is possible to improve the flow of resin between the first conductor pattern and the second conductor pattern. This makes it possible to prevent voids from occurring between the first conductor pattern and the second conductor pattern, which would otherwise cause a short circuit between the first conductor pattern and the second conductor pattern.
• the distance between the first conductor pattern and the second conductor pattern may be 1.5 times the insulation width or more.
• At least one of the corners 65 may be cut out. At least one of the corners 65 may be cut out, but the corner 55 may not be cut out.
• the configuration described in this embodiment may be combined with the configuration described in the second embodiment or the configuration described in the third embodiment.
• the number of switching elements constituting each arm is not limited to two. It may be three or more.
• the semiconductor device 20 may include three or more semiconductor elements 40H and 40L.
• the semiconductor device 20 includes two substrates 50, 60, this is not limiting. It may also include only the substrate 50. Instead of the substrate 60, a metal clip, a bonding wire, or other wiring member may be used. This can also be applied to a semiconductor device 20 with a single-sided heat dissipation structure.
• the semiconductor device 20 an example of a 2-in-1 package that provides upper and lower arm circuits 9 for one phase has been shown, but this is not limiting.
• the semiconductor device 20 may be, for example, a 1-in-1 package that provides one arm, or a 6-in-1 package.
• the plurality of corner portions include first corner portions (540, 640) and second corner portions (542, 642) that are notched corner portions, A semiconductor device according to technical idea 1, wherein the removal area defined by the corner and a virtual extension of two straight line portions that form the outer contour of the surface metal body in the planar view and are connected to any of the corners is larger at the first corner than at the second corner.
• the sealing resin body has a gate mark (32), The semiconductor device according to Technical Concept 2, wherein the first corner portion includes the corner portion located farthest from the gate mark.
• the substrate has a rectangular shape in the plan view, the plurality of corner portions include four corner portions corresponding to four corners of the substrate, The semiconductor device according to Technical Concept 2, wherein at least one of the four corners is the first corner.
• the sealing resin body has a gate mark (32),
• the substrate has four sides that form a rectangular outline in the plan view, including a first side (515, 615), a second side (517, 617), and a third side (514, 614) and a fourth side (516, 616) that are positioned farther from the gate mark than the first side and the second side,
• the surface metal body includes a first conductor pattern (521, 621) and a second conductor pattern (522, 622) that has a different potential from the first conductor pattern and is located adjacent to the first conductor pattern,

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• 2024
  • 2024-03-21 JP JP2024045330A patent/JP2025145247A/ja active Pending
• 2025
  • 2025-02-11 WO PCT/JP2025/004444 patent/WO2025197362A1/ja active Pending

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