WO2025195063A1 - 电路板及显示装置 - Google Patents

电路板及显示装置

Info

Publication number
WO2025195063A1
WO2025195063A1 PCT/CN2025/077151 CN2025077151W WO2025195063A1 WO 2025195063 A1 WO2025195063 A1 WO 2025195063A1 CN 2025077151 W CN2025077151 W CN 2025077151W WO 2025195063 A1 WO2025195063 A1 WO 2025195063A1
Authority
WO
WIPO (PCT)
Prior art keywords
line
circuit board
conductive layer
traces
sub
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/CN2025/077151
Other languages
English (en)
French (fr)
Other versions
WO2025195063A9 (zh
Inventor
张家祥
胡罗勇
张育仁
秦瑞
张云巧
张斌
吴承龙
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd, Chengdu BOE Optoelectronics Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Publication of WO2025195063A1 publication Critical patent/WO2025195063A1/zh
Publication of WO2025195063A9 publication Critical patent/WO2025195063A9/zh
Anticipated expiration legal-status Critical
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
    • G09F9/335—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes being organic light emitting diodes [OLED]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections

Definitions

  • the present disclosure relates to the field of display technology, and in particular to a circuit board and a display device.
  • OLED organic light-emitting diode
  • a circuit board has a main body area, a bending area, and a binding area connected in sequence.
  • the circuit board includes multiple conductive layers stacked together.
  • the circuit board also includes a first signal line, the first signal line including a plurality of first traces and a second trace; the first trace is arranged in the main body area and extends along a first direction; the second trace is arranged in the bending area, with one end extending to the main body area and connected to the first trace, and the other end extending to the binding area; the first direction is from the main body area to the bending area; the plurality of first traces are arranged in different conductive layers, the orthographic projections of at least two of the first traces on a reference plane overlap, and the two ends of the overlapping portion are connected; the reference plane is parallel to the surface of the conductive layer.
  • the multilayer conductive layer includes a first conductive layer and/or a second conductive layer.
  • the first conductive layer includes a second signal line; the signal transmitted by the second signal line is different from the signal transmitted by the first signal line, and the line width of the second signal line is smaller than the sum of the line widths of the plurality of first routing lines; the plurality of first routing lines include a first sub-line, and the first sub-line is arranged in the first conductive layer.
  • the second conductive layer is arranged on one side of the first conductive layer along a third direction, and the second conductive layer includes a third signal line, and the line width of the third signal line is smaller than the sum of the line widths of the plurality of first routing lines; the signal transmitted by the third signal line is different from the signal transmitted by the first signal line; the plurality of first routing lines also include a second sub-line, and the second sub-line is arranged in the second conductive layer, and the third direction is perpendicular to the first conductive layer.
  • the orthographic projection of the second sub-line on the reference plane overlaps with the orthographic projection of the first sub-line on the reference plane
  • the circuit board further includes at least one insulating layer disposed between the first conductive layer and the second conductive layer; the at least one insulating layer includes a connection hole; the first sub-line includes a set segment, and the set segment of the first sub-line extends into the connection hole to connect with the second sub-line.
  • the first sub-line includes a set line segment, and a length of the set line segment is equal to a length of the shorter one of the first sub-line and the second sub-line.
  • the first sub-line includes a plurality of set line segments, the length of the set line segments is smaller than the length of the first sub-line and smaller than the length of the second sub-line, and the plurality of set line segments are spaced apart along the first direction.
  • the plurality of first traces have the same width.
  • the second routing line is disposed on the same layer as one of the first routing lines.
  • the resistivities of the plurality of first traces are equal, and the width of the second trace is greater than or equal to the sum of the widths of the plurality of first traces.
  • At least two first traces have different resistivities
  • the second trace is connected to one of the first traces with a smaller resistivity
  • the width of the second trace is smaller than the sum of the widths of the first traces.
  • the multi-layer conductive layer further includes a third conductive layer, the third conductive layer being a different conductive layer from the conductive layer where the first trace is located, and the second trace is disposed in the third conductive layer.
  • the outermost conductive layers in the multi-layer conductive layers where the multiple first traces are located are the fourth conductive layer and the fifth conductive layer; the third conductive layer is arranged on a side of one of the fourth conductive layer and the fifth conductive layer away from the other.
  • the sum of the line widths of the plurality of first traces is greater than or equal to 0.8 mm.
  • the width of the first trace is less than 0.8 mm.
  • the width of the circuit board located in the main body area along the second direction is 11 mm to 13 mm; and the second direction intersects the first direction.
  • a display device in another aspect, includes a display panel and a circuit board according to any of the above embodiments.
  • the display panel has a display side and a non-display side disposed opposite each other.
  • the circuit board is disposed on the non-display side of the display panel and is connected to the display panel.
  • FIG1 is a structural diagram of a display device according to some embodiments.
  • FIG2 is another structural diagram of a display device according to some embodiments.
  • FIG3 is another structural diagram of a display device according to some embodiments.
  • FIG4 is a structural diagram of a display panel including a main body portion, a bending portion, and a binding portion according to some embodiments;
  • FIG5 is a structural diagram of an unbent circuit board in a display device according to some embodiments.
  • FIG6 shows a structure in which a circuit board in a display device is bent according to some embodiments
  • FIG7 is a structural diagram of a circuit board according to some embodiments.
  • FIG8 is a cross-sectional view along section line A-A in FIG7 ;
  • FIG9 is a structural diagram of a circuit board including a first conductive layer according to some embodiments.
  • FIG10 is a structural diagram of a circuit board including a second conductive layer according to some embodiments.
  • FIG11 is a structural diagram of a second routing line including a set line segment according to some embodiments.
  • FIG12 is a structural diagram showing a second routing line including a plurality of set line segments according to some embodiments.
  • FIG13 is a cross-sectional view along the section line B-B in FIG7.
  • first and second are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Therefore, a feature defined as “first” or “second” may explicitly or implicitly include one or more of the features.
  • plural means two or more.
  • the expressions “coupled” and “connected” and their derivatives may be used.
  • the term “connected” may be used to indicate that two or more components are in direct physical or electrical contact with each other.
  • the term “coupled” may be used to indicate that two or more components are in direct physical or electrical contact.
  • the term “coupled” or “communicatively coupled” may also mean that two or more components are not in direct contact with each other, but still cooperate or interact with each other.
  • At least one of A, B and C has the same meaning as “at least one of A, B or C” and both include the following combinations of A, B and C: A only, B only, C only, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B and C.
  • a and/or B includes the following three combinations: A only, B only, and a combination of A and B.
  • the term “if” is optionally interpreted to mean “when” or “upon” or “in response to determining” or “in response to detecting,” depending on the context.
  • the phrases “if it is determined that” or “if [stated condition or event] is detected” are optionally interpreted to mean “upon determining” or “in response to determining” or “upon detecting [stated condition or event]” or “in response to detecting [stated condition or event],” depending on the context.
  • parallel includes absolute parallelism and approximate parallelism, wherein the acceptable deviation range of approximate parallelism can be, for example, a deviation within 5°;
  • perpendicular includes absolute perpendicularity and approximate perpendicularity, wherein the acceptable deviation range of approximate perpendicularity can also be, for example, a deviation within 5°.
  • equal includes absolute equality and approximate equality, wherein the acceptable deviation range of approximate equality can be, for example, that the difference between the two equals is less than or equal to 5% of either one.
  • Exemplary embodiments are described herein with reference to cross-sectional and/or plan views that are idealized exemplary drawings.
  • the thicknesses of layers and regions are exaggerated for clarity. Therefore, variations in shape relative to the drawings due to, for example, manufacturing techniques and/or tolerances are contemplated. Therefore, the exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but rather include deviations in shape due to, for example, manufacturing.
  • an etched region shown as a rectangle will typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shape of regions of the device and are not intended to limit the scope of the exemplary embodiments.
  • a display device 1000 which may be any device that displays anything, whether in motion (eg, video) or stationary (eg, still image), and whether text or images.
  • the display device 1000 can be any product or component with a display function, such as a television, a laptop computer, a tablet computer, a mobile phone, a personal digital assistant (PDA), a navigator, a wearable device, an augmented reality (AR) device, a virtual reality (VR) device, a vehicle display, or a flight display.
  • a display function such as a television, a laptop computer, a tablet computer, a mobile phone, a personal digital assistant (PDA), a navigator, a wearable device, an augmented reality (AR) device, a virtual reality (VR) device, a vehicle display, or a flight display.
  • PDA personal digital assistant
  • AR augmented reality
  • VR virtual reality
  • the display device 1000 may be a portable display product, such as the mobile phone shown in FIG1 .
  • the display device 1000 may be a wearable device.
  • the display device 1000 may be a watch as shown in FIG2 .
  • the following uses a mobile phone as an example to schematically illustrate some embodiments of the present disclosure.
  • the embodiments of the present disclosure are not limited thereto, and a watch as the display device may also be considered, as long as the same technical concept is applied.
  • a display device 1000 includes a display panel 100 , a housing 200 , and a cover plate 300 .
  • the display panel 100 has a relative display side 100A and a non-display side 100B
  • the display side 100A refers to the side of the display panel 100 that can emit light (the upper side of the display panel 100 in Figure 3)
  • the non-display side 100B refers to the other side opposite to the display side 100A (the lower side of the display panel 100 in Figure 3).
  • the display panel 100 may be of various types and may be selected according to actual needs.
  • the display panel 100 can be: an organic light-emitting diode (OLED) display panel, a quantum dot light-emitting diode (QLED) display panel, an active matrix organic light-emitting diode (AMOLED) display panel, a liquid crystal display (LCD) display panel or a micro light-emitting diode (MLED) display panel, etc., and the embodiments of the present disclosure do not make specific limitations here.
  • OLED organic light-emitting diode
  • QLED quantum dot light-emitting diode
  • AMOLED active matrix organic light-emitting diode
  • LCD liquid crystal display
  • MLED micro light-emitting diode
  • the housing 200 may be a box-shaped structure with an opening.
  • the display panel 100 may be disposed in the housing 200 .
  • the cover plate 300 is disposed on the display side of the display panel 100 and located at the opening of the housing 200 .
  • the longitudinal section of the housing 200 may be, for example, U-shaped.
  • the display panel 100 is disposed in the housing 200
  • the cover plate 300 is disposed at the opening of the housing 200 .
  • the display panel 100 is a flexible display panel, and the display panel 100 includes a main body 110, a bending portion 120 and a binding portion 130 connected in sequence.
  • the bending portion 120 is located on one side of the main body 110
  • the binding portion 130 is located on the side of the bending portion 120 away from the main body 110, that is, the bending portion 120 is located between the main body 110 and the binding portion 130.
  • the main body 110 may be the portion of the display panel 100 used to display images. As shown in FIG4 , the main body 110 has a display side 100A and a non-display side 100B disposed opposite each other. It should be noted that the display side 100A refers to the side of the main body 110 that displays images (the upper side of the main body 110 in FIG4 ), and the non-display side 100B refers to the side opposite the display side 100A (the lower side of the main body 110 in FIG4 ).
  • the bending portion 120 can be bent along a bending axis extending in the first direction X toward the non-display side 100B of the main body 110 of the display panel 100, causing the binding portion 130 to bend toward the non-display side 100B of the main body 110, thereby reducing the bezel of the display device 1000 (as shown in Figures 1 and 2 ).
  • the bending axis is not an actual structure in the display panel 100; it is merely a concept proposed to illustrate the bending process of the display panel 100.
  • the display device 1000 further includes a driver chip 400, which can be disposed on the binding portion 130.
  • the driver chip 400 when the display panel 100 is bent, the driver chip 400 is disposed on a side of the binding portion 130 away from the main body.
  • the driver chip 400 is configured to provide the data signals required for displaying the image to the main body 110 via the binding portion 130 and the bent portion 120, thereby controlling the display panel 100 to display images.
  • the driver chip 400 includes at least one of microchips such as a source driver chip, a touch control chip, a timing controller, and a gamma circuit, and the embodiments of the present disclosure are not specifically limited thereto.
  • the display device 1000 further includes a circuit board 600.
  • the circuit board 600 is disposed on a side of the driver chip 400 that is close to the binding portion 130, i.e., the circuit board 600 and the driver chip 400 are disposed on the same side of the binding portion 130.
  • the circuit board 600 is disposed on a side of the driver chip 400 that is away from the bending portion 120, and the circuit board 600 is disposed on the binding portion 130.
  • the circuit board 600 is connected to the driver chip 400 and the binding portion 130. In this way, the driver chip 400 can provide the display panel 100 with the data signals required for displaying images through the circuit board 600.
  • the circuit board 600 has a main body region 610 , a bending region 620 , and a binding region 630 that are sequentially connected.
  • the main body region 610, the bending region 620, and the binding region 630 are arranged along a first direction X.
  • the length of the circuit board 600 is greater than the width of the display panel 100.
  • the circuit board 600 in the bending region 620 bends toward the side of the circuit board 600 in the main body region 610 that is closer to the binding portion 130, thereby bending the circuit board 600 in the binding region 630 to the side of the circuit board 600 in the main body region 610 that is closer to the binding portion 130.
  • the length of the circuit board 600 is less than the width of the display panel 100, and the circuit board 600 does not interfere with the installation of the display panel 100 and the housing 200.
  • the circuit board 600 located in the main area 610 is connected to the driver chip 400, and the circuit board 600 located in the binding area 630 is connected to the binding part 130.
  • the driver chip 400 provides the data signal required for displaying the picture to the main body 110 through the binding part 130 and the bending part 120 to control the display panel 100 to display the image.
  • the width of the main region 610 is greater than the width of the binding region 630 and greater than the width of the bending region 620 along the second direction Y.
  • the second direction Y intersects the first direction X, for example, the second direction Y is perpendicular to the first direction X.
  • a circuit board 600 includes a plurality of conductive layers 601 stacked together.
  • the circuit board 600 includes two conductive layers 601 , three conductive layers 601 , four conductive layers 601 , five conductive layers 601 or eight conductive layers 601 that are stacked, which is not specifically limited in the embodiments of the present disclosure.
  • the conductive layer 601 may be made of metal, such as copper or silver.
  • the circuit board 600 has better conductivity and lower resistance.
  • the circuit board 600 further includes a plurality of signal lines 1, which are disposed on the multi-layer conductive layer 601.
  • the plurality of signal lines 1 include at least one of a signal line for transmitting a first power signal, a signal line for transmitting a second power signal, a signal line for transmitting a touch signal, a signal line for transmitting a communication protocol, a signal line for transmitting a data signal, a signal line for transmitting a reset signal, and a signal line for transmitting a logic signal.
  • the plurality of signal lines 1 include first-type signal lines 11 and second-type signal lines 12.
  • the first-type signal lines 11 need to carry a relatively large current.
  • the first-type signal lines 11 include at least one of signal lines that transmit a first power signal, signal lines that transmit a second power signal, and signal lines that transmit a logic signal.
  • the second type signal lines 12 need to carry a smaller current.
  • the second type signal lines 12 include at least one of signal lines transmitting touch signals, signal lines transmitting communication protocols, signal lines transmitting data signals, and signal lines transmitting reset signals.
  • the first type of signal line includes a first signal line, and the first signal line includes a first trace and a second trace.
  • the first trace is arranged in the main body area, and the second trace is arranged in the bending area, one end extends to the main body area and is connected to the first trace, and the other end extends to the binding area.
  • the first trace is arranged in a conductive layer, and the first trace needs to carry a larger current. Therefore, the line width of the first trace is wider (for example, greater than or equal to 0.8mm, for example 1mm).
  • the wider first trace causes the width of the circuit board located in the main body area to be wider along the second direction, thereby causing the circuit board to occupy a larger space in the display device.
  • a first signal line 61 includes a plurality of first traces 611 and second traces 612.
  • the first signal line 61 includes two, three, four, five, or six first traces 611.
  • the following takes the example of the first signal line 61 including two first routing lines 611 to schematically illustrate some embodiments of the present disclosure, but the implementation of the present disclosure is not limited to this, and it can also be considered that the first signal line 61 includes four or six first routing lines 611, as long as the same technical concept is applied.
  • a first trace 611 is disposed in the main body region 610 and extends along a first direction X.
  • a second trace 612 is disposed in the bending region 620 , with one end extending to the main body region 610 and connected to the first trace 611 , and the other end extending to the binding region 630 .
  • multiple first traces 611 are disposed in different conductive layers 601 , and the orthographic projections of at least two first traces 611 on the reference plane overlap, and the overlapping portions are connected at both ends. It will be understood that the first traces 611 whose orthographic projections do not overlap among the multiple first traces 611 are connected at one end away from the second trace 612 .
  • the first trace in the related art is split into multiple first traces 611, and the multiple first traces 611 are arranged in parallel.
  • the total current required to be carried by the multiple parallel-arranged first traces 611 is equal to the sum of the currents required to be carried by the first traces in the related art. That is, the current required to be carried by the first traces 611 provided in some embodiments of the present disclosure is less than the current required to be carried in the related art. Therefore, the line width of the first traces 611 provided in some embodiments of the present disclosure is less than the line width of the first trace in the related art, and the sum of the line widths of the multiple first traces 611 provided in some embodiments of the present disclosure is equal to the line width of the first trace in the related art.
  • the overlapping orthographic projections of the first traces 611 share a portion of space, which can reduce the width of the multiple first traces 611 along the second direction Y, reducing the width of the circuit board 600 located in the main body area 610 along the second direction Y, thereby reducing the space occupied by the circuit board 600, and increasing the space for other components in the display device (e.g., the battery and antenna, which are arranged opposite the circuit board 600 located in the main body area 610).
  • the display device e.g., the battery and antenna, which are arranged opposite the circuit board 600 located in the main body area 610.
  • the width of the circuit board 600 located in the main area 610 along the second direction Y is reduced by greater than or equal to 1.5 mm, for example, 1.5 mm, 1.7 mm, or 2 mm.
  • the width of the circuit board 600 in the main area 610 along the second direction Y is reduced from 14 mm to 16 mm to 11 mm to 13 mm.
  • the width of the circuit board 600 along the second direction Y is 11 mm, 12 mm, or 13 mm.
  • the battery can be made larger, thereby increasing the battery power, which is beneficial to increasing the standby time of the display device 1000.
  • the antenna can be made larger, which can increase the effective area of the antenna and help increase the antenna's transmission power or reception power.
  • the second trace 612 is arranged in a conductive layer 601.
  • the thickness of the circuit board 600 located in the bending area 620 is thinner, so that the circuit board 600 located in the bending area 620 has better flexibility.
  • the better flexibility of the circuit board 600 located in the bending area 620 can reduce the bending stress of the circuit board 600.
  • the orthographic projections of any two first traces 611 on the reference plane overlap, and the two ends of the overlapping portion are connected. In this way, the width of the multiple first traces 611 along the second direction Y can be further reduced, and the width of the circuit board 600 located in the main area 610 along the second direction Y can be reduced.
  • the first signal line 61 includes two first traces 611 and one second trace 612. Along the first direction X, the two first traces 611 are flush at both ends and connected at both ends. The orthographic projections of the two first traces 611 on the reference plane overlap.
  • the circuit board 600 further includes a plurality of binding pins 602 , which are disposed in a binding region 630 , and at least one binding pin 602 is connected to a second trace 612 extending to the binding region 630 .
  • the multi-layer conductive layer 601 includes a first conductive layer 6011 and/or a second conductive layer 6012 .
  • the first conductive layer 6011 includes a second signal line 62.
  • the signal transmitted by the second signal line 62 is different from the signal transmitted by the first signal line 61.
  • the second signal line 62 is used to transmit a touch signal or a communication protocol.
  • the line width of the second signal line 62 is less than the sum of the line widths of the multiple first traces 611, that is, the line width of the second signal line 62 is narrower. The narrower signal line does not cause the width of the circuit board 600 to be wider along the second direction Y.
  • the second signal line 62 does not need to be split, that is, the second signal line 62 is only provided in the first conductive layer 6011.
  • the first conductive layer 6011 is the conductive layer 601 that is originally provided, and is not a new conductive layer 601 provided for the purpose of providing the split first trace 611.
  • the multiple first traces 611 include a first sub-line 6111, and the first sub-line 6111 is arranged in the first conductive layer 6011, that is, the first sub-line 6111 and the second signal line 62 are made of the same material and are arranged on the same layer. In this way, the thickness of the circuit board 600 can be reduced, which is conducive to reducing the thickness of the display device 1000.
  • the multi-layer conductive layer 601 further includes a second conductive layer 6012
  • the second conductive layer 6012 is arranged on one side of the first conductive layer 6011 along the third direction Z, and the third direction Z is perpendicular to the first conductive layer 6011.
  • the second conductive layer 6012 includes a third signal line 63.
  • the signal transmitted by the third signal line 63 is different from the signal transmitted by the first signal line 61.
  • the third signal line 63 is used for grounding.
  • the line width of the third signal line 63 is smaller than the sum of the line widths of the multiple first traces 611. That is, the line width of the third signal line 63 is narrower.
  • the narrower signal line does not increase the width of the circuit board 600 along the second direction Y. Therefore, the third signal line 63 does not need to be split. That is, the third signal line 63 is only provided in the second conductive layer 6012.
  • the second conductive layer 6012 is the existing conductive layer 601, not a new conductive layer 601 provided to accommodate the split first traces 611.
  • the multiple first traces 611 include a second sub-line 6112, and the second sub-line 6112 is arranged in the second conductive layer 6012, that is, the second sub-line 6112 and the third signal line 63 are made of the same material and are arranged on the same layer. In this way, the thickness of the circuit board 600 can be further reduced, which is conducive to reducing the thickness of the display device 1000.
  • the multilayer conductive layer 601 includes a first conductive layer 6011 and a second conductive layer 6012.
  • the circuit board 600 includes two first traces 611, i.e., the plurality of first traces 611 only include a first sub-line 6111 and a second sub-line 6112.
  • the first sub-line 6111 is provided in the first conductive layer 6011
  • the second sub-line 6112 is provided in the second conductive layer 6012. In this manner, there is no need to add a new conductive layer 601, and the thickness of the circuit board 600 can be kept constant.
  • the orthographic projection of the second sub-line 6112 on the reference plane overlaps with the orthographic projection of the first sub-line 6111 on the reference plane.
  • the circuit board 600 further includes at least one insulating layer 603.
  • the at least one insulating layer 603 is disposed between the first conductive layer 6011 and the second conductive layer 6012.
  • the at least one insulating layer 603 has a connection hole 6021.
  • the second sub-line 6112 includes a set segment 6101.
  • the set segment 6101 of the second sub-line 6112 extends into the connection hole 6021 and connects to the second sub-line 6112.
  • the first conductive layer 6011 and the second conductive layer 6012 are adjacent conductive layers 601, and the circuit board 600 includes a single insulating layer 603.
  • the circuit board 600 includes a single insulating layer 603.
  • at least one conductive layer 601 is disposed between the first conductive layer 6011 and the second conductive layer 6012, and the circuit board 600 includes multiple insulating layers 603.
  • the first sub-line 6111 includes a set line segment 6101 , and the length of the set line segment 6101 is equal to the length of the shorter one of the first sub-line 6111 and the second sub-line 6112 .
  • the first sub-line 6111 includes multiple set line segments 6101, the length of the set line segment 6101 is smaller than the length of the first sub-line 6111 and smaller than the length of the second sub-line 6112, and the multiple set line segments 6101 are arranged at intervals along the first direction X.
  • the line widths of the plurality of first traces 611 are equal, so that the difference in resistance between the plurality of first traces 611 can be reduced, thereby reducing the difference in timing of signals transmitted by the plurality of first traces 611 .
  • the boundaries of the orthographic projections of at least two first traces 611 on the reference plane coincide.
  • the space shared by the first traces 611 whose orthographic projections overlap is increased, which can further reduce the width of the multiple first traces 611 along the second direction Y and reduce the width of the circuit board 600 located in the main area 610 along the second direction Y.
  • the line widths of at least two first traces 611 are unequal.
  • the line widths of any two first traces 611 are unequal.
  • the width of the first traces 611 included in each conductive layer 601 can be set according to actual conditions.
  • the second trace 612 is disposed on the same layer as a first trace 611 , that is, the second trace 612 is made of the same material as a first trace 611 and is disposed on the same layer. This can reduce the thickness of the circuit board 600 , which is beneficial to reducing the thickness of the display device 1000 .
  • the current carried by the second trace 612 is equal to the sum of the currents carried by the plurality of first traces 611 . Therefore, the line width of the second trace 612 is greater than the line width of the first trace 611 arranged on the same layer.
  • the resistivity of the multiple first traces 611 is equal, that is, the material of the multiple first traces 611 is the same, and the line width of the second trace 612 is greater than or equal to the sum of the line widths of the multiple first traces 611. In this way, the identity of the materials in the circuit board 600 can be improved and the preparation cost of the circuit board 600 can be reduced.
  • the resistivity of at least two first traces 611 is different, that is, the materials of at least two first traces 611 are different
  • the second trace 612 is connected to one of the multiple first traces 611 with a smaller resistivity
  • the line width of the second trace 612 is smaller than the sum of the line widths of the multiple first traces 611. In this way, the line width of the second trace 612 can be reduced, and the width of the circuit board 600 along the second direction Y in the bending area 620 and the binding area 630 can be reduced, thereby reducing the space occupied by the circuit board 600.
  • the multi-layer conductive layer 601 further includes a third conductive layer 6013, the third conductive layer 6013 and the conductive layer 601 where the first trace 611 is located are different conductive layers 601, and the second trace 612 is arranged in the third conductive layer 6013.
  • the third conductive layer 6013 may be disposed between two adjacent conductive layers 601 in the multilayer conductive layer 601 where the first trace 611 is located, or may be disposed on one side of the multilayer conductive layer 601 where the first trace 611 is located along the third direction Z.
  • the third direction Z is perpendicular to the conductive layer 601 .
  • the outermost conductive layers 601 in the multilayer conductive layers 601 where the plurality of first traces 611 are located are the fourth conductive layer 6014 and the fifth conductive layer 6015.
  • the third conductive layer 6013 is disposed on a side of the fourth conductive layer 6014 or the fifth conductive layer 6015 away from the other.
  • the third conductive layer 6013 is disposed on a side of the fourth conductive layer 6014 away from the fifth conductive layer 6015.
  • the third conductive layer 6013 is disposed on a side of the fifth conductive layer 6015 away from the fourth conductive layer 6014.
  • the third conductive layer 6013 is arranged on the side of the fourth conductive layer 6014 and the fifth conductive layer 6015 close to the binding part 130.
  • the bending radius of the circuit board 600 can be reduced, which is beneficial to increase the distance between the shell 200 and the circuit board 600 located in the bending area 620, and reduce the impact of the circuit board 600 on the shell 200.
  • the fourth conductive layer 6014 may be one of the first conductive layer 6011 and the second conductive layer 6012
  • the fifth conductive layer 6015 may be the other of the first conductive layer 6011 and the second conductive layer 6012 .
  • the sum of the widths of the plurality of first traces 611 is greater than or equal to 0.8 mm.
  • the sum of the widths of the plurality of first traces 611 is 0.8 mm, 1 mm, or 1.5 mm. That is, when the width of the signal line is greater than or equal to 0.8 mm, the signal line will cause the width of the circuit board 600 located in the main body area 610 along the second direction Y to be wider, thereby causing the circuit board to occupy a larger space in the display device. Therefore, it is necessary to perform the above-described configuration on the signal line, that is, to split the signal line into the plurality of first traces 611 to reduce the width of the circuit board 600 located in the main body area 610 along the second direction Y.
  • the line width of the first trace 611 is less than 0.8 mm.
  • the line width of the first trace 611 is 0.05 mm, 0.1 mm, 0.2 mm, 0.3 mm, 0.4 mm, 0.5 mm, 0.6 mm, 0.7 mm, or 0.75 mm.
  • splitting the wider signal lines into signal lines with a line width less than 0.8 mm can reduce the width of the circuit board 600 in the main area 610 along the second direction Y.

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Abstract

一种电路板及显示装置。电路板具有依次连接的主体区、弯折区和绑定区。电路板包括层叠设置的多层导电层。电路板还包括第一信号线，第一信号线包括多条第一走线和第二走线；第一走线设置于主体区，且沿第一方向延伸；第二走线设置于弯折区，且一端延伸至主体区与第一走线连接，另一端延伸至绑定区；第一方向由主体部指向弯折区；多条第一走线设置于不同的导电层，至少两条第一走线在参考面上的正投影交叠，且交叠部分的两端连接；参考面与导电层的表面平行。

Description

电路板及显示装置
本申请要求于2024年03月20日提交的、申请号为202410323723.9的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本公开涉及显示技术领域，尤其涉及一种电路板及显示装置。
背景技术
随着显示技术的发展，显示装置(比如手机、笔记本电脑或者平板电脑等)越来越多的应用于人们的生活中。其中，有机发光二极管(英文：Organic Light-Emitting Diode，简称：OLED)显示装置具有主动发光、广视角、对比度高、响应速度快、耗电低、超轻薄等优点，因此受到广泛关注。
发明内容
一方面，提供一种电路板。所述电路板具有依次连接的主体区、弯折区和绑定区。所述电路板包括层叠设置的多层导电层。所述电路板还包括第一信号线，所述第一信号线包括多条第一走线和第二走线；所述第一走线设置于所述主体区，且沿第一方向延伸；所述第二走线设置于所述弯折区，且一端延伸至所述主体区与所述第一走线连接，另一端延伸至所述绑定区；所述第一方向由所述主体区指向所述弯折区；所述多条第一走线设置于不同所述导电层，至少两条所述第一走线在参考面上的正投影交叠，且交叠部分的两端连接；所述参考面与所述导电层的表面平行。
在一些实施例中，所述多层导电层包括第一导电层和/或第二导电层。所述第一导电层包括第二信号线；所述第二信号线传递的信号与所述第一信号线传递的信号不同，所述第二信号线的线宽小于所述多条第一走线的线宽之和；所述多条第一走线包括第一子线，所述第一子线设置于所述第一导电层。所述第二导电层设置于所述第一导电层沿第三方向的一侧，所述第二导电层所述包括第三信号线，所述第三信号线的线宽小于所述多条第一走线的线宽之和；所述第三信号线传递的信号与所述第一信号线传递的信号不同；所述多条第一走线还包括第二子线，所述第二子线设置于所述第二导电层，所述第三方向与所述第一导电层垂直。
在一些实施例中，所述第二子线在所述参考面上的正投影，与所述第一子线在所述参考面上的正投影交叠；
在一些实施例中，所述电路板还包括至少一层绝缘层。所述至少一层绝缘层设置于所述第一导电层和所述第二导电层之间；所述至少一层绝缘层具有连接孔；所述第一子线包括设定线段，所述第一子线的设定线段伸入所述连接孔内与所述第二子线连接。
在一些实施例中，所述第一子线包括一个设定线段，所述设定线段的长度与所述第一子线和所述第二子线中较短的一者的长度相等。
在一些实施例中，所述第一子线包括多个设定线段，所述设定线段的长度小于所述第一子线的长度，且小于所述第二子线的长度，沿所述第一方向，所述多个设定线段间隔设置。
在一些实施例中，所述多条第一走线的线宽相等。
在一些实施例中，所述第二走线与一条所述第一走线同层设置。
在一些实施例中，所述多条第一走线的电阻率相等，所述第二走线的线宽大于或者等于所述多条第一走线的线宽之和。
在一些实施例中，至少两条第一走线的电阻率不相同，所述第二走线和所述多条第一走线中电阻率较小的一者连接，所述第二走线的线宽小于所述多条第一走线的线宽之和。
在一些实施例中，所述多层导电层还包括第三导电层。所述第三导电层与所述第一走线所在的导电层为不同的导电层；所述第二走线设置于所述第三导电层。
在一些实施例中，所述多条第一走线所在的多层导电层中最外侧的导电层为第四导电层和第五导电层；所述第三导电层设置于所述第四导电层和第五导电层中一者远离另一者的一侧。
在一些实施例中，所述多条第一走线的线宽之和为大于或者等于0.8mm。
在一些实施例中，所述第一走线的线宽小于0.8mm。
在一些实施例中，位于所述主体区的电路板沿第二方向的宽度为11mm～13mm；所述第二方向与所述第一方向交叉。
另一方面，提供一种显示装置。所述显示装置包括显示面板和如上述任一实施例所述的电路板。所述显示面板具有相对设置的显示侧和非显示侧。所述电路板设置于所述显示面板的非显示侧，且与所述显示面板连接。
附图说明
为了更清楚地说明本公开中的技术方案，下面将对本公开一些实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例的附图，对于本领域普通技术人员来讲，还可以根据这些附图获得其他的附图。此外，以下描述中的附图可以视作示意图，并非对本公开实施例所涉及的产品的实际尺寸、方法的实际流程、信号的实际时序等的限制。
图1为根据一些实施例的显示装置的一种结构图；
图2为根据一些实施例的显示装置的另一种结构图；
图3为根据一些实施例的显示装置的又一种结构图；
图4为根据一些实施例的显示面板包括主体部、弯折部和绑定部的结构图；
图5为根据一些实施例的显示装置中的电路板未弯折的结构图；
图6为根据一些实施例的显示装置中的电路板弯折的结构；
图7为根据一些实施例的电路板的一种结构图；
图8为图7中沿剖面线A-A的截面图；
图9为根据一些实施例的电路板包括第一导电层的结构图；
图10为根据一些实施例的电路板包括第二导电层的结构图；
图11为根据一些实施例的第二走线包括一个设定线段的结构图；
图12为根据一些实施例的第二走线包括多个设定线段的结构图；
图13为图7中沿剖面线B-B的截面图。
具体实施方式
下面将结合附图，对本公开一些实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开所提供的实施例，本领域普通技术人员所获得的所有其他实施例，都属于本公开保护的范围。
除非上下文另有要求，否则，在整个说明书和权利要求书中，术语“包括(comprise)”及其其他形式例如第三人称单数形式“包括(comprises)”和现在分词形式“包括(comprising)”被解释为开放、包含的意思，即为“包含，但不限于”。在说明书的描述中，术语“一个实施例(one embodiment)”、“一些实施例(some embodiments)”、“示例性实施例(exemplary embodiments)”、“示例(example)”、“特定示例(specific example)”或“一些示例(some examples)”等旨在表明与该实施例或示例相关的特定特征、结构、材料或特性包括在本公开的至少一个实施例或示例中。上述术语的示意性表示不一定是指同一实施例或示例。此外，所述的特定特征、结构、材料或特点可以以任何适当方式包括在任何一个或多个实施例或示例中。
以下，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本公开实施例的描述中，除非另有说明，“多个”的含义是两个或两个以上。
在描述一些实施例时，可能使用了“耦接”和“连接”及其衍伸的表达。例如，描述一些实施例时可能使用了术语“连接”以表明两个或两个以上部件彼此间有直接物理接触或电接触。又如，描述一些实施例时可能使用了术语“耦接”以表明两个或两个以上部件有直接物理接触或电接触。然而，术语“耦接”或“通信耦合(communicatively coupled)”也可能指两个或两个以上部件彼此间并无直接接触，但仍彼此协作或相互作用。这里所公开的实施例并不必然限制于本文内容。
“A、B和C中的至少一个”与“A、B或C中的至少一个”具有相同含义，均包括以下A、B和C的组合：仅A，仅B，仅C，A和B的组合，A和C的组合，B和C的组合，及A、B和C的组合。
“A和/或B”，包括以下三种组合：仅A，仅B，及A和B的组合。
如本文中所使用，根据上下文，术语“如果”任选地被解释为意思是“当……时”或“在……时”或“响应于确定”或“响应于检测到”。类似地，根据上下文，短语“如果确定……”或“如果检测到[所陈述的条件或事件]”任选地被解释为是指“在确定……时”或“响应于确定……”或“在检测到[所陈述的条件或事件]时”或“响应于检测到[所陈述的条件或事件]”。
本文中“适用于”或“被配置为”的使用意味着开放和包容性的语言，其不排除适用于或被配置为执行额外任务或步骤的设备。
另外，“基于”的使用意味着开放和包容性，因为“基于”一个或多个所述条件或值的过程、步骤、计算或其他动作在实践中可以基于额外条件或超出所述的值。
如本文所使用的那样，“约”、“大致”或“近似”包括所阐述的值以及处于特定值的可接受偏差范围内的平均值，其中所述可接受偏差范围如由本领域普通技术人员考虑到正在讨论的测量以及与特定量的测量相关的误差(即，测量系统的局限性)所确定。
如本文所使用的那样，“平行”、“垂直”、“相等”包括所阐述的情况以及与所阐述的情况相近似的情况，该相近似的情况的范围处于可接受偏差范围内，其中所述可接受偏差范围如由本领域普通技术人员考虑到正在讨论的测量以及与特定量的测量相关的误差(即，测量系统的局限性)所确定。例如，“平行”包括绝对平行和近似平行，其中近似平行的可接受偏差范围例如可以是5°以内偏差；“垂直”包括绝对垂直和近似垂直，其中近似垂直的可接受偏差范围例如也可以是5°以内偏差。“相等”包括绝对相等和近似相等，其中近似相等的可接受偏差范围内例如可以是相等的两者之间的差值小于或等于其中任一者的5％。
应当理解的是，当层或元件被称为在另一层或基板上时，可以是该层或元件直接在另一层或基板上，或者也可以是该层或元件与另一层或基板之间存在中间层。
本文参照作为理想化示例性附图的剖视图和/或平面图描述了示例性实施方式。在附图中，为了清楚，放大了层和区域的厚度。因此，可设想到由于例如制造技术和/或公差引起的相对于附图的形状的变动。因此，示例性实施方式不应解释为局限于本文示出的区域的形状，而是包括因例如制造而引起的形状偏差。例如，示为矩形的蚀刻区域通常将具有弯曲的特征。因此，附图中所示的区域本质上是示意性的，且它们的形状并非旨在示出设备的区域的实际形状，并且并非旨在限制示例性实施方式的范围。
如图1所示，本公开的一些实施例提供一种显示装置1000，该显示装置1000可以是显示不论运动(例如，视频)还是固定(例如，静止图像)的且不论文字的还是图像的任何装置。
示例性地，该显示装置1000可以为电视机、笔记本电脑、平板电脑、手机、个人数字助理(英文：Personal Digital Assistant，简称：PDA)、导航仪、可穿戴设备、增强现实(英文：Augmented Reality，简称：AR)设备、虚拟现实(英文：Virtual Reality，简称：VR)设备、车载显示器、飞行显示器等任何具有显示功能的产品或者部件。
在一些示例中，如图1所示，该显示装置1000可以为便携式显示产品。比如，该显示装置1000可以为图1所示的手机。
在又一些示例中，如图2所示，该显示装置1000可以为可穿戴设备。比如，该显示装置1000可以为图2所示的手表。
下面以显示装置为手机为例，对本公开的一些实施例进行示意性说明，但是本公开的实施方式不限于此，并且也可以考虑显示装置为手表，只要应用相同的技术思想即可。
在一些实施例中，如图3所示，显示装置1000包括显示面板100、壳体200和盖板300。
其中，显示面板100具有相对的显示侧100A和非显示侧100B，显示侧100A是指显示面板100能够出光的一侧(图3中显示面板100的上侧)，非显示侧100B是指与显示侧100A相对的另一侧(图3中显示面板100的下侧)。
上述显示面板100的类型包括多种，可以根据实际需要选择设置。
示例性地，上述显示面板100可以为：有机电致发光二极管(英文：Organic Light-Emitting Diode，简称：OLED)显示面板、量子点电致发光二极管(英文：Quantum Dot Light Emitting Diodes，简称：QLED)显示面板、有源矩阵有机发光二极管(英文：Active Matrix Organic Light Emitting Diode，简称：AMOLED)显示面板、液晶(英文：Liquid Crystal Display，简称：LCD)显示面板或微型发光(英文：Mini/Micro Light Emitting Display，简称：MLED)显示面板等，本公开实施例在此不做具体限定。
如图3所示，壳体200可以为具有开口的盒状结构，显示面板100可以设置于壳体200内，盖板300设置于显示面板100的显示侧，且位于壳体200的开口处。
如图3所示，壳体200的纵截面例如可以呈U型，显示面板100设置于壳体200内，盖板300设置于壳体200的开口处。
在一些实施例中，如图4所示，显示面板100为柔性显示面板，显示面板100包括依次相连的主体部110、弯折部120以及绑定部130，沿第二方向Y，弯折部120位于主体部110的一侧，绑定部130位于弯折部120远离主体部110的一侧，即弯折部120位于主体部110和绑定部130之间。
主体部110可以为显示面板100用于显示图像的部分。如图4所示，主体部110具有相对设置的显示侧100A和非显示侧100B。需要说明的是，显示侧100A指的是主体部110显示图像的一侧(图4中主体部110的上侧)，非显示侧100B是指与显示侧100A相对的另一侧(图4中主体部110的下侧)。
通过弯折工艺，如图5和图6所示，弯折部120可沿第一方向X延伸的弯折轴朝向显示面板100的主体部110的非显示侧100B弯曲，使绑定部130弯折至主体部110的非显示侧100B，从而缩减显示装置1000(如图1和图2所示)的边框。其中，弯折轴并不是显示面板100中存在的实际结构，只是为了说明显示面板100的弯折过程提出的概念。
在此基础上，如图4、图5和图6所示，显示装置1000还包括驱动芯片400，驱动芯片400可以设置于绑定部130上。如图5和图6所示，在显示面板100弯折的状态，驱动芯片400设置于绑定部130远离主体部的一侧，驱动芯片400被配置为通过绑定部130、弯折部120向主体部110提供显示画面所需的数据信号，以控制显示面板100进行图像显示。
其中，驱动芯片400包括源极驱动芯片、触控芯片、时序控制器和伽马电路等微型芯片中的至少一种，本公开的实施例在此不做具体限定。
在一些实施例中，如图4、图5和图6所示，显示装置1000还包括电路板600，沿第三方向Z，电路板600设置于驱动芯片400靠近绑定部130的一侧，即电路板600和驱动芯片400设置于绑定部130的同侧，沿第二方向Y，电路板600设置于驱动芯片400远离弯折部120的一侧，电路板600设置于绑定部130上。电路板600与驱动芯片400和绑定部130连接，这样的话，驱动芯片400可以通过电路板600向显示面板100提供显示画面所需的数据信号。
在一些示例中，如图5所示，电路板600具有依次连接的主体区610、弯折区620和绑定区630。
在展平状态下，主体区610、弯折区620和绑定区630沿第一方向X排列。沿第一方向X，电路板600的长度大于显示面板100的宽度。如图6所示，在弯折状态下，位于弯折区620的电路板600朝向位于主体区610的电路板600靠近绑定部130的一侧弯曲，以使位于绑定区630的电路板600弯折至主体区610的电路板600靠近绑定部130的一侧。这样，沿第一方向X，电路板600的长度小于显示面板100的宽度，电路板600不会影响显示面板100和壳体200的安装。
如图6所示，位于主体区610的电路板600与驱动芯片400连接，位于绑定区630的电路板600与绑定部130连接，这样的话，驱动芯片400通过绑定部130、弯折部120向主体部110提供显示画面所需的数据信号，以控制显示面板100进行图像显示。
在一些示例中，如图5所示，沿第二方向Y，主体区610的宽度大于绑定区630的宽度，且大于弯折区620沿第二方向Y的宽度。其中，第二方向Y与第一方向X交叉，例如，第二方向Y与第一方向X垂直。
在一些实施例中，如图7所示，电路板600包括层叠设置的多层导电层601。
示例性地，电路板600包括层叠设置的两层导电层601、三层导电层601、四层导电层601、五层导电层601或者八层导电层601，本公开的实施例对此不做具体限定。
示例性地，导电层601的材料可以包括金属。例如，导电层601的材料包括铜或银，这样的话，电路板600的导电性较好，电阻较低。
电路板600还包括多条信号线1，多条信号线1设置于多层导电层601。例如，多条信号线1包括传递第一电源信号的信号线、传递第二电源信号的信号线、传递触控信号的信号线、传递通信协议的信号线、传递数据信号的信号线、传递复位信号的信号线和传递逻辑信号的信号线中的至少一者。
如图7所示，多条信号线1包括第一类信号线11和第二类信号线12。第一类信号线11需要承载较大的电流。例如，第一类信号线11包括传递第一电源信号的信号线、传递第二电源信号的信号线和传递逻辑信号的信号线中的至少一者。
第二类信号线12需要承载较小的电流。例如，第二类信号线12包括传递触控信号的信号线、传递通信协议的信号线、传递数据信号和传递复位信号的信号线中的至少一者。
相关技术中，第一类信号线包括第一信号线，第一信号线包括第一走线和第二走线。第一走线设置于主体区，第二走线设置于弯折区，一端延伸至主体区和第一走线连接，另一端延伸至绑定区。其中，第一走线设置于一层导电层，第一走线需要承载较大的电流，因此，第一走线的线宽较宽(例如，大于或者等于0.8mm，示例1mm)。较宽的第一走线导致位于主体区的电路板沿第二方向的宽度较宽，从而导致电路板在显示装置中占用的空间较大。
为了解决上述技术问题，本公开的一些实施例提供一种电路板600。如图7所示，第一信号线61包括多条第一走线611和第二走线612。示例性地，第一信号线61包括两条、三条、四条、五条或者六条第一走线611。
下面以第一信号线61包括两条第一走线611为例，对本公开的一些实施例进行示意性说明，但是本公开的实施方式不限于此，并且也可以考虑第一信号线61包括四条或者六条第一走线611，只要应用相同的技术思想即可。
如图7所示，第一走线611设置于主体区610，且沿第一方向X延伸。第二走线612设置于弯折区620，且一端延伸至主体区610与第一走线611连接，另一端延伸至绑定区630。如图8所示，多条第一走线611设置于不同的导电层601，且至少两条第一走线611在参考面上的正投影交叠，且交叠的部分两端连接。可以理解的是，多条第一走线611中正投影未交叠的第一走线611远离第二走线612的一端连接。
也就是说，将相关技术中的第一走线拆分为多条第一走线611，且多条第一走线611并联设置，并联设置的多条第一走线611需要承载的总电流与相关技术中第一走线需要承载的电流之和相等，即本公开的一些实施例提供的第一走线611需要承载的电流小于相关技术中需要承载的电流，因此，本公开的一些实施例提供的第一走线611的线宽小于相关技术中第一走线的线宽，且本公开的一些实施例提供的多条第一走线611的线宽之和等于相关技术中第一走线的线宽。沿第二方向Y，正投影交叠的第一走线611共用一部分空间，可以减小多条第一走线611沿第二方向Y的宽度，减小位于主体区610的电路板600沿第二方向Y的宽度，进而能减少电路板600占用的空间，可以增大显示装置中其他器件(例如，电池和天线，电池和天线与位于主体区610的电路板600相对设置)。
经实验可知，相较于相关技术中的电路板，在本公开的一些实施例中，位于主体区610的电路板600沿第二方向Y的宽度的缩减量大于或者等于1.5mm。例如，1.5mm、1.7mm或者2mm。
在一些示例中，位于主体区610的电路板600沿第二方向Y的宽度由14mm～16mm缩减至11mm～13mm。
例如，电路板600沿第二方向Y的宽度为11mm、12mm或者13mm。
示例性地，增大电池占用的空间，这样的话，电池可以做的较大，从而可以提高电池的电量，有利于提高显示装置1000的待机时间。或者，示例性地，增大天线占用的空间，这样的话，天线可以做的较大，可以提高天线的有效面积，有利于提高天线的发射功率或者接收功率。
如图8所示，第二走线612设置于一层导电层601中，这样的话，位于弯折区620的电路板600的厚度较薄，从而使得位于弯折区620的电路板600的柔性较好，当弯折电路板600时，位于弯折区620的电路板600的柔性较好可以降低电路板600的弯折应力。
在一些实施例中，任意两条第一走线611在参考面上的正投影交叠，且交叠部分的两端连接，这样的话，可以进一步减小多条第一走线611沿第二方向Y的宽度，减小位于主体区610的电路板600沿第二方向Y的宽度。
在一些实施例中，如图7和图8所示，第一信号线61包括两条第一走线611和一条第二走线612。沿第一方向X，两条第一走线611的两端齐平，且两条第一走线611的两端连接。两条第一走线611在参考面上的正投影交叠。
在一些实施例中，如图7所示，电路板600还包括多个绑定引脚602，多个绑定引脚602设置于绑定区630，至少一个绑定引脚602和延伸至绑定区630的第二走线612连接。
在一些实施例中，如图7和图8所示，多层导电层601包括第一导电层6011和/或第二导电层6012。
如图7、图8和图9所示，在多层导电层601包括第一导电层6011的情况下，第一导电层6011包括第二信号线62。第二信号线62传递的信号与第一信号线61传递的信号不同，例如，第二信号线62用于传递触控信号或者通信协议。第二信号线62的线宽小于多条第一走线611的线宽之和，即第二信号线62的线宽较窄，较窄的信号线不会导致电路板600沿第二方向Y的宽度较宽，因此，不需要对第二信号线62进行拆分，即第二信号线62仅设置于第一导电层6011。也可以说，第一导电层6011是原本就设置的导电层601，不是为了设置拆分之后的第一走线611而新设置的导电层601。
如图7、图8和图9所示，多条第一走线611包括第一子线6111，第一子线6111设置于第一导电层6011，即第一子线6111和第二信号线62材料相同且同层设置，这样的话，可以减小电路板600的厚度，有利于减小显示装置1000的厚度。
如图7、图8和图10所示，在多层导电层601还包括第二导电层6012的情况下，第二导电层6012设置于第一导电层6011沿第三方向Z的一侧，第三方向Z和第一导电层6011垂直。
其中，第二导电层6012包括第三信号线63。第三信号线63传递的信号与第一信号线61传递的信号不同，例如，第三信号线63用于接地。第三信号线63的线宽小于多条第一走线611的线宽之和，即第三信号线63的线宽较窄，较窄的信号线不会导致电路板600沿第二方向Y的宽度较宽，因此，不需要对第三信号线63进行拆分，即第三信号线63仅设置于第二导电层6012。也可以说，第二导电层6012是原本就存在的导电层601，不是为了设置拆分之后的第一走线611而新设置的导电层601。
如图7、图8和图10所示，多条第一走线611包括第二子线6112，第二子线6112设置于第二导电层6012，即第二子线6112和第三信号线63材料相同且同层设置，这样的话，可以进一步减小电路板600的厚度，有利于减小显示装置1000的厚度。
在一些示例中，如图8所示，多层导电层601包括第一导电层6011和第二导电层6012。电路板600包括两条第一走线611，即多条第一走线611仅包括第一子线6111和第二子线6112。第一子线6111设置于第一导电层6011，第二子线6112设置于第二导电层6012，这样的话，不需要增加新的导电层601，即可以使电路板600的厚度保持不变。
在一些实施例中，如图11和图12所示，第二子线6112在参考面上的正投影，与第一子线6111在参考面上的正投影交叠。电路板600还包括至少一层绝缘层603。至少一层绝缘层603设置于第一导电层6011和第二导电层6012之间，至少一层绝缘层603具有连接孔6021，第二子线6112包括设定线段6101，第二子线6112的设定线段6101伸入连接孔6021内与第二子线6112连接，这样的话，一方面，可以使第一子线6111和第二子线6112电连接的更牢固，另一方面，可以减小第一子线6111和第二子线6112的总电阻，从而可以减小多条第一走线611的总电阻。
示例性地，第一导电层6011和第二导电层6012为相邻的导电层601，电路板600包括一层绝缘层603。或者，示例性地，至少一层导电层601设置于第一导电层6011和第二导电层6012之间，电路板600包括多层绝缘层603。
在一些示例中，如图11所示，第一子线6111包括一个设定线段6101，设定线段6101的长度与第一子线6111和第二子线6112中较短的一者的长度相等。
在另一些示例中，如图12所示，第一子线6111包括多个设定线段6101，设定线段6101的长度小于第一子线6111的长度，且小于第二子线6112的长度，沿第一方向X，多个设定线段6101间隔设置。
在一些实施例中，多条第一走线611的线宽相等，这样的话，可以减小多条第一走线611的电阻之间的差异，从而减小多条第一走线611传输的信号时序之间的差异。
在此基础上，沿第二方向Y，至少两条第一走线611在参考面上的正投影的边界重合，这样的话，正投影交叠的第一走线611共用的空间增大，可以进一步减小多条第一走线611沿第二方向Y的宽度，减小位于主体区610的电路板600沿第二方向Y的宽度。
在另一些实施例中，至少两条第一走线611的线宽不相等。示例性地，任意两条第一走线611的线宽不相等。每层导电层601包括的第一走线611可以根据实际情况设置其宽度。
在一些实施例中，如图13所示，第二走线612与一条第一走线611同层设置，即第二走线612与一条第一走线611材料相同且同层设置，这样的话，可以减小电路板600的厚度，有利于减小显示装置1000的厚度。
可以理解的是，第二走线612的承载的电流，与多条第一走线611承载的电路之和相等，因此，第二走线612的线宽大于与其同层设置的第一走线611的线宽。
在一些示例中，多条第一走线611的电阻率相等，即多条第一走线611的材料相同，第二走线612的线宽大于或者等于多条第一走线611的线宽之和，这样的话，可以提高电路板600中材料的同一性，降低电路板600的制备成本。
在另一些示例中，至少两条第一走线611的电阻率不相同，即至少两条第一走线611的材料不同，第二走线612和多条第一走线611中电阻率较小的一者连接，第二走线612的线宽小于多条第一走线611的线宽之和，这样的话，可以减小第二走线612的线宽，减小位于弯折区620和绑定区630的电路板600沿第二方向Y的宽度，进而能减少电路板600占用的空间。
在另一些实施例中，如图11和图12所示，多层导电层601还包括第三导电层6013，第三导电层6013与第一走线611所在的导电层601为不同的导电层601，第二走线612设置于第三导电层6013。
第三导电层6013可以设置于第一走线611所在的多层导电层601中相邻两层导电层601之间，还可以设置于第一走线611所在的多层导电层601沿第三方向Z的一侧。第三方向Z和导电层601垂直。
在一些示例中，如图8所示，多条第一走线611所在的多层导电层601中最外侧的导电层601为第四导电层6014和第五导电层6015。第三导电层6013设置于第四导电层6014和第五导电层6015中一者远离另一者的一侧。
示例性地，第三导电层6013设置于第四导电层6014远离第五导电层6015的一侧。或者，示例性地，第三导电层6013设置于第五导电层6015远离第四导电层6014的一侧。
在此基础上，第三导电层6013设置于第四导电层6014和第五导电层6015靠近绑定部130的一则，这样的话，可以减小电路板600的弯折半径，有利于增大壳体200和位于弯折区620的电路板600之间的距离，减小电路板600对壳体200的影响。
如图8所示，在电路板600包括两条第一走线611的情况下，第四导电层6014可以为第一导电层6011和第二导电层6012中的一者，第五导电层6015可以为第一导电层6011和第二导电层6012中的另一者。
在一些实施例中，多条第一走线611的线宽之和为大于或者等于0.8mm。示例性地，多条第一走线611的线宽之和为0.8mm、1mm或者1.5mm。也就是说，在信号线的线宽大于或者等于0.8mm的情况下，该信号线会导致位于主体区610的电路板600沿第二方向Y的宽度较宽，从而导致电路板在显示装置中占用的空间较大。因此，需要对该信号线进行上述设置，即，将该信号线拆分为多条第一走线611，以减小位于主体区610的电路板600沿第二方向Y的宽度。
在一些实施例中，第一走线611的线宽小于0.8mm。示例性地，第一走线611的线宽为0.05mm、0.1mm、0.2mm、0.3mm、0.4mm、0.5mm、0.6mm、0.7mm或者0.75mm。
也就是说，将较宽的信号线拆分为线宽小于0.8mm的信号线可以减小位于主体区610的电路板600沿第二方向Y的宽度。
在本说明书的描述中，具体特征、结构、材料或者特点可以在任何的一个或多个实施例或示例中以合适的方式结合。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，想到变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以所述权利要求的保护范围为准。

Claims (15)

  1. 一种电路板，具有依次连接的主体区、弯折区和绑定区；所述电路板包括层叠设置的多层导电层；
    所述电路板还包括第一信号线，所述第一信号线包括多条第一走线和第二走线；所述第一走线设置于所述主体区，且沿第一方向延伸；所述第二走线设置于所述弯折区，且一端延伸至所述主体区与所述第一走线连接，另一端延伸至所述绑定区；所述第一方向由所述主体区指向所述弯折区；
    所述多条第一走线设置于不同所述导电层，至少两条所述第一走线在参考面上的正投影交叠，且交叠部分的两端连接；所述参考面与所述导电层的表面平行。
  2. 根据权利要求1所述的电路板，其中，所述多层导电层包括：
    第一导电层，包括第二信号线；所述第二信号线传递的信号与所述第一信号线传递的信号不同，所述第二信号线的线宽小于所述多条第一走线的线宽之和；所述多条第一走线包括第一子线，所述第一子线设置于所述第一导电层；和/或，
    第二导电层，设置于所述第一导电层沿第三方向的一侧，所述第二导电层包括第三信号线，所述第三信号线的线宽小于所述多条第一走线的线宽之和；所述第三信号线传递的信号与所述第一信号线传递的信号不同；所述多条第一走线还包括第二子线，所述第二子线设置于所述第二导电层；所述第三方向与所述第一导电层垂直。
  3. 根据权利要求2所述的电路板，其中，所述第二子线在所述参考面上的正投影，与所述第一子线在所述参考面上的正投影交叠；
    所述电路板还包括：
    至少一层绝缘层，设置于所述第一导电层和所述第二导电层之间；所述至少一层绝缘层具有连接孔；所述第一子线包括设定线段，所述第一子线的设定线段伸入所述连接孔内与所述第二子线连接。
  4. 根据权利要求3所述的电路板，其中，所述第一子线包括一个设定线段，所述设定线段的长度与所述第一子线和所述第二子线中较短的一者的长度相等。
  5. 根据权利要求3所述的电路板，其中，所述第一子线包括多个设定线段，所述设定线段的长度小于所述第一子线的长度，且小于所述第二子线的长度，沿所述第一方向，所述多个设定线段间隔设置。
  6. 根据权利要求1～5中任一项所述的电路板，其中，所述多条第一走线的线宽相等。
  7. 根据权利要求1～5中任一项所述的电路板，其中，所述第二走线与一条所述第一走线同层设置。
  8. 根据权利要求7所述电路板，其中，所述多条第一走线的电阻率相等，所述第二走线的线宽大于或者等于所述多条第一走线的线宽之和。
  9. 根据权利要求7所述的电路板，其中，至少两条第一走线的电阻率不相同，所述第二走线和所述多条第一走线中电阻率较小的一者连接，所述第二走线的线宽小于所述多条第一走线的线宽之和。
  10. 根据权利要求1～5中任一项所述的电路板，其中，所述多层导电层还包括：
    第三导电层，与所述第一走线所在的导电层为不同的导电层；所述第二走线设置于所述第三导电层。
  11. 根据权利要求10所述的电路板，其中，所述多条第一走线所在的多层导电层中最外侧的导电层为第四导电层和第五导电层；所述第三导电层设置于所述第四导电层和第五导电层中一者远离另一者的一侧。
  12. 根据权利要求1～5中任一项所述的电路板，其中，所述多条第一走线的线宽之和为大于或者等于0.8mm。
  13. 根据权利要求1～5中任一项所述的电路板，其中，所述第一走线的线宽小于0.8mm。
  14. 根据权利要求1～5中任一项所述的电路板，其中，位于所述主体区的电路板沿第二方向的宽度为11mm～13mm；所述第二方向与所述第一方向交叉。
  15. 一种显示装置，包括：
    显示面板；具有相对设置的显示侧和非显示侧；
    如权利要求1～14中任一项所述的电路板，设置于所述显示面板的非显示侧，且与所述显示面板连接。
PCT/CN2025/077151 2024-03-20 2025-02-13 电路板及显示装置 Pending WO2025195063A1 (zh)

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WO2022087986A1 (zh) * 2020-10-29 2022-05-05 京东方科技集团股份有限公司 柔性电路板和显示装置
CN216982208U (zh) * 2022-01-30 2022-07-15 京东方科技集团股份有限公司 柔性电路板及显示装置
US20220236830A1 (en) * 2021-01-25 2022-07-28 Samsung Display Co., Ltd. Circuit board and a display device having the same
CN217386604U (zh) * 2022-03-15 2022-09-06 京东方科技集团股份有限公司 显示模组及显示装置
CN118250886A (zh) * 2024-03-20 2024-06-25 京东方科技集团股份有限公司 电路板及显示装置

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US20220236830A1 (en) * 2021-01-25 2022-07-28 Samsung Display Co., Ltd. Circuit board and a display device having the same
CN216982208U (zh) * 2022-01-30 2022-07-15 京东方科技集团股份有限公司 柔性电路板及显示装置
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CN118250886A (zh) * 2024-03-20 2024-06-25 京东方科技集团股份有限公司 电路板及显示装置

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