WO2025052831A1 - 半導体装置および半導体モジュール - Google Patents

半導体装置および半導体モジュール Download PDF

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Publication number
WO2025052831A1
WO2025052831A1 PCT/JP2024/027772 JP2024027772W WO2025052831A1 WO 2025052831 A1 WO2025052831 A1 WO 2025052831A1 JP 2024027772 W JP2024027772 W JP 2024027772W WO 2025052831 A1 WO2025052831 A1 WO 2025052831A1
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Prior art keywords
current detection
built
resistor
semiconductor substrate
region
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Pending
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PCT/JP2024/027772
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English (en)
French (fr)
Japanese (ja)
Inventor
和貴 上村
達也 内藤
雅浩 佐々木
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Fuji Electric Co Ltd
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Fuji Electric Co Ltd
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Priority to JP2025544186A priority Critical patent/JPWO2025052831A1/ja
Priority to DE112024000485.7T priority patent/DE112024000485T5/de
Publication of WO2025052831A1 publication Critical patent/WO2025052831A1/ja
Priority to US19/308,287 priority patent/US20250393229A1/en
Anticipated expiration legal-status Critical
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411—Insulated-gate bipolar transistors [IGBT]
    • H10D12/441—Vertical IGBTs
    • H10D12/461—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
    • H10D12/481—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/101—Integrated devices comprising main components and built-in components, e.g. IGBT having built-in freewheel diode
    • H10D84/161—IGBT having built-in components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/811—Combinations of field-effect devices and one or more diodes, capacitors or resistors
    • H10D84/817—Combinations of field-effect devices and resistors only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/921—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs characterised by the configuration of the interconnections connecting the protective arrangements, e.g. ESD buses
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/498—Resistive arrangements or effects of, or between, wiring layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/40—Resistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01—Manufacture or treatment
    • H10D12/031—Manufacture or treatment of IGBTs
    • H10D12/032—Manufacture or treatment of IGBTs of vertical IGBTs
    • H10D12/038—Manufacture or treatment of IGBTs of vertical IGBTs having a recessed gate, e.g. trench-gate IGBTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H10D62/126—Top-view geometrical layouts of the regions or the junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/80—Arrangements for protection of devices protecting against overcurrent or overload, e.g. fuses or shunts

Definitions

  • the present invention relates to a semiconductor device and a semiconductor module.
  • Patent Documents 1 to 3 Japanese Patent Application Publication No. 4-335560
  • Patent Document 2 Japanese Patent Application Publication No. 5-3289
  • Patent Document 3 Japanese Patent No. 3644697
  • a semiconductor device including a semiconductor substrate may include a transistor portion provided inside the semiconductor substrate and having a gate conductive portion. Any of the semiconductor devices may include a current detection portion provided inside the semiconductor substrate, through which a detection current corresponding to a main current of the transistor portion flows. Any of the semiconductor devices may include a current detection pad disposed above the semiconductor substrate and arranged side by side with the current detection portion in a first direction. Any of the semiconductor devices may include a built-in resistor portion provided above the semiconductor substrate and connecting the current detection portion and the current detection pad. Any of the semiconductor devices may include a gate wiring disposed above the semiconductor substrate and connected to the gate conductive portion. The built-in resistor portion and the gate wiring of any of the semiconductor devices may be arranged side by side in the first direction between the current detection portion and the current detection pad.
  • the built-in resistor and the gate wiring may be formed from polysilicon.
  • the built-in resistor portion and the gate wiring may have the same thickness.
  • the built-in resistor portion may have a longitudinal direction in a second direction different from the first direction when viewed from above.
  • any of the above semiconductor devices may include a first connection portion that contacts the built-in resistor portion and electrically connects the built-in resistor portion and the current detection portion.
  • Any of the above semiconductor devices may include a second connection portion that contacts the built-in resistor portion and electrically connects the built-in resistor portion and the current detection pad. Any of the above semiconductor devices may be arranged such that the first connection portion and the second connection portion are located at different positions in the second direction.
  • the first connection portion may be disposed in the first region of a first region and a second region that divide the built-in resistor portion equally in the second direction.
  • the second connection portion may be disposed in the second region.
  • the gate wiring may have a longitudinal direction in the second direction.
  • the gate wiring may be disposed between the built-in resistor and the current detection section.
  • the gate wiring may be disposed between the built-in resistor portion and the current detection pad.
  • the gate wiring may be provided in a plurality of lines in the first direction between the current detection unit and the current detection pad.
  • the built-in resistor may be sandwiched between two of the gate wirings between the current detection unit and the current detection pad.
  • the current detection pad does not need to be in contact with the semiconductor substrate.
  • the transistor section may have a drift region of a first conductivity type provided inside the semiconductor substrate.
  • the transistor section may have an emitter region of a first conductivity type that is disposed above the drift region inside the semiconductor substrate and has a higher concentration than the drift region.
  • the transistor section may have a base region of a second conductivity type that is disposed between the drift region and the emitter region inside the semiconductor substrate.
  • Any of the above semiconductor devices may include a pad well region of a second conductivity type that is provided inside the semiconductor substrate and is provided from the upper surface of the semiconductor substrate to a depth deeper than the base region. In any of the above semiconductor devices, the pad well region may overlap the entire current detection pad in a top view.
  • the transistor section may have a drift region of a first conductivity type provided inside the semiconductor substrate.
  • the transistor section may have an emitter region of a first conductivity type that is disposed above the drift region inside the semiconductor substrate and has a higher concentration than the drift region.
  • the transistor section may have a base region of a second conductivity type that is disposed between the drift region and the emitter region inside the semiconductor substrate.
  • Any of the above semiconductor devices may include a well region of a second conductivity type that is provided inside the semiconductor substrate and is provided from the upper surface of the semiconductor substrate to a depth deeper than the base region. In any of the above semiconductor devices, the well region may overlap the entire built-in resistor section when viewed from above.
  • a semiconductor module in a second aspect of the present invention, includes a semiconductor device having a semiconductor substrate and an external resistor connected to the semiconductor device.
  • the semiconductor device may have a transistor portion provided inside the semiconductor substrate and having a gate conductive portion.
  • the semiconductor device may have a current detection portion provided inside the semiconductor substrate and through which a detection current corresponding to a main current of the transistor portion flows.
  • the semiconductor device may have a current detection pad disposed above the semiconductor substrate.
  • the semiconductor device may have a built-in resistor provided above the semiconductor substrate and connecting the current detection portion and the current detection pad.
  • the external resistor may be connected in series with the built-in resistor and the current detection pad.
  • the resistance value of the built-in resistor may be greater than the resistance value of the external resistor.
  • the resistance value of the built-in resistor may be 3 times or more and 10 times or less than the resistance value of the external resistor.
  • the resistance value of the built-in resistor may be 6 ⁇ or more.
  • the resistance value of the built-in resistor may be 20 ⁇ or less.
  • the resistance value ( ⁇ ) of the built-in resistor may be Ir/50 or more, where Ir (A) is the rated current of the semiconductor device.
  • the resistance value of the built-in resistor may be Ir/15 or less.
  • FIG. 2 is a diagram showing an equivalent circuit of a semiconductor module 200 according to an embodiment of the present invention.
  • 13 is a diagram showing the relationship between the resistance value Rs [ ⁇ ] of a resistor connected to the emitter of the current detection unit 26 and the short-circuit withstand capability of the current detection unit 26.
  • FIG. 1 is a top view illustrating an example of a semiconductor device 100 according to an embodiment of the present invention.
  • FIG. 4 is an enlarged view of a region P in FIG. 3 .
  • FIG. 5 is a diagram showing an example of a cross section taken along line AA' in FIG. 4.
  • FIG. 5 is a diagram showing an example of a cross section taken along the line BB' in FIG. 4.
  • FIG. 4 is a diagram showing an example of a P region according to the first embodiment
  • FIG. 8 is a diagram showing an example of a cross section taken along the line AA′ of FIG. 7.
  • FIG. 11 is a diagram showing an example of a P region according to a second embodiment
  • 2 is an enlarged view of the built-in resistor portion 210.
  • FIG. 10 is a diagram showing an example of a cross section taken along the line AA′ of FIG. 9.
  • FIG. 10 is a diagram showing an example of a cross section taken along the line CC' of FIG.
  • FIG. 13 is a diagram showing an example of a P region according to a third embodiment;
  • FIG. 14 is a diagram showing an example of a cross section taken along the line AA′ of FIG. 13.
  • FIG. 14 is a diagram showing an example of a cross section taken along the line AA′ of FIG. 13.
  • FIG. 14 is a diagram showing an example of a cross section taken along the line CC' of FIG. 13.
  • FIG. 13 is a diagram showing an example of a P region according to a fourth embodiment;
  • FIG. 17 is a diagram showing an example of a cross section taken along the line AA′ of FIG. 16.
  • FIG. 17 is a diagram showing an example of a cross section taken along the line CC' in FIG. 16.
  • one side in a direction parallel to the depth direction of the semiconductor substrate is referred to as "upper” and the other side as “lower.”
  • the upper surface is referred to as the upper surface and the other surface is referred to as the lower surface.
  • the directions of "upper” and “lower” are not limited to the direction of gravity or the directions when the semiconductor device is mounted.
  • the orthogonal coordinate system merely specifies the relative positions of components, and does not limit a specific direction.
  • the Z-axis direction does not limit the height direction relative to the ground.
  • the +Z-axis direction and the -Z-axis direction are opposite directions.
  • the Z-axis direction is written without indicating positive or negative, it means the direction parallel to the +Z-axis and -Z-axis.
  • the orthogonal axes parallel to the top and bottom surfaces of the semiconductor substrate are referred to as the X-axis and Y-axis.
  • the axis perpendicular to the top and bottom surfaces of the semiconductor substrate is referred to as the Z-axis.
  • the direction of the Z-axis may be referred to as the depth direction.
  • the direction parallel to the top and bottom surfaces of the semiconductor substrate, including the X-axis and Y-axis may be referred to as the horizontal direction.
  • the conductivity type of a doped region doped with an impurity is described as P type or N type.
  • impurities may particularly mean either an N type donor or a P type acceptor, and may be described as a dopant.
  • doping means introducing a donor or acceptor into a semiconductor substrate to make it a semiconductor that exhibits an N type conductivity type or a P type conductivity type.
  • the doping concentration of an N type region may be referred to as a donor concentration
  • the doping concentration of a P type region may be referred to as an acceptor concentration.
  • FIG. 1 is a diagram showing an equivalent circuit of a semiconductor module 200 according to one embodiment of the present invention.
  • the semiconductor module 200 includes a semiconductor device 100, a gate drive circuit 201, and an external resistor section 206.
  • the semiconductor module 200 may include a housing that houses the semiconductor device 100, the gate drive circuit 201, and the external resistor section 206.
  • the housing may include an insulating material such as resin or ceramic.
  • the semiconductor module 200 may include a plurality of semiconductor devices 100.
  • the semiconductor device 100 is a semiconductor chip including a power semiconductor such as an IGBT (Insulated Gate Bipolar Transistor).
  • the semiconductor device 100 of this example has a transistor section 70 and a current detection section 26.
  • the transistor section 70 and the current detection section 26 are provided on the same semiconductor substrate.
  • the current detection section 26 has a similar structure to the transistor section 70.
  • the current detection section 26 and the transistor section 70 of this example each include a vertical IGBT.
  • the transistor section 70 and the current detection section 26 are provided electrically in parallel, and the current detection section 26 has a smaller area than the transistor section 70 on the upper surface of the semiconductor substrate.
  • the total channel width of each of the transistor section 70 and the current detection section 26 is roughly proportional to their respective areas. Therefore, a current flows through the transistor section 70 and the current detection section 26 according to their respective areas.
  • the collector electrode of the transistor section 70 and the collector electrode of the current detection section 26 are connected to each other and to a common collector terminal (C).
  • the collector terminal (C) is a terminal provided on the semiconductor module 200 and is connected to an external circuit.
  • the gate electrode of the transistor section 70 and the gate electrode of the current detection section 26 are connected to a common gate drive circuit 201.
  • the gate drive circuit 201 inputs a common gate signal to the transistor section 70 and the current detection section 26 to operate the transistor section 70 and the current detection section 26 in synchronization.
  • the gate drive circuit 201 is connected to an external circuit via a gate terminal (G) provided on the semiconductor module 200.
  • the semiconductor device 100 includes an emitter electrode 52 and a current detection pad 114.
  • the emitter electrode 52 is connected to the emitter of the transistor section 70.
  • the emitter electrode 52 is connected to the emitter terminal (E) of the semiconductor module 200 via wiring such as a wire.
  • the current detection pad 114 is connected to the emitter of the current detection unit 26.
  • the current detection pad 114 is separate from the emitter electrode 52 on the semiconductor substrate of the semiconductor device 100.
  • the current detection pad 114 is connected to the external resistor unit 206 via wiring such as a wire.
  • the external resistor unit 206 is provided between the current detection pad 114 and the emitter terminal (E).
  • the external resistor unit 206 is provided on a substrate different from the semiconductor substrate of the semiconductor device 100.
  • the semiconductor module 200 may have a circuit substrate on which the semiconductor device 100 and the external resistor unit 206 are mounted.
  • the semiconductor device 100 on the circuit substrate and the external resistor unit 206 on the circuit substrate are connected by wiring such as a wire.
  • a main current Ic and a detection current Is flow through the transistor section 70 and the current detection section 26 according to their respective areas.
  • the detection current Is flowing through the current detection section 26 can be detected by measuring the amount of voltage drop in the external resistor section 206.
  • the main current Ic of the transistor section 70 can be estimated from the detection current Is. This makes it possible to detect, for example, an overcurrent in the transistor section 70 and shut down the device.
  • the external resistor unit 206 is not built into the semiconductor device 100, and various resistors can be connected to the semiconductor device 100.
  • the user of the semiconductor module 200 may prepare the external resistor unit 206 and build it into the semiconductor module 200.
  • the resistance value Rs2 of the external resistor 206 is small, a large voltage may be applied between the collector and emitter or between the gate and emitter of the current detection unit 26. If a large voltage is applied to the current detection unit 26, the current detection unit 26 may be destroyed.
  • the semiconductor device 100 of this example includes an internal resistor section 210.
  • the internal resistor section 210 is provided between the emitter of the current detection section 26 and the current detection pad 114.
  • the internal resistor section 210, the current detection pad 114, and the external resistor section 206 are connected in series between the current detection section 26 and the emitter terminal (E).
  • the resistance value Rs1 of the built-in resistor unit 210 is greater than the resistance value Rs2 of the external resistor unit 206. This makes it easier to maintain the resistance value of the combined resistor connected to the emitter of the current detection unit 26 even if the resistance value Rs2 of the external resistor unit 206 is small. This makes it possible to reduce the voltage applied to the current detection unit 26 and suppress damage to the current detection unit 26.
  • the resistance value Rs1 of the built-in resistor 210 may be three times or more the resistance value Rs2 of the external resistor 206. This makes it easier to maintain the resistance value of the combined resistor connected to the emitter of the current detection unit 26.
  • the resistance value Rs1 may be four times or more, or may be five times or more, the resistance value Rs2.
  • the resistance value Rs1 of the built-in resistor 210 may be 10 times or less the resistance value Rs2 of the external resistor 206. This prevents the detection current Is from becoming too small. This allows the detection accuracy of the detection current Is to be maintained.
  • the resistance value Rs1 may be 8 times or less the resistance value Rs2, or may be 6 times or less.
  • Fig. 2 is a diagram showing the relationship between the resistance value Rs [ ⁇ ] of the resistor connected to the emitter of the current detection unit 26 and the short circuit withstand capability of the current detection unit 26.
  • the short circuit withstand capability is shown as a ratio to a predetermined value [A/ cm2 ].
  • Each circle plot in Fig. 2 indicates one measurement result.
  • the resistance value Rs is the sum of the resistance value Rs1 and the resistance value Rs2.
  • the resistance value Rs increases significantly up to a resistance value Rs of approximately 6 ⁇ .
  • the resistance value Rs1 of the built-in resistor 210 may be set to 6 ⁇ or more. This makes it easier to ensure the short circuit resistance of the current detection unit 26.
  • the resistance value Rs1 may be 8 ⁇ or more, or may be 10 ⁇ or more. In the region where the resistance value Rs1 is 10 ⁇ or more, the short circuit resistance of the current detection unit 26 is relatively stable.
  • the detection current Is flowing through the current detection section 26 can be reduced. This allows the gain (gm) in the current detection section 26 to be reduced. This makes it possible to suppress oscillation of the waveform in the current detection section 26, and to increase the short-circuit resistance.
  • the resistance value Rs1 of the built-in resistor section 210 may be 20 ⁇ or less. This prevents the detection current Is from becoming too small.
  • the resistance value Rs1 may be 17 ⁇ or less, or may be 15 ⁇ or less.
  • the resistance value of the external resistor unit 206 may be 0.5 ⁇ or more and less than 6 ⁇ .
  • the resistance value of the external resistor unit 206 may be 1 ⁇ or more, or may be 1.5 ⁇ or more.
  • the resistance value of the external resistor unit 206 may be 5 ⁇ or less, or may be 4 ⁇ or less.
  • the rated current of the semiconductor device 100 is Ir (A).
  • the rated current Ir may be the specification value of the semiconductor device 100.
  • the resistance value Rs1 ( ⁇ ) of the built-in resistor section 210 may be Ir/50 or more.
  • the resistance value Rs1 may be Ir/40 or more, or may be Ir/30 or more.
  • the resistance value Rs1 may be Ir/15 or less.
  • the resistance value Rs1 may be Ir/20 or less, or may be Ir/25 or less.
  • FIG. 3 is a top view showing an example of a semiconductor device 100 according to one embodiment of the present invention.
  • the positions of each component projected onto the top surface of the semiconductor substrate 10 are shown.
  • FIG. 3 only some of the components of the semiconductor device 100 are shown, and some components are omitted.
  • the semiconductor device 100 includes a semiconductor substrate 10.
  • the semiconductor substrate 10 is a substrate made of a semiconductor material.
  • the semiconductor substrate 10 is a silicon substrate.
  • the outer peripheral edge of the semiconductor substrate 10 in a top view is referred to as the outer peripheral edge 140.
  • the top view refers to a view parallel to the Z-axis from the top side of the semiconductor substrate 10.
  • one of the edges of the outer peripheral edge 140 of the semiconductor substrate 10 in a top view is referred to as the first edge 142.
  • the direction parallel to the first edge 142 is referred to as the X-axis direction
  • the direction perpendicular to the first edge 142 is referred to as the Y-axis direction.
  • the semiconductor substrate 10 has an active portion 120.
  • the active portion 120 is a region through which a main current flows in the depth direction between the upper and lower surfaces of the semiconductor substrate 10 when the semiconductor device 100 is in operation.
  • An emitter electrode 52 is provided above the active portion 120, but is omitted in FIG. 3.
  • the active section 120 is provided with a transistor section 70 including a transistor element such as an IGBT.
  • the active section 120 may further be provided with a diode section 80 including a diode element such as a free wheel diode (FWD).
  • the transistor section 70 and the diode section 80 are provided inside the semiconductor substrate 10.
  • the transistor section 70 and the diode section 80 are alternately arranged along the first direction.
  • the trench section which will be described later, may also be arranged side by side along the first direction.
  • the transistor section 70 is provided at the end of the active section 120 in the first direction.
  • the active section 120 may be provided with only one of the transistor section 70 and the diode section 80.
  • the transistor section 70 and the diode section 80 may each have a longitudinal direction in the second direction.
  • the direction parallel to the longest straight line among the boundaries of each component when viewed from above may be the longitudinal direction of that component.
  • the second direction is a direction in the XY plane, and is a direction different from the first direction.
  • the first direction is the X-axis direction
  • the second direction is the Y-axis direction.
  • the length of the transistor section 70 in the Y-axis direction is greater than its width in the X-axis direction.
  • the length of the diode section 80 in the Y-axis direction is greater than its width in the X-axis direction.
  • the longitudinal direction of the transistor section 70 and the diode section 80 may be the same as the longitudinal direction of each trench section described later.
  • the diode section 80 has an N+ type cathode region in a region that contacts the bottom surface of the semiconductor substrate 10.
  • the region in which the cathode region is provided is referred to as the diode section 80.
  • the diode section 80 is a region that overlaps with the cathode region when viewed from above.
  • a P+ type collector region may be provided in a region other than the cathode region on the bottom surface of the semiconductor substrate 10.
  • the region in which the diode section 80 is extended in the Y-axis direction up to the active well region 29 described below may also be included in the diode section 80.
  • a collector region is provided on the bottom surface of the extended region.
  • the transistor section 70 has a P+ type collector region in a region that contacts the bottom surface of the semiconductor substrate 10.
  • the transistor section 70 has a gate structure that has an N+ type emitter region, a P- type base region, a gate conductive portion, and a gate insulating film periodically arranged on the top surface side of the semiconductor substrate 10.
  • a plurality of pad sections 110 (in the example of FIG. 3, a current detection pad 114, an auxiliary emitter pad 115, a gate pad 116, a cathode pad 117, and an anode pad 118) are provided.
  • the current detection pad 114 is connected to the current detection section 26.
  • the current detection unit 26 is provided inside the semiconductor substrate 10, and a detection current Is flows through it according to the main current Ic of the transistor unit 70.
  • the current detection unit 26 has the same unit structure as the transistor unit 70, and has a smaller area (corresponding to the area of the channel) in a top view than the transistor unit 70.
  • the unit structure is repeatedly formed in the current detection unit 26 and the transistor unit 70.
  • the unit structure includes, for example, a gate electrode, a gate insulating film, an N+ type emitter region, and a P- type base region.
  • the current detection pad 114 is connected to one end of the external resistor unit 206 by wiring such as a wire.
  • the other end of the external resistor unit 206 may be connected to the emitter electrode 52 via wiring such as a wire.
  • the other end of the external resistor unit 206 may be connected to the emitter electrode 52 via the auxiliary emitter pad 115.
  • the emitter electrode 52 is connected to the emitter terminal (E) via wiring such as a wire.
  • the gate pad 116 is connected to the gate conductive portion of the transistor section 70 and the gate conductive portion of the current detection section 26.
  • the gate conductive portion is an example of a gate electrode in a MOS gate structure.
  • the gate pad 116 is connected to each gate conductive portion via a gate wiring 50.
  • the gate wiring 50 is disposed between the active section 120 and the edge 142 in a top view.
  • the gate wiring 50 is disposed so as to surround the active section 120 in a top view. In FIG. 3, the gate wiring 50 is indicated by a dashed line.
  • the gate wiring 50 may be a polysilicon wiring arranged above the top surface of the semiconductor substrate 10.
  • the gate wiring 50 and the semiconductor substrate 10 are insulated by an insulating film.
  • the gate wiring 50 may further include a metal wiring laminated with the polysilicon wiring via the insulating film.
  • the polysilicon wiring and the metal wiring are connected via a contact hole provided in the insulating film.
  • the cathode pad 117 and the anode pad 118 are connected to a temperature sensor unit 111, which will be described later. Note that the number and types of pad units 110 provided on the semiconductor substrate 10 are not limited to the example shown in FIG. 3.
  • Each pad is made of a metal material such as aluminum.
  • the multiple pad portions 110 are arranged in a predetermined direction between the active portion 120 and a first edge 142 on the upper surface of the semiconductor substrate 10. In this example, the multiple pad portions 110 are arranged between the active portion 120 and the first edge 142 in the Y-axis direction.
  • the multiple pad portions 110 in this example are provided above an active well region 29, which will be described later.
  • the current detection section 26 may be provided between any two pad sections 110.
  • the current detection section 26 is disposed between the two pad sections 110 in the first direction.
  • the first direction and the arrangement direction of the pad sections 110 are the same direction.
  • the semiconductor substrate 10 has an active well region 29.
  • the active well region 29 surrounds the transistor section 70 and the diode section 80 in a top view.
  • the active well region 29 surrounds the active section 120 in a top view.
  • the active well region 29 is a region of a second conductivity type having a higher doping concentration than the base region. In this example, the active well region 29 is of P+ type.
  • the active well region 29 may surround the active section 120 along the gate wiring 50.
  • the active well region 29 may be provided in the semiconductor substrate 10 below the region in which the gate wiring 50 is provided.
  • the active well region 29 is also provided around or below the pad section 110, but is omitted in FIG. 3.
  • the edge termination structure 90 is provided on the upper surface of the semiconductor substrate 10 between the active well region 29 and the outer peripheral edge 140 of the semiconductor substrate 10.
  • the edge termination structure 90 may be arranged in an annular shape so as to surround the active well region 29 on the upper surface of the semiconductor substrate 10.
  • the edge termination structure 90 is arranged along the outer peripheral edge 140 of the semiconductor substrate 10.
  • the edge termination structure 90 relieves electric field concentration on the upper surface side of the semiconductor substrate 10.
  • the edge termination structure 90 has, for example, a guard ring, a field plate, a resurf, or a structure that combines these.
  • the temperature sense wiring 112 is provided above the active portion 120.
  • the temperature sense wiring 112 may be a semiconductor wiring.
  • the temperature sense wiring 112 is connected to the temperature sense portion 111.
  • the temperature sense wiring 112 extends to the region between the active portion 120 and the outer peripheral end 140 on the upper surface of the semiconductor substrate 10, and is connected to the cathode pad 117 and the anode pad 118. Note that the semiconductor device 100 does not have to include the temperature sense portion 111 and the temperature sense wiring 112.
  • FIG. 4 is an enlarged view of region P in FIG. 3.
  • Region P includes current detection pad 114 and current detection section 26.
  • FIG. 4 shows region P according to a reference example. Semiconductor device 100 of the reference example does not have built-in resistor section 210 described in FIG. 1.
  • the current detection pad 114 is disposed above the upper surface of the semiconductor substrate 10. In a top view, the current detection pad 114 is disposed side by side with the current detection unit 26 in the first direction.
  • the current detection pad 114 and the current detection unit 26 being side by side in the first direction refers to a state in which at least a portion of the current detection pad 114 and at least a portion of the current detection unit 26 face each other in the first direction. Wires and other wiring are connected to the upper surface of the current detection pad 114.
  • a current detection electrode 214 is provided above the current detection unit 26.
  • the current detection electrode 214 is connected to the emitter region of the current detection unit 26.
  • the current detection electrode 214 is connected to the current detection pad 114.
  • the current detection electrode 214 may be formed from the same material as the current detection pad 114. In other words, the current detection electrode 214 in the reference example may be an extension of the current detection pad 114. With this structure, the detection current Is of the current detection unit 26 flows through the current detection electrode 214 and the current detection pad 114.
  • the gate wiring 50 is also disposed between the current detection pad 114 and the current detection section 26 when viewed from above.
  • the gate wiring 50 is provided so as to surround the current detection section 26.
  • the gate wiring 50 surrounding the current detection section 26 may be connected to the gate conductive section in the current detection section 26.
  • the gate wiring 50 surrounding the current detection section 26 may also be connected to the gate conductive section of the transistor section 70.
  • the current detection unit 26 is disposed facing the transistor unit 70 in the Y-axis direction.
  • a gate wiring 50 is also provided between the current detection unit 26 and the transistor unit 70.
  • the gate conductive portions of the current detection unit 26 and the transistor unit 70 may be connected to the gate wiring 50 between the current detection unit 26 and the transistor unit 70.
  • FIG. 5 is a diagram showing an example of the A-A' cross section in FIG. 4.
  • the A-A' cross section is an XZ plane passing through the current detection unit 26 and the current detection pad 114.
  • the semiconductor device 100 comprises a semiconductor substrate 10, a collector electrode 24, an interlayer insulating film 38, a current detection pad 114, a current detection electrode 214, and a gate wiring 50.
  • the semiconductor substrate 10 has an upper surface 21 and a lower surface 23.
  • the upper surface 21 and the lower surface 23 are the two main surfaces of the semiconductor substrate 10.
  • the interlayer insulating film 38 is provided on the upper surface 21 of the semiconductor substrate 10.
  • the interlayer insulating film 38 is a film that includes at least one layer of an insulating film such as silicate glass doped with impurities such as boron or phosphorus, a thermal oxide film, and other insulating films.
  • the current detection pad 114 and the current detection electrode 214 are provided above the interlayer insulating film 38.
  • the current detection electrode 214 passes through a contact hole provided in the interlayer insulating film 38 and contacts the upper surface 21 of the semiconductor substrate 10 on which the current detection unit 26 is provided.
  • the current detection pad 114 is provided at a position that does not overlap with the current detection unit 26, and is connected to the current detection electrode 214.
  • the gate wiring 50 is disposed above the upper surface 21 of the semiconductor substrate 10.
  • An insulating film such as an interlayer insulating film 38 is provided between the gate wiring 50 and the semiconductor substrate 10.
  • the gate wiring 50 is disposed below a metal electrode such as a current detection electrode 214.
  • the gate wiring 50 and the metal electrode are insulated by the interlayer insulating film 38.
  • the collector electrode 24 is provided on the lower surface 23 of the semiconductor substrate 10.
  • the current detection pad 114, the current detection electrode 214, and the collector electrode 24 are formed of a metal material such as aluminum.
  • the current detection unit 26 has a trench portion 40, an N+ type emitter region 12, a P- type base region 14, an N- type drift region 18, and a P+ type collector region 22.
  • the trench portion 40 is provided from the upper surface 21 of the semiconductor substrate 10 toward the inside.
  • a plurality of trench portions 40 are arranged along a first direction (X-axis direction), and each trench portion 40 has a longitudinal direction in a second direction (Y-axis direction).
  • the trench portion 40 has a gate insulating film 42 and a gate conductive portion 44.
  • the gate insulating film 42 is provided to cover the inner wall of the trench.
  • the gate insulating film 42 may be formed by oxidizing or nitriding the semiconductor on the inner wall of the trench.
  • the gate conductive portion 44 is provided inside the gate insulating film 42 inside the trench. In other words, the gate insulating film 42 insulates the gate conductive portion 44 from the semiconductor substrate 10.
  • the gate conductive portion 44 is formed of a conductive material such as polysilicon. In a cross section different from that shown in FIG. 5, the gate conductive portion 44 is electrically connected to the gate wiring 50.
  • Some of the trench portions 40 may function as dummy trench portions in which an emitter potential is applied to the gate conductive portion 44.
  • the emitter region 12 and the base region 14 are provided between the two trench portions 40.
  • the emitter region 12 is exposed on the upper surface 21 of the semiconductor substrate 10, and is connected to the current detection electrode 214.
  • the base region 14 is in contact with the trench portion 40 between the emitter region 12 and the drift region 18.
  • a predetermined gate voltage is applied to the gate conductive portion 44 of the trench portion 40, the surface layer of the base region 14 in contact with the trench portion 40 is inverted to an N-type region, forming a channel.
  • the emitter region 12 and the drift region 18 are connected by a channel, and the detection current Is flows.
  • the collector region 22 is provided on the lower surface 23 of the semiconductor substrate 10.
  • the collector region 22 is in contact with the collector electrode 24.
  • the acceptor concentration of the collector region 22 is higher than the acceptor concentration of the base region 14.
  • the transistor section 70 also has a trench section 40, an N+ type emitter region 12, a P- type base region 14, an N- type drift region 18, and a P+ type collector region 22. However, the transistor section 70 has more trench sections 40 than the current detection section 26.
  • the diode section 80 may also have a plurality of trench sections 40. However, the trench sections 40 of the diode section 80 function as the dummy trench sections described above. Furthermore, the diode section 80 does not have an emitter region 12. In the diode section 80, a base region 14 may be provided in place of the emitter region 12. Furthermore, in the diode section 80, an N+ type cathode region is provided in place of the collector region 22.
  • a sense well region 28 may be provided in the semiconductor substrate 10.
  • the sense well region 28 is a P+ type region exposed on the upper surface 21 of the semiconductor substrate 10.
  • the sense well region 28 may be provided deeper than the trench portion 40.
  • the sense well region 28 may surround the current detection portion 26 in a top view. By providing the sense well region 28, the current detection portion 26 can be separated from the active portion 120, etc., and the detection current Is can be detected with high accuracy.
  • the semiconductor substrate 10 may be provided with a pad well region 25.
  • the pad well region 25 is a P+ type region exposed on the upper surface 21 of the semiconductor substrate 10.
  • the pad well region 25 may be provided deeper than the trench portion 40.
  • the pad well region 25 overlaps at least a portion of the current detection pad 114 in a top view.
  • the pad well region 25 may overlap the entire current detection pad 114.
  • the pad well region 25 may overlap a portion of the current detection electrode 214.
  • the pad well region 25 may be connected to the sense well region 28.
  • At least a portion of the gate wiring 50 may overlap at least one of the pad well region 25 and the sense well region 28. In this example, both ends of the gate wiring 50 in the X-axis direction overlap with the pad well region 25 or the sense well region 28.
  • FIG. 6 is a diagram showing an example of the B-B' cross section in FIG. 4.
  • the B-B' cross section is a YZ plane passing through the current detection section 26 and the transistor section 70.
  • the semiconductor device 100 includes a semiconductor substrate 10, a collector electrode 24, an interlayer insulating film 38, an emitter electrode 52, a current detection electrode 214, and a gate wiring 50.
  • Each of the current detection section 26 and the transistor section 70 has a trench section 40 in the cross section.
  • the gate conductive section 44 of each trench section 40 is connected to the gate wiring 50. This allows a gate voltage to be applied to each gate conductive section 44.
  • the end of the trench portion 40 of the current detection unit 26 in the Y-axis direction may be covered by a sense well region 28.
  • the end of the trench portion 40 of the transistor unit 70 in the Y-axis direction may be covered by an active well region 27.
  • the active well region 27 is a P+ type region exposed on the upper surface 21 of the semiconductor substrate 10.
  • the active well region 27 may be provided deeper than the trench portion 40.
  • the active well region 27 may be connected to the active well region 29 in FIG. 3.
  • FIG. 7 is a diagram showing an example of a P region according to the first embodiment.
  • the semiconductor device 100 of this embodiment further includes an internal resistor section 210 in comparison with the reference example described in FIGS. 4 to 6.
  • the semiconductor device 100 of this embodiment may have a structure similar to that of the reference example described in FIGS. 4 to 6, except for the configuration that will be specifically described.
  • the built-in resistor 210 and the gate wiring 50 are arranged side by side in the first direction (X-axis direction) between the current detection unit 26 and the current detection pad 114.
  • the gate wiring 50 is arranged between the built-in resistor 210 and the current detection unit 26.
  • the built-in resistor 210 is separated from the gate wiring 50.
  • Between the current detection unit 26 and the current detection pad 114 refers to between at least a portion of the current detection unit 26 and at least a portion of the current detection pad 114.
  • at least a portion of the current detection unit 26 is disposed on the positive side of the X-axis direction relative to the built-in resistor unit 210 and the gate wiring 50, and at least a portion of the current detection pad 114 is disposed on the negative side of the X-axis direction.
  • At least one of the built-in resistor unit 210 and the gate wiring 50 may overlap the current detection pad 114.
  • the built-in resistor 210 and the gate wiring 50 are aligned in the first direction (X-axis direction), meaning that at least a portion of the built-in resistor 210 faces the gate wiring 50 in the first direction. 50% or more of the built-in resistor 210 in the Y-axis direction may face the gate wiring 50 in the first direction, or the entire built-in resistor 210 in the Y-axis direction may face the gate wiring 50 in the first direction.
  • the built-in resistor 210 may have a region that does not face the gate wiring 50 in the first direction. For example, the built-in resistor 210 may extend longer in the Y-axis direction than the gate wiring 50 aligned in the first direction.
  • the end of the current detection unit 26 in the X-axis direction is the trench portion 40 located at the end of the current detection unit 26 in the X-axis direction.
  • the built-in resistor portion 210 and the gate wiring 50 are arranged closer to the current detection pad 114 than the current detection unit 26.
  • the current detection electrode 214 in this example is provided separately from the current detection pad 114.
  • the current detection pad 114 in this example is not in contact with the semiconductor substrate 10.
  • the metal forming the current detection pad 114 is not in contact with the semiconductor substrate 10.
  • the current detection electrode 214 and the current detection pad 114 are connected to each other via the built-in resistor 210. In this way, the built-in resistor 210 connects the current detection unit 26 and the current detection pad 114.
  • a built-in resistor 210 can be provided between the current detection unit 26 and the current detection pad 114.
  • the resistance value of the built-in resistor 210 can be adjusted by the shape of the built-in resistor 210, such as the cross-sectional area and width, by the material from which the built-in resistor 210 is formed, or by the concentration of impurities added to the built-in resistor 210.
  • the built-in resistor 210 in this example may be formed from polysilicon. This makes it easy to provide the built-in resistor 210 above the semiconductor substrate 10.
  • Both the built-in resistor 210 and the gate wiring 50 may be formed from polysilicon. This allows at least part of the formation process of the built-in resistor 210 and the gate wiring 50 to be shared. This makes it easy to form the built-in resistor 210.
  • the thickness of the built-in resistor 210 in the Z-axis direction and the thickness of the gate wiring 50 in the Z-axis direction may be the same. This makes it easier to standardize the formation process of the built-in resistor 210 and the gate wiring 50.
  • the thickness of the built-in resistor 210 in the Z-axis direction may be smaller than the thickness of the Z-axis wiring of the gate wiring 50. This makes it possible to increase the resistance value of the built-in resistor 210.
  • the thickness of the built-in resistor 210 in the Z-axis direction may be less than half the thickness of the Z-axis wiring of the gate wiring 50.
  • the impurity concentration (atoms/cm 3 ) of the built-in resistor 210 and the impurity concentration of the gate wiring 50 may be the same. This makes it easier to standardize the formation process of the built-in resistor 210 and the gate wiring 50. In another example, the impurity concentration of the built-in resistor 210 may be lower than the impurity concentration of the gate wiring 50. This makes it possible to increase the resistance value of the built-in resistor 210. The impurity concentration of the built-in resistor 210 may be half or less of the impurity concentration of the gate wiring 50.
  • FIG. 8 is a diagram showing an example of the A-A' cross section of FIG. 7.
  • the A-A' cross section is an XZ plane passing through the current detection section 26 and the current detection pad 114.
  • the semiconductor device 100 of this example has a built-in resistor section 210 in the A-A' cross section.
  • the built-in resistor 210 is disposed above the upper surface 21 of the semiconductor substrate 10.
  • the built-in resistor 210 may be provided at the same height as the gate wiring 50. In this example, the built-in resistor 210 overlaps both the current detection electrode 214 and the current detection pad 114.
  • the built-in resistor 210 is electrically connected to the current detection electrode 214 and the current detection section 26 by a first connection section 221.
  • the first connection section 221 is provided so as to penetrate the interlayer insulating film 38 from the current detection electrode 214 to the built-in resistor 210, and is in contact with the surface of the built-in resistor 210.
  • the built-in resistor 210 is electrically connected to the current detection pad 114 by a second connection section 222.
  • the second connection section 222 is provided so as to penetrate the interlayer insulating film 38 from the current detection pad 114 to the built-in resistor 210, and is in contact with the surface of the built-in resistor 210.
  • the first connection portion 221 and the second connection portion 222 may be arranged side by side in the first direction (X-axis direction). In other words, the positions of the first connection portion 221 and the second connection portion 222 in the second direction (Y-axis direction) may be the same.
  • the first connection portion 221 may have a long side in the Y-axis direction or may have a long side in the X-axis direction.
  • the second connection portion 222 may have a long side in the Y-axis direction or may have a long side in the X-axis direction.
  • one each of the first connection portion 221 and the second connection portion 222 is provided.
  • a plurality of each of the first connection portion 221 and the second connection portion 222 may be arranged side by side as described below.
  • At least a portion of the gate wiring 50 may overlap with the sense well region 28. In this example, the entire gate wiring 50 overlaps with the sense well region 28. At least a portion of the built-in resistor 210 may overlap with the pad well region 25. In this example, the entire built-in resistor 210 overlaps with the pad well region 25.
  • FIG. 9 is a diagram showing an example of a P region according to the second embodiment.
  • the semiconductor device 100 of this embodiment differs from the first embodiment in the arrangement of the first connection portion 221 and the second connection portion 222.
  • the other structures are the same as those of the first embodiment.
  • the B-B' cross section in each embodiment is the same as the example in FIG. 6, so a description thereof will be omitted.
  • the built-in resistor 210 has a long side in the second direction (Y-axis direction).
  • the first connection portion 221 and the second connection portion 222 are disposed at different positions in the Y-axis direction. This allows the distance from the first connection portion 221 to the second connection portion 222 to be longer, and the resistance value from the first connection portion 221 to the second connection portion 222 to be increased.
  • the current detection electrode 214 may have a first extension portion that extends to a position where it overlaps with the first connection portion 221.
  • the current detection pad 114 may have a second extension portion that extends to a position where it overlaps with the second connection portion 222.
  • the gate wiring 50 arranged alongside the built-in resistor 210 in the X-axis direction may also have a long side in the Y-axis direction.
  • the length of the built-in resistor 210 in the Y-axis direction may be longer or shorter than that of the gate wiring 50 arranged alongside it.
  • FIG. 10 is an enlarged view of the built-in resistor 210.
  • the center position of the built-in resistor 210 in the Y-axis direction is Zc, and the two end positions of the built-in resistor 210 are Z1 and Z2.
  • the regions obtained by equally dividing the built-in resistor 210 in the Y-axis direction are the first region 231 and the second region 232.
  • the first region 231 is the region from position Zc to Z1
  • the second region 232 is the region from position Zc to Z2.
  • the first connection portion 221 may be disposed in the first region 231, and the second connection portion 222 may be disposed in the second region 232. This allows the distance between the first connection portion 221 and the second connection portion 222 to be increased, and the resistance value between the first connection portion 221 and the second connection portion 222 to be increased.
  • the distance D in the Y-axis direction between the first connection portion 221 and the second connection portion 222 may be half or more of the length L of the built-in resistor portion 210 in the Y-axis direction, and may be 3/4 or more.
  • the width W of the built-in resistor 210 in the X-axis direction may be the same as or different from the width of the gate wiring 50 arranged side by side.
  • the width W of the built-in resistor 210 in the X-axis direction may be less than 100%, 50% or less, or 25% or less of the width of the gate wiring 50 arranged side by side in the X-axis direction.
  • the first connection parts 221 may be arranged in a line in a plurality of places.
  • a plurality of first connection parts 221 are arranged in a line in the X-axis direction.
  • the width of each first connection part 221 in the X-axis direction is x
  • the length in the Y-axis direction is y
  • the distance in the X-axis direction between the first connection parts 221 is p.
  • the width x may be 0.4 ⁇ m or more and 0.5 ⁇ m or less.
  • the length y may be 4 ⁇ m or more and 8 ⁇ m or less.
  • the distance p may be 1 ⁇ m or more and 2 ⁇ m or less.
  • the number of first connection parts 221 may be 2 or more and 6 or less.
  • a plurality of second connection parts 222 may also be arranged in a line in a plurality of places.
  • the arrangement, number, width, length, and distance in the X-axis direction of the second connection parts 222 may be the same as those of the first connection parts 221.
  • FIG. 11 is a diagram showing an example of the A-A' cross section of FIG. 9.
  • the A-A' cross section is an XZ plane that passes through the first connection portion 221.
  • the built-in resistor portion 210 and the current detection electrode 214 are connected by the first connection portion 221.
  • FIG. 12 is a diagram showing an example of the CC' cross section of FIG. 9.
  • the CC' cross section is an XZ plane that passes through the second connection portion 222.
  • the built-in resistor portion 210 and the current detection pad 114 are connected by the second connection portion 222.
  • the second connection portion 222 may or may not be disposed opposite the current detection portion 26 in the X-axis direction.
  • the second connection portion 222 is disposed opposite the gate wiring 50 disposed between the current detection portion 26 and the transistor portion 70 in the X-axis direction. This allows the second connection portion 222 to be disposed away from the first connection portion 221.
  • FIG. 13 is a diagram showing an example of a P region according to the third embodiment.
  • the arrangement of the gate wiring 50 and the built-in resistor 210 differs from that of the first and second embodiments.
  • the other structures are the same as either the first or second embodiment.
  • the first connection portion 221 and the second connection portion 222 are arranged in the same manner as in the second embodiment, but the first connection portion 221 and the second connection portion 222 may be arranged in the same manner as in the first embodiment.
  • the built-in resistor 210 in this example is sandwiched between two gate wirings 50 in the X-axis direction between the current detection unit 26 and the current detection pad 114.
  • the built-in resistor 210 may also be sandwiched between gate wirings 50 in the Y-axis direction.
  • the built-in resistor 210 in this example is disposed surrounded by the gate wirings 50.
  • FIG. 14 is a diagram showing an example of the A-A' cross section of FIG. 13.
  • the A-A' cross section is an XZ plane passing through the first connection portion 221.
  • the built-in resistor portion 210 is disposed between two gate wirings 50. In this cross section, the built-in resistor portion 210 and the current detection electrode 214 are connected by the first connection portion 221.
  • FIG. 15 is a diagram showing an example of the CC' cross section of FIG. 13.
  • the CC' cross section is an XZ plane passing through the second connection portion 222.
  • the built-in resistor portion 210 is disposed between two gate wirings 50. In this cross section, the built-in resistor portion 210 and the current detection pad 114 are connected by the second connection portion 222.
  • FIG. 16 is a diagram showing an example of a P region according to the fourth embodiment.
  • the arrangement of the gate wiring 50 and the built-in resistor 210 differs from that of the first and second embodiments.
  • the other structures are the same as either the first or second embodiment.
  • the first connection portion 221 and the second connection portion 222 are arranged in the same manner as in the second embodiment, but the first connection portion 221 and the second connection portion 222 may be arranged in the same manner as in the first embodiment.
  • FIG. 17 is a diagram showing an example of the A-A' cross section of FIG. 16.
  • the A-A' cross section is an XZ plane passing through the first connection portion 221.
  • the built-in resistor portion 210 is disposed between the gate wiring 50 and the current detection electrode 214. In this cross section, the built-in resistor portion 210 and the current detection electrode 214 are connected by the first connection portion 221.
  • At least a portion of the gate wiring 50 may overlap with the pad well region 25. In this example, the entire gate wiring 50 overlaps with the pad well region 25. At least a portion of the built-in resistor 210 may overlap with the sense well region 28. In this example, the entire built-in resistor 210 overlaps with the sense well region 28.
  • the built-in resistor 210 may have a portion extending in the X-axis direction between the current detection unit 26 and the transistor unit 70.
  • one of the first connection unit 221 and the second connection unit 222 may be disposed between the current detection unit 26 and the transistor unit 70, and the other connection unit may be disposed between the current detection unit 26 and the current detection pad 114. This allows the length of the built-in resistor 210 between the first connection unit 221 and the second connection unit 222 to be further increased, thereby increasing the resistance value.

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PCT/JP2024/027772 2023-09-04 2024-08-02 半導体装置および半導体モジュール Pending WO2025052831A1 (ja)

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6468005A (en) * 1987-09-09 1989-03-14 Nissan Motor Mosfet incorporating protection function
JPH02301151A (ja) * 1989-05-16 1990-12-13 Toyota Autom Loom Works Ltd 電流検出機能付トランジスタ
JPH08316472A (ja) * 1995-05-23 1996-11-29 Hitachi Ltd 電流供給回路
JP2005209943A (ja) * 2004-01-23 2005-08-04 Denso Corp スイッチ回路およびそれを用いた点火装置
WO2023002767A1 (ja) * 2021-07-21 2023-01-26 ローム株式会社 半導体装置
JP2023055165A (ja) * 2021-10-05 2023-04-17 株式会社デンソー 半導体装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6468005A (en) * 1987-09-09 1989-03-14 Nissan Motor Mosfet incorporating protection function
JPH02301151A (ja) * 1989-05-16 1990-12-13 Toyota Autom Loom Works Ltd 電流検出機能付トランジスタ
JPH08316472A (ja) * 1995-05-23 1996-11-29 Hitachi Ltd 電流供給回路
JP2005209943A (ja) * 2004-01-23 2005-08-04 Denso Corp スイッチ回路およびそれを用いた点火装置
WO2023002767A1 (ja) * 2021-07-21 2023-01-26 ローム株式会社 半導体装置
JP2023055165A (ja) * 2021-10-05 2023-04-17 株式会社デンソー 半導体装置

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