WO2025017413A1 - 半導体装置、及び半導体装置の作製方法 - Google Patents

半導体装置、及び半導体装置の作製方法 Download PDF

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Publication number
WO2025017413A1
WO2025017413A1 PCT/IB2024/056602 IB2024056602W WO2025017413A1 WO 2025017413 A1 WO2025017413 A1 WO 2025017413A1 IB 2024056602 W IB2024056602 W IB 2024056602W WO 2025017413 A1 WO2025017413 A1 WO 2025017413A1
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Prior art keywords
layer
insulating layer
conductive layer
insulating
oxide
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PCT/IB2024/056602
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English (en)
French (fr)
Japanese (ja)
Inventor
神長正美
井口貴弘
黒崎大輔
肥塚純一
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP2025533544A priority Critical patent/JPWO2025017413A1/ja
Priority to CN202480039849.1A priority patent/CN121400086A/zh
Priority to KR1020267000269A priority patent/KR20260040222A/ko
Publication of WO2025017413A1 publication Critical patent/WO2025017413A1/ja
Anticipated expiration legal-status Critical
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements

Definitions

  • One aspect of the present invention relates to a semiconductor device and a manufacturing method thereof.
  • One aspect of the present invention relates to a transistor and a manufacturing method thereof.
  • One aspect of the present invention relates to a display device having a semiconductor device.
  • one embodiment of the present invention is not limited to the above technical field.
  • Examples of technical fields of one embodiment of the present invention include semiconductor devices, display devices, light-emitting devices, power storage devices, memory devices, lighting devices, input devices (e.g., touch sensors), input/output devices (e.g., touch panels), electronic devices having them, driving methods thereof, or manufacturing methods thereof.
  • a semiconductor device is a device that utilizes semiconductor characteristics, and refers to a circuit including a semiconductor element (transistor, diode, photodiode, etc.), a device having such a circuit, etc. Also, it refers to any device that can function by utilizing semiconductor characteristics. For example, an integrated circuit, a chip including an integrated circuit, and an electronic component that houses a chip in a package are examples of semiconductor devices. Also, memory devices, display devices, light-emitting devices, lighting devices, and electronic devices may themselves be semiconductor devices and each may have a semiconductor device.
  • Display devices are used in, for example, mobile information terminals, television devices (also called television receivers), digital signage, and public information displays (PIDs).
  • display devices include display devices having organic electroluminescence (EL) elements or light-emitting diodes (LEDs), display devices having liquid crystal elements, and electronic paper that displays using an electrophoretic method.
  • EL organic electroluminescence
  • LEDs light-emitting diodes
  • the pixel size can be reduced and the resolution can be increased.
  • the aperture ratio can be increased. For these reasons, there is a demand for miniaturized transistors.
  • Devices requiring high-definition display devices such as those for virtual reality (VR), augmented reality (AR), substitute reality (SR), and mixed reality (MR), are being actively developed.
  • VR virtual reality
  • AR augmented reality
  • SR substitute reality
  • MR mixed reality
  • Patent document 1 discloses a high-definition display device that uses organic EL elements.
  • display devices In addition to achieving high resolution, display devices also have other issues that need to be improved, such as increasing operating speed and reducing display unevenness, and these cannot be resolved simply by uniformly miniaturizing transistors.
  • the transistors in the driver circuit are required to have a large on-state current.
  • the on-state current can be increased, thereby enabling the operating speed of the display device to be increased.
  • the transistors in the pixel circuits are required to be transistors with small changes in drain current in the saturation region (hereinafter sometimes referred to as "high saturation").
  • high saturation transistors with small changes in drain current in the saturation region
  • transistors having characteristics according to the respective requirements it is preferable to place transistors having characteristics according to the respective requirements in the appropriate locations for each circuit that constitutes the display device. For example, it is preferable to use transistors with a short channel length and a large on-current for the transistors in the driver circuit. Also, it is preferable to use transistors with a long channel length and high saturation for the transistors in the pixel circuit.
  • An object of one embodiment of the present invention is to provide a semiconductor device or display device having a transistor with high on-state current and a transistor with high saturation. Another object is to provide a semiconductor device or display device having a transistor with a short channel length and a transistor with a long channel length. Another object is to provide a semiconductor device or display device having a transistor with good electrical characteristics. Another object is to provide a semiconductor device or display device with a small occupation area. Another object is to provide a semiconductor device or display device with low power consumption. Another object is to provide a semiconductor device or display device having a highly reliable transistor. Another object is to provide a semiconductor device or display device with high definition. Another object is to provide a method for manufacturing a semiconductor device or display device with high productivity. Another object is to provide a semiconductor device or display device having a novel transistor, or a manufacturing method thereof.
  • One aspect of the present invention includes a first transistor, a second transistor, a first insulating layer, and a second insulating layer
  • the first transistor includes a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, a first semiconductor layer, a third insulating layer, and a fourth insulating layer
  • the second transistor includes a fifth conductive layer, a sixth conductive layer, a seventh conductive layer, an eighth conductive layer, a second semiconductor layer, a fourth insulating layer, and a fifth insulating layer
  • the first insulating layer is provided on the first conductive layer.
  • the second conductive layer is provided on the first insulating layer with a region overlapping with the first conductive layer
  • the second insulating layer is provided on the first insulating layer and the second conductive layer
  • the third conductive layer is provided on the second insulating layer with a region overlapping with the second conductive layer
  • a first opening reaching the first conductive layer is provided in the first insulating layer, the second conductive layer, the second insulating layer, and the third conductive layer
  • the third insulating layer is provided with a first opening extending to the first conductive layer
  • the third insulating layer is provided with a first insulating layer extending from a top surface of the first conductive layer, a side surface of the first insulating layer, a side surface of the second conductive layer
  • the first semiconductor layer contacts a side surface of the insulating layer and a side surface of the third conductive layer
  • the first semiconductor layer contacts a top surface of the third conductive layer, a side surface of the third insulating layer, and
  • the first semiconductor layer and the second semiconductor layer have a metal oxide
  • the third insulating layer has one or more of silicon oxide, silicon oxynitride, aluminum oxide, hafnium oxide, hafnium aluminate, magnesium oxide, gallium oxide, gallium zinc oxide, silicon nitride, and silicon nitride oxide
  • the fifth insulating layer has one or both of silicon oxide and silicon oxynitride.
  • the third conductive layer and the fifth conductive layer have a first material
  • the first material is preferably one or more of titanium, tantalum nitride, titanium nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, indium oxide, zinc oxide, ITO, In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Sn oxide containing silicon, and zinc oxide doped with gallium.
  • the first insulating layer has a sixth insulating layer, a seventh insulating layer on the sixth insulating layer, and an eighth insulating layer on the seventh insulating layer
  • the second insulating layer has a ninth insulating layer, a tenth insulating layer on the ninth insulating layer, and an eleventh insulating layer on the tenth insulating layer
  • the sixth insulating layer, the eighth insulating layer, the ninth insulating layer, and the eleventh insulating layer have one or more of aluminum oxide, hafnium oxide, hafnium aluminate, magnesium oxide, gallium oxide, gallium zinc oxide, silicon nitride, and silicon oxynitride
  • the seventh insulating layer and the tenth insulating layer preferably have one or both of silicon oxide and silicon oxynitride.
  • one embodiment of the present invention has a first transistor, a second transistor, a first insulating layer, and a second insulating layer
  • the first transistor has a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, a first semiconductor layer, a third insulating layer, and a fourth insulating layer
  • the second transistor has a fifth conductive layer, a sixth conductive layer, a seventh conductive layer, an eighth conductive layer, a second semiconductor layer, a fourth insulating layer, and a fifth insulating layer
  • the first insulating layer is a first a fifth conductive layer and a fifth conductive layer
  • the second conductive layer is provided on the first insulating layer with a region overlapping with the first conductive layer
  • the second insulating layer is provided on the first insulating layer and the second conductive layer
  • the third conductive layer is provided on the second insulating layer with a region overlapping with the second conductive layer, a first opening reaching
  • the first semiconductor layer and the second semiconductor layer have a metal oxide
  • the third insulating layer has one or more of silicon oxide, silicon oxynitride, aluminum oxide, hafnium oxide, hafnium aluminate, magnesium oxide, gallium oxide, gallium zinc oxide, silicon nitride, and silicon nitride oxide
  • the fifth insulating layer has one or both of silicon oxide and silicon oxynitride.
  • the first conductive layer and the fifth conductive layer have a first material
  • the first material is preferably one or more of titanium, tantalum nitride, titanium nitride, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, indium oxide, zinc oxide, ITO, In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Sn oxide containing silicon, and zinc oxide doped with gallium.
  • the first insulating layer has a sixth insulating layer, a seventh insulating layer on the sixth insulating layer, and an eighth insulating layer on the seventh insulating layer
  • the second insulating layer has a ninth insulating layer, a tenth insulating layer on the ninth insulating layer, and an eleventh insulating layer on the tenth insulating layer
  • the sixth insulating layer, the eighth insulating layer, the ninth insulating layer, and the eleventh insulating layer have one or more of aluminum oxide, hafnium oxide, hafnium aluminate, magnesium oxide, gallium oxide, gallium zinc oxide, silicon nitride, and silicon oxynitride
  • the seventh insulating layer and the tenth insulating layer preferably have one or both of silicon oxide and silicon oxynitride.
  • An embodiment of the present invention includes a first transistor, a second transistor, a first insulating layer, and a second insulating layer
  • the first transistor includes a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, a first semiconductor layer, a third insulating layer, and a fourth insulating layer
  • the second transistor includes a fifth conductive layer, a sixth conductive layer, a seventh conductive layer, an eighth conductive layer, a second semiconductor layer, a fourth insulating layer, and a fifth insulating layer
  • the first insulating layer is provided on the first conductive layer.
  • the second conductive layer is provided on the first insulating layer with a region overlapping with the first conductive layer
  • the fifth conductive layer is provided in a region on the first insulating layer different from the second conductive layer
  • the second insulating layer is provided on the first insulating layer, the second conductive layer, and the fifth conductive layer
  • the third conductive layer is provided on the second insulating layer with a region overlapping with the second conductive layer
  • a first opening reaching the first conductive layer is provided in the first insulating layer, the second conductive layer, the second insulating layer, and the third conductive layer
  • the first semiconductor layer is in contact with an upper surface of the first conductive layer, a side surface of the first insulating layer, a side surface of the second conductive layer, a side surface of the second insulating layer, and a side surface of the third conductive layer
  • the first semiconductor layer is in contact with an upper surface of the third conductive layer, a side surface of the third insulating layer, and an upper surface
  • the semiconductor device has a second opening and a third opening in a region overlapping with the second semiconductor layer, the fourth conductive layer is provided on the fourth insulating layer with a region overlapping with the first semiconductor layer, the sixth conductive layer is provided in the second opening and in contact with the upper surface of the second semiconductor layer, the seventh conductive layer is provided in the third opening and in contact with the upper surface of the second semiconductor layer, and the eighth conductive layer is provided on the fourth insulating layer sandwiched between the second opening and the third opening and in a region overlapping with the second semiconductor layer.
  • the first semiconductor layer and the second semiconductor layer have a metal oxide
  • the third insulating layer has one or more of silicon oxide, silicon oxynitride, aluminum oxide, hafnium oxide, hafnium aluminate, magnesium oxide, gallium oxide, gallium zinc oxide, silicon nitride, and silicon nitride oxide
  • the fifth insulating layer has one or both of silicon oxide and silicon oxynitride.
  • the second conductive layer and the fifth conductive layer have a first material
  • the first material is preferably one or more of chromium, copper, aluminum, gold, silver, zinc, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt, molybdenum, niobium, and a metal oxide.
  • the first insulating layer has a sixth insulating layer, a seventh insulating layer on the sixth insulating layer, and an eighth insulating layer on the seventh insulating layer
  • the second insulating layer has a ninth insulating layer, a tenth insulating layer on the ninth insulating layer, and an eleventh insulating layer on the tenth insulating layer
  • the sixth insulating layer, the eighth insulating layer, the ninth insulating layer, and the eleventh insulating layer have one or more of aluminum oxide, hafnium oxide, hafnium aluminate, magnesium oxide, gallium oxide, gallium zinc oxide, silicon nitride, and silicon oxynitride
  • the seventh insulating layer and the tenth insulating layer preferably have one or both of silicon oxide and silicon oxynitride.
  • one aspect of the present invention includes forming a first conductive layer, forming a first insulating film on the first conductive layer, forming the first conductive film on the first insulating film, processing the first conductive film to form a second conductive layer on the first insulating film so as to have an area overlapping with the first conductive layer, forming a second insulating film on the second conductive layer and on the first insulating film, forming a third conductive layer in an area on the second insulating film that does not overlap with the first conductive layer and the second conductive layer, and forming a third conductive layer on the third conductive layer and on the second insulating film.
  • a first insulating layer is formed on the first insulating layer so as to have an area overlapping with the third conductive layer; a second conductive film is formed on the first insulating layer and the second insulating film; a second insulating layer, a fourth conductive layer, a third insulating layer, and a fifth conductive layer are formed by removing parts of the first insulating film, the second conductive layer, the second insulating film, and the second conductive film, the second insulating layer, and the fifth conductive layer have a first opening reaching the first conductive layer; a fourth insulating layer in contact with a side surface of the third insulating layer in the first opening and a side surface of the fifth conductive layer in the first opening, the fifth conductive layer being processed to form a sixth conductive layer having an area overlapping with the first conductive layer and the fourth conductive layer, a first semiconductor layer in contact with an upper surface of the first conductive layer in the first opening, a side surface of the fourth insulating layer in the first opening
  • This is a method for manufacturing a semiconductor device which includes forming a conductor layer, forming a third insulating film on the first semiconductor layer and the second semiconductor layer, processing the third insulating film to form a fifth insulating layer having a second opening and a third opening that reach the second semiconductor layer, and forming, on the fifth insulating layer, a seventh conductive layer that overlaps with the first semiconductor layer, an eighth conductive layer that overlaps with the second semiconductor layer and the third conductive layer, a ninth conductive layer that overlaps with the second opening, and a tenth conductive layer that overlaps with the third opening.
  • a semiconductor device having a transistor with high on-state current and a transistor with high saturation can be provided.
  • a semiconductor device or display device having a transistor with a short channel length and a transistor with a long channel length can be provided.
  • a semiconductor device or display device having a transistor with good electrical characteristics can be provided.
  • a semiconductor device or display device with a small occupation area can be provided.
  • a semiconductor device or display device with low power consumption can be provided.
  • a semiconductor device or display device having a highly reliable transistor can be provided.
  • a semiconductor device or display device with high definition can be provided.
  • a method for manufacturing a semiconductor device or display device with high productivity can be provided.
  • a semiconductor device or display device having a novel transistor, or a manufacturing method thereof can be provided.
  • FIG 1A is a plan view of an example of a semiconductor device
  • FIG 1B is a cross-sectional view of the example of the semiconductor device
  • 2A is a plan view of an example of a semiconductor device
  • FIG 2B is a cross-sectional view of the example of the semiconductor device.
  • 3A and 3B are plan and cross-sectional views illustrating an example of a semiconductor device.
  • FIG. 4 is a cross-sectional view showing an example of a semiconductor device.
  • 5A and 5B are cross-sectional views showing an example of a semiconductor device.
  • 6A and 6B are cross-sectional views showing an example of a semiconductor device.
  • 7A and 7B are cross-sectional views showing an example of a semiconductor device.
  • 8A and 8B are cross-sectional views showing an example of a semiconductor device.
  • 9A and 9B are cross-sectional views showing an example of a semiconductor device.
  • 10A to 10D are cross-sectional views showing an example of a method for manufacturing a semiconductor device.
  • 11A to 11C are cross-sectional views showing an example of a method for manufacturing a semiconductor device.
  • 12A to 12C are cross-sectional views illustrating an example of a method for manufacturing a semiconductor device.
  • 13A to 13C are cross-sectional views showing an example of a method for manufacturing a semiconductor device.
  • 14A to 14C are cross-sectional views showing an example of a method for manufacturing a semiconductor device.
  • 15A to 15C are cross-sectional views showing an example of a method for manufacturing a semiconductor device.
  • FIG. 16A to 16C are cross-sectional views showing an example of a method for manufacturing a semiconductor device.
  • Fig. 17A is a perspective view showing an example of a display device
  • Fig. 17B is a block diagram showing an example of the display device.
  • Fig. 18A is a circuit diagram of a latch circuit
  • Fig. 18B is a circuit diagram of an inverter circuit.
  • 19A and 19B are circuit diagrams of a pixel circuit
  • Fig. 19C is a cross-sectional view showing an example of a pixel circuit.
  • FIG. 20 is a circuit diagram of a pixel circuit.
  • 21A and 21B are cross-sectional views showing an example of a display device.
  • FIG. 22 is a cross-sectional view showing an example of a display device.
  • 23A to 23C are cross-sectional views showing an example of a display device.
  • 24A and 24B are cross-sectional views showing an example of a display device.
  • FIG. 25 is a cross-sectional view showing an example of a display device.
  • 26A to 26D are diagrams showing an example of an electronic device.
  • 27A to 27F are diagrams showing an example of an electronic device.
  • 28A to 28G are diagrams showing an example of an electronic device.
  • an identification number such as “_1”, “[n]”, “[m,n]” may be added to the reference number. Also, when an identification number such as “_1”, “[n]”, “[m,n]” is added to the reference number in the drawings, etc., when it is not necessary to distinguish between them in this specification, the identification number may not be added.
  • ordinal numbers “first” and “second” are used for convenience and do not limit the number of components or the order of the components (e.g., process order or stacking order).
  • an ordinal number attached to a component in one place in this specification may not match an ordinal number attached to the same component in another place in this specification or in the claims.
  • film and “layer” can be interchanged.
  • conductive layer can be changed to the term “conductive film.”
  • insulating film can be changed to the term “insulating layer.”
  • a transistor is a type of semiconductor element that can realize functions such as amplifying current or voltage, and switching operations that control conduction or non-conduction.
  • transistor includes IGFETs (Insulated Gate Field Effect Transistors) and thin film transistors (TFTs).
  • source and drain may be interchanged when transistors of different polarity are used, or when the direction of current changes during circuit operation. For this reason, in this specification and the like, the terms “source” and “drain” may be used interchangeably. Note that the source and drain of a transistor may be appropriately referred to as the source terminal and drain terminal, or the source electrode and drain electrode, etc., depending on the situation.
  • Gate and backgate can be used interchangeably. For this reason, in this specification and the like, the terms “gate” and “backgate” can be used interchangeably. Note that the gate and backgate of a transistor can be appropriately referred to as gate electrode and backgate electrode, etc., depending on the situation.
  • connection includes “electrical connection.”
  • a and B are electrically connected means that, among A and B connected without an insulator (A and B connected via a conductor or semiconductor, or A and B in contact), there is a time when an electrical signal is exchanged or a potential interaction occurs between A and B during circuit operation. In other words, even if there is a time when an electrical signal is not exchanged or a potential interaction does not occur between A and B during circuit operation, if there is a time when an electrical signal is exchanged or a potential interaction occurs between A and B, it can be said that "A and B are electrically connected.”
  • Electrical connection includes a connection that does not involve a circuit element (e.g., a transistor, but excluding wiring) (direct connection), and a connection that involves one or more circuit elements (indirect connection).
  • a circuit element e.g., a transistor, but excluding wiring
  • indirect connection includes a connection that involves one or more circuit elements
  • Examples of "A and B being electrically connected” include when A and B are connected without a circuit element, and when A and B are connected via the source and drain of one or more transistors. However, this is subject to the premise that there is a timing when an electrical signal is exchanged or potential interaction occurs between A and B.
  • a and B are connected via an insulator and therefore it cannot be said that "A and B are electrically connected" is when there is a dielectric of a capacitive element, a gate insulating film of a transistor, etc. between A and B.
  • the off-state current refers to leakage current between the source and drain when a transistor is in an off state (also referred to as a non-conducting state or a cut-off state).
  • the off-state refers to a state in which the voltage Vgs between the gate and source of an n-channel transistor is lower than the threshold voltage Vth (higher than Vth for a p-channel transistor).
  • top surface shapes roughly match means that at least a portion of the contours of the stacked layers overlap. For example, this includes cases where the upper and lower layers are processed using the same mask pattern, or where parts of the mask pattern are the same. However, strictly speaking, the contours may not overlap, and the upper layer may be located inside the lower layer, or outside the lower layer, in which case it may also be said that “top surface shapes roughly match.” Furthermore, when the top surface shapes match or roughly match, it can also be said that the ends match or roughly match, or that the ends are aligned or roughly aligned.
  • a tapered shape refers to a shape in which at least a portion of the side of the structure is inclined with respect to the substrate surface or the surface to be formed.
  • the side of the structure, the substrate surface, and the surface to be formed do not necessarily need to be completely flat, and may be approximately planar with a slight curvature, or approximately planar with fine irregularities.
  • a device manufactured using a metal mask or an FMM may be referred to as a device with an MM (metal mask) structure.
  • a device manufactured without using a metal mask or an FMM may be referred to as a device with an MML (metal maskless) structure.
  • devices with an MML structure can be manufactured without using a metal mask, they can exceed the upper limit of fineness resulting from the alignment accuracy of the metal mask.
  • devices with an MML structure can eliminate the need for equipment related to the manufacturing of metal masks and the process of cleaning the metal masks.
  • devices with an MML structure are suitable for mass production because they make it possible to keep manufacturing costs low.
  • SBS Side By Side
  • the SBS structure allows the materials and configuration to be optimized for each light-emitting element, which increases the freedom to select materials and configurations and makes it easier to improve brightness and reliability.
  • holes or electrons may be referred to as "carriers".
  • the hole injection layer or electron injection layer may be referred to as the "carrier injection layer”
  • the hole transport layer or electron transport layer may be referred to as the “carrier transport layer”
  • the hole block layer or electron block layer may be referred to as the "carrier block layer”.
  • the above-mentioned carrier injection layer, carrier transport layer, and carrier block layer may not be clearly distinguishable from each other due to their cross-sectional shapes or characteristics.
  • one layer may have two or three functions among the carrier injection layer, carrier transport layer, and carrier block layer.
  • the light-emitting element has an EL layer between a pair of electrodes.
  • the EL layer has at least a light-emitting layer.
  • the layers (also called functional layers) that the EL layer has include a light-emitting layer, a carrier injection layer (hole injection layer and electron injection layer), a carrier transport layer (hole transport layer and electron transport layer), a carrier block layer (hole block layer and electron block layer), etc.
  • the light-receiving element also called a light-receiving device
  • one of the pair of electrodes may be referred to as a pixel electrode, and the other as a common electrode.
  • the sacrificial layer (which may also be referred to as a mask layer) is located at least above the light-emitting layer (more specifically, the layer that is processed into an island shape among the layers that make up the EL layer) and has the function of protecting the light-emitting layer during the manufacturing process.
  • island-like refers to a state in which two or more layers made of the same material and formed in the same process are physically separated.
  • a step disconnection refers to a phenomenon in which a layer, film, or electrode is disconnected due to the shape of the surface on which it is formed (e.g., a step, etc.).
  • One aspect of the present invention is a semiconductor device having a first transistor and a second transistor.
  • the first transistor is a vertical transistor in which the source electrode and the drain electrode are provided at different heights relative to the substrate surface.
  • the second transistor is a planar transistor in which the source electrode and the drain electrode are provided on the same plane.
  • the first transistor and the second transistor each have two gate electrodes provided to sandwich a semiconductor layer.
  • the first transistor has a channel length that corresponds to the height direction (vertical direction) relative to the substrate surface, so the channel length can be determined by controlling the film thickness of the insulating layer sandwiched between the source electrode and the drain electrode.
  • This makes it possible to realize a transistor with an extremely short channel length that is equal to or less than the minimum dimension that can be exposed by the exposure device used to manufacture the transistor (hereinafter also referred to as the minimum dimension).
  • This makes it possible to precisely realize a fine transistor with a large on-current.
  • the transistor since the transistor has two gate electrodes that are arranged to sandwich the semiconductor layer, it is easier to control the threshold voltage than when there is only one gate electrode. Therefore, even when the channel length is extremely short, the adverse effects of the short channel effect can be suppressed.
  • the second transistor (planar transistor) has a channel length direction that is roughly parallel to the substrate surface, so the channel length can be determined by the exposure performance of the exposure equipment used to fabricate the transistor. Therefore, the channel length can be made longer than the minimum dimension of the exposure equipment, and a transistor with high saturation can be realized.
  • the transistor since the transistor has two gate electrodes arranged to sandwich the semiconductor layer, the saturation can be further improved compared to the case where only one gate electrode is provided.
  • the semiconductor device of one embodiment of the present invention has two transistors each having different characteristics over the same substrate.
  • a first transistor can be applied to a transistor constituting a driver circuit of the display device
  • a second transistor can be applied to a transistor constituting a pixel circuit.
  • both the first transistor and the second transistor can be applied to a transistor constituting a pixel circuit.
  • Fig. 1A shows a plan view (also referred to as a top view) of the semiconductor device 10.
  • Fig. 1B shows a cross-sectional view taken along dashed line A1-A2 shown in Fig. 1A.
  • Fig. 1A omits some of the components of the semiconductor device 10 (insulating layers, etc.). As with Fig. 1A, some of the components are omitted from the plan views of the semiconductor device in the following drawings.
  • the semiconductor device 10 includes a transistor 100, a transistor 200, an insulating layer 110, and an insulating layer 109.
  • the transistors 100 and 200 are provided on a substrate 102.
  • the transistors 100 and 200 have different structures.
  • the transistors 100 and 200 can be formed using some common processes.
  • the transistor 100 includes a conductive layer 104, an insulating layer 106, a semiconductor layer 108, a conductive layer 116, an insulating layer 110s, a conductive layer 112a, and a conductive layer 112b.
  • the conductive layer 104 functions as a gate electrode (also referred to as a first gate electrode), and a part of the insulating layer 106 functions as a gate insulating layer (also referred to as a first gate insulating layer).
  • the conductive layer 116 functions as a back gate electrode (also referred to as a second gate electrode), and a part of the insulating layer 110s functions as a back gate insulating layer (also referred to as a second gate insulating layer).
  • the conductive layer 112a functions as one of a source electrode and a drain electrode, and the conductive layer 112b functions as the other of the source electrode and the drain electrode.
  • Each layer constituting the transistor 100 can have a single layer structure or a stacked structure
  • the transistor 200 has a conductive layer 204, a conductive layer 212a, a conductive layer 212b, an insulating layer 106, a semiconductor layer 208, an insulating layer 120, and a conductive layer 202.
  • the conductive layer 204 functions as a gate electrode (also referred to as a first gate electrode), and another part of the insulating layer 106 functions as a gate insulating layer (also referred to as a first gate insulating layer).
  • the conductive layer 202 functions as a back gate electrode (also referred to as a second gate electrode), and a part of the insulating layer 120 functions as a back gate insulating layer (also referred to as a second gate insulating layer).
  • the conductive layer 212a functions as one of a source electrode or a drain electrode, and the conductive layer 212b functions as the other of the source electrode or the drain electrode.
  • Each layer constituting the transistor 200 can have a single layer structure or a stacked structure. Note that the transistor 200 may be configured without the conductive layer 202.
  • An insulating layer 195 is provided to cover the transistors 100 and 200.
  • the insulating layer 195 functions as a protective layer for the transistors 100 and 200.
  • the conductive layer 112a is provided on the substrate 102.
  • an insulating layer 110a, an insulating layer 110b, and an insulating layer 110c are provided by stacking them in this order.
  • the insulating layer 110a has an area that contacts the upper surface and side surfaces of the conductive layer 112a and the upper surface of the substrate 102. It can also be said that the insulating layers 110a, 110b, and 110c are provided so as to cover the upper surface and side surfaces of the conductive layer 112a.
  • a conductive layer 116 is provided on the insulating layer 110c.
  • the conductive layer 116 has an area that overlaps with the conductive layer 112a via the insulating layers 110a, 110b, and 110c.
  • Insulating layer 110d, insulating layer 110e, and insulating layer 110f are stacked in this order on insulating layer 110c and conductive layer 116.
  • Insulating layer 110d has an area that contacts the upper and side surfaces of conductive layer 116 and the upper surface of insulating layer 110c. It can also be said that insulating layer 110d, insulating layer 110e, and insulating layer 110f are provided so as to cover the upper and side surfaces of conductive layer 116. It can also be said that conductive layer 116 is sandwiched between insulating layer 110a, insulating layer 110b, and insulating layer 110c and insulating layer 110d, insulating layer 110e, and insulating layer 110f.
  • insulating layer 110a, insulating layer 110b, insulating layer 110c, insulating layer 110d, insulating layer 110e, and insulating layer 110f may be collectively referred to as insulating layer 110.
  • a conductive layer 112b is provided on the insulating layer 110f.
  • the conductive layer 112b has an area that overlaps with the conductive layer 116 through the insulating layer 110d, the insulating layer 110e, and the insulating layer 110f.
  • the conductive layer 112b also has an area that overlaps with the conductive layer 112a through the insulating layer 110 and the conductive layer 116. It can also be said that the insulating layer 110 and the conductive layer 116 have an area sandwiched between the conductive layer 112a and the conductive layer 112b.
  • the insulating layer 110, the conductive layer 116, and the conductive layer 112b have an opening 143 that reaches the conductive layer 112a in the area that overlaps with the conductive layer 112a.
  • the conductive layer 112a is exposed in the opening 143.
  • the insulating layer 110s is provided so as to cover the sidewall of the opening 143. Within the opening 143, the insulating layer 110s has an area in contact with the side of the insulating layer 110, the side of the conductive layer 116, and the side of the conductive layer 112b. In addition, in a cross-sectional view, the upper end of the insulating layer 110s has a curved shape.
  • the insulating layer 110s may be called a sidewall, a sidewall insulating layer, a sidewall protective layer, or the like.
  • the semiconductor layer 108 is provided so as to cover the opening 143 via the insulating layer 110s.
  • the semiconductor layer 108 has an area in contact with the upper surface of the conductive layer 112a, the side surface of the insulating layer 110s, and the curved portion of the insulating layer 110s within the opening 143, and has an area in contact with the upper surface of the conductive layer 112b outside the opening 143.
  • the semiconductor layer 108 has a shape that follows the shapes of the upper surface of the conductive layer 112b, the curved portion of the insulating layer 110s, the side surface of the insulating layer 110s, and the upper surface of the conductive layer 112a.
  • the semiconductor layer 108 has an area that overlaps with the conductive layer 112a via the conductive layer 112b, the conductive layer 116, and the insulating layer 110. It can also be said that the semiconductor layer 108 faces the side surface of the insulating layer 110, the side surface of the conductive layer 116, and the side surface of the conductive layer 112b within the opening 143 via the insulating layer 110s.
  • the semiconductor layer 108 has a region in contact with the conductive layer 112a and a region in contact with the conductive layer 112b, and is connected to these.
  • the region of the semiconductor layer 108 in contact with the conductive layer 112a functions as one of the source region and the drain region, and the region in contact with the conductive layer 112b functions as the other of the source region and the drain region.
  • a channel formation region is provided between the source region and the drain region.
  • the semiconductor layer 108 can also be configured to extend to and cover the side surface of the conductive layer 112b on the side that does not face the opening 143. This increases the contact area between the semiconductor layer 108 and the conductive layer 112b, thereby reducing the contact resistance between the semiconductor layer 108 and the conductive layer 112b and increasing the on-current of the transistor 100.
  • the end of the semiconductor layer 108 can be configured to extend further outward than the above and contact the top surface of the insulating layer 110.
  • the insulating layer 106 is provided so as to cover the opening 143 via the insulating layer 110s and the semiconductor layer 108.
  • the insulating layer 106 is provided on the semiconductor layer 108, the conductive layer 112b, and the insulating layer 110.
  • the insulating layer 106 has an area that contacts the upper surface and side surfaces of the semiconductor layer 108, the upper surface and side surfaces of the conductive layer 112b, and the upper surface of the insulating layer 110.
  • the insulating layer 106 has a shape that follows the shapes of the upper surface and side surfaces of the semiconductor layer 108, the upper surface and side surfaces of the conductive layer 112b, and the upper surface of the insulating layer 110.
  • the conductive layer 104 is provided on the insulating layer 106, and has a region in contact with the upper surface of the insulating layer 106.
  • the conductive layer 104 has a region that overlaps with the semiconductor layer 108 via the insulating layer 106.
  • the conductive layer 104 also has a region that faces the semiconductor layer 108 via the insulating layer 106 within the opening 143.
  • FIG. 1B and other figures show an example in which a part of the conductive layer 104 is provided so as to be embedded in the opening 143.
  • the conductive layer 104 may have a shape that follows the shape of the upper surface of the insulating layer 106.
  • the source electrode and the drain electrode are located at different heights with respect to the surface of the substrate 102 on which they are formed, and the drain current flows in a direction perpendicular to or approximately perpendicular to the surface of the substrate 102. It can also be said that the drain current flows vertically or approximately vertically in the transistor 100. Therefore, the transistor of one embodiment of the present invention can be called a vertical transistor, a vertical channel transistor, or a VFET (Vertical Field Effect Transistor).
  • VFET Very Field Effect Transistor
  • the channel length of the transistor 100 can be controlled by the thickness of the conductive layer 116 and the insulating layer 110 provided between the conductive layer 112a and the conductive layer 112b. Therefore, a transistor having a channel length smaller than the minimum dimension of an exposure device used to manufacture the transistor can be manufactured with high precision. This also reduces the characteristic variation among the multiple transistors 100. This makes it possible to stabilize the operation of a semiconductor device including the transistor 100 and to improve its reliability. Furthermore, the reduced characteristic variation increases the degree of freedom in circuit design and allows the operating voltage of the semiconductor device to be reduced. This allows the power consumption of the semiconductor device to be reduced.
  • the transistor 100 can have a source electrode, a layer having a channel formation region, and a drain electrode stacked on top of each other, so the area it occupies can be significantly reduced compared to a so-called planar type transistor in which the layer having the channel formation region is arranged in a planar shape.
  • the conductive layer 112a, the conductive layer 112b, the conductive layer 116, and the conductive layer 104 can each function as wiring, and the transistor 100 can be provided in a region where these wirings overlap. That is, in a circuit having the transistor 100 and the wiring, the area occupied by the transistor 100 and the wiring can be reduced. Therefore, the area occupied by the circuit can be reduced, and a small-sized semiconductor device can be obtained.
  • a step may be formed between the conductive layer 116 and the insulating layer 110, and the conductive layer 112a, and the semiconductor layer 108, the insulating layer 106, and the conductive layer 104 may be provided along the step.
  • one surface of the semiconductor layer 108 faces the conductive layer 104 through the insulating layer 106, and the other surface of the semiconductor layer 108 faces the conductive layer 116 through the insulating layer 110s.
  • the conductive layer 104 functions as a gate electrode, and the conductive layer 116 functions as a backgate electrode.
  • the potential of the backgate electrode can be the same as that of the gate electrode (conductive layer 104). By applying a potential to the backgate electrode that turns on the transistor 100, the field effect mobility of the transistor 100 can be increased. In addition, the threshold voltage of the transistor 100 can be changed by changing the potential of the backgate electrode. Alternatively, the potential of the backgate electrode can be set to ground potential or any potential. This allows the potential of the region of the semiconductor layer 108 facing the backgate electrode to be fixed, thereby suppressing variation in the electrical characteristics of the transistor 100.
  • the potential of the back gate electrode can also be the same as that of the source electrode or drain electrode (conductive layer 112a or conductive layer 112b).
  • the backgate electrode and the gate electrode can be connected to each other and made conductive.
  • the backgate electrode and the source electrode or the drain electrode can be connected to each other and made conductive.
  • a common wiring may be provided to connect the backgate electrodes of multiple transistors 100, and a potential may be applied to the common wiring.
  • the transistor 100 can be a transistor with an extremely short channel length. Therefore, it can be said that the transistor is one in which the short channel effect is likely to become apparent.
  • the transistor 100 By providing the transistor 100 with a backgate electrode, it becomes easier to control the threshold voltage than when the transistor 100 does not have a backgate electrode, and it is possible to suppress the short channel effect from becoming apparent.
  • FIGS. 1A and 1B Enlarged views of the transistor 200 shown in FIGS. 1A and 1B are shown in FIGS. 3A and 3B, respectively. Also, an enlarged cross-sectional view of the dashed line B1-B2 shown in FIG. 1A is shown in FIG. 4.
  • the insulating layer 109 is provided on the insulating layer 110.
  • the conductive layer 202 is provided on the insulating layer 109.
  • the insulating layer 109 is provided over the entire area in which the conductive layer 202 is provided. In a plan view, it is preferable that the insulating layer 109 includes the conductive layer 202. The end of the conductive layer 202 contacts the upper surface of the insulating layer 109.
  • An insulating layer 120 is provided on the conductive layer 202.
  • the insulating layer 120 has an area that contacts the upper and side surfaces of the conductive layer 202 and the upper surface of the insulating layer 109. In other words, the conductive layer 202 is surrounded by the insulating layer 109 and the insulating layer 120.
  • the end of the insulating layer 120 coincides or approximately coincides with the end of the insulating layer 109. It can also be said that the top surface shape of the insulating layer 120 coincides or approximately coincides with the top surface shape of the insulating layer 109.
  • a first insulating film that will become the insulating layer 109 is formed, a conductive layer 202 is formed on the first insulating film, and a second insulating film that will become the insulating layer 120 is formed on the first insulating film and the conductive layer 202.
  • the insulating layer 120 and the insulating layer 109 whose ends coincide or approximately coincide can be formed.
  • the productivity of the semiconductor device 10 can be increased and the manufacturing cost can be reduced.
  • a configuration in which the first insulating film and the second insulating film are processed in the same process is shown, but one embodiment of the present invention is not limited to this.
  • the first insulating film and the second insulating film can also be processed in different processes.
  • the ends of insulating layer 120 and insulating layer 109 may be configured to coincide or not coincide with each other.
  • 1B and other figures show an example in which the thickness of the insulating layer 110 is uniform regardless of location, but one embodiment of the present invention is not limited to this.
  • a configuration in which the thickness is different between an area of the insulating layer 110 that overlaps with one or more of the insulating layers 120 and 109 and an area that does not overlap with either the insulating layer 120 or the insulating layer 109 may be used.
  • a part of the insulating layer 110 may be removed, so that the thickness of the area of the insulating layer 110 that does not overlap with either the insulating layer 120 or the insulating layer 109 may become thinner than the thickness of the area that overlaps with one or more of the insulating layers 120 and 109.
  • the semiconductor layer 208 is provided on the insulating layer 120.
  • the semiconductor layer 208 has a region that overlaps with the conductive layer 202 via the insulating layer 120.
  • the same material as the semiconductor layer 108 can be used for the semiconductor layer 208.
  • the semiconductor layer 208 can be formed in the same process as the semiconductor layer 108.
  • the semiconductor layer 108 and the semiconductor layer 208 can be formed by forming a film that will become the semiconductor layer 108 and the semiconductor layer 208 and processing the film.
  • the insulating layer 120 is preferably provided at least in a region overlapping with the channel formation region of the transistor 200. Furthermore, as described above, it is preferable that the end of the insulating layer 120 coincides or approximately coincides with the end of the insulating layer 109. Also, FIG. 1B and the like show a configuration in which the end of the insulating layer 109 contacts the upper surface of the insulating layer 110.
  • the semiconductor layer 208 covers the side surfaces of the insulating layer 120 and the insulating layer 109. In other words, the semiconductor layer 208 has a portion that protrudes beyond the ends of the insulating layer 120 and the insulating layer 109. The end of the semiconductor layer 208 contacts the upper surface of the insulating layer 110.
  • the insulating layer 120 can be provided over the entire region in which the semiconductor layer 208 is provided, and the entire lower surface of the semiconductor layer 208 contacts the upper surface of the insulating layer 120.
  • An insulating layer 106 is provided on the semiconductor layer 208.
  • a portion of the insulating layer 106 (a region overlapping with the opening 143) functions as a gate insulating layer for the transistor 100, and another portion of the insulating layer 106 (a region overlapping with the conductive layer 202) functions as a gate insulating layer for the transistor 200.
  • the insulating layer 106 has an opening 147a and an opening 147b in a region overlapping with the semiconductor layer 208.
  • the opening 147a and the opening 147b are provided to sandwich the region of the insulating layer 106 that functions as the gate insulating layer for the transistor 200.
  • Conductive layer 204, conductive layer 212a, and conductive layer 212b are provided on insulating layer 106.
  • Conductive layer 204 has a region that overlaps with semiconductor layer 208 through insulating layer 106 located in the region between openings 147a and 147b.
  • Conductive layer 204 also has a region that overlaps with conductive layer 202 through semiconductor layer 208.
  • Conductive layer 212a and conductive layer 212b are provided so as to cover a part of opening 147a and opening 147b, respectively.
  • Conductive layer 212a has a region that contacts the upper surface of semiconductor layer 208 in opening 147a
  • conductive layer 212b has a region that contacts the upper surface of semiconductor layer 208 in opening 147b.
  • Semiconductor layer 208 is connected to conductive layer 212a and conductive layer 212b.
  • the conductive layer 204, the conductive layer 212a, and the conductive layer 212b can be formed using the same material as the conductive layer 104.
  • the conductive layer 204, the conductive layer 212a, and the conductive layer 212b can be formed in the same process as the conductive layer 104.
  • the conductive layer 104, the conductive layer 204, the conductive layer 212a, and the conductive layer 212b can be formed by forming a film that will become the conductive layer 104, the conductive layer 204, the conductive layer 212a, and the conductive layer 212b, and processing the film.
  • the conductive layer 202 which functions as the backgate electrode of the transistor 200, preferably extends beyond the end of the region where the conductive layer 204 and the semiconductor layer 208 overlap in the channel length direction (see FIG. 3B).
  • the size of the conductive layer 202 is preferably larger than the size of the region where the conductive layer 204 and the semiconductor layer 208 overlap in the channel length direction.
  • the conductive layer 202 preferably has a portion that protrudes beyond the end of the conductive layer 204 in the channel length direction.
  • the portion of the semiconductor layer 208 that overlaps with at least one of the conductive layer 204 and the conductive layer 202 functions as a channel formation region.
  • the semiconductor layer 208 has a pair of regions 208L that sandwich the channel formation region, and a pair of regions 208D on the outer side thereof. Note that, for ease of explanation, the portion of the semiconductor layer 208 that overlaps with the conductive layer 204 may be referred to as the channel formation region, but the portion that does not overlap with the conductive layer 204 and overlaps with the conductive layer 202 (the portion including the region 208L and the region 208D) can also function as a channel formation region.
  • Region 208L and region 208D contain an impurity element.
  • the impurity element may be one or more of hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, arsenic, aluminum, magnesium, silicon, and a noble gas.
  • noble gases include helium, neon, argon, krypton, and xenon. It is particularly preferable to use one or more of boron, phosphorus, aluminum, magnesium, and silicon as the impurity element.
  • an impurity element is supplied (also referred to as added or injected) to the semiconductor layer 208.
  • a region 208D is formed in a region of the semiconductor layer 208 that does not overlap with any of the conductive layer 204, the conductive layer 212a, the conductive layer 212b, and the insulating layer 106
  • a region 208L is formed in a region that does not overlap with any of the conductive layer 204, the conductive layer 212a, and the conductive layer 212b and overlaps with the insulating layer 106.
  • the region of the semiconductor layer 208 that contacts the conductive layer 212a and the region 208D adjacent to this region function as either the source region or the drain region.
  • the region of the semiconductor layer 208 that contacts the conductive layer 212b and the region 208D adjacent to this region function as the other of the source region or the drain region.
  • Transistor 200 is a planar type transistor in which semiconductor layer 208 is arranged in a plane. It is also a so-called top-gate type transistor that has a gate electrode above semiconductor layer 208. For example, by supplying impurity elements to semiconductor layer 208 using conductive layer 204, which functions as a gate electrode, as a mask, it is possible to form regions 208D that function as source and drain regions in a self-aligned manner. Transistor 200 can be called a TGSA (Top Gate Self-Aligned) type transistor.
  • TGSA Top Gate Self-Aligned
  • the channel length of the transistor 200 can be controlled by the length of the conductive layer 204. Therefore, the channel length of the transistor 200 is equal to or greater than the minimum dimension of an exposure device used to manufacture the transistor. In other words, the channel length of the transistor 200 can be made longer than the channel length of the transistor 100. By making the channel length longer, a transistor with high saturation properties can be obtained.
  • the transistor 100 with a short channel length and the transistor 200 with a long channel length can be formed on the same substrate by sharing some of the processes.
  • a high-performance semiconductor device can be obtained by applying the transistor 100 to a transistor that requires a large on-current and the transistor 200 to a transistor that requires high saturation.
  • a semiconductor device of one embodiment of the present invention when a semiconductor device of one embodiment of the present invention is applied to a pixel circuit of a display device, the area occupied by the pixel circuit can be reduced, and a high-definition display device can be obtained.
  • a semiconductor device of one embodiment of the present invention when a semiconductor device of one embodiment of the present invention is applied to a driver circuit of a display device (e.g., one or both of a gate line driver circuit and a source line driver circuit), the area occupied by the driver circuit can be reduced, and a display device with a narrow frame can be obtained.
  • transistor 100 and transistor 200 The detailed configuration of transistor 100 and transistor 200 will be described.
  • the semiconductor material used for the semiconductor layer 108 and the semiconductor layer 208 is not particularly limited.
  • a semiconductor made of a single element or a compound semiconductor can be used.
  • semiconductors made of a single element include silicon and germanium.
  • compound semiconductors include gallium arsenide and silicon germanium.
  • Other examples of compound semiconductors include organic semiconductors, nitride semiconductors, and oxide semiconductors (OS: oxide semiconductor). Note that these semiconductor materials may contain impurities as dopants.
  • the crystallinity of the semiconductor material used for the semiconductor layer 108 and the semiconductor layer 208 is not particularly limited, and any of an amorphous semiconductor, a single crystal semiconductor, and a semiconductor having crystallinity other than single crystal (a microcrystalline semiconductor, a polycrystalline semiconductor, or a semiconductor having a crystalline region in part) can be used.
  • the use of a single crystal semiconductor or a semiconductor having crystallinity is preferable because it can suppress deterioration of the transistor characteristics.
  • Silicon can be used for the semiconductor layer 108 and the semiconductor layer 208.
  • Examples of silicon include single crystal silicon, polycrystalline silicon, microcrystalline silicon, and amorphous silicon.
  • Examples of polycrystalline silicon include low temperature polysilicon (LTPS).
  • Transistors using amorphous silicon in the channel formation region can be formed on a large glass substrate and can be manufactured at low cost. Transistors using polycrystalline silicon in the channel formation region have high field effect mobility and can operate at high speed. Furthermore, transistors using microcrystalline silicon in the channel formation region have higher field effect mobility and can operate at high speed than transistors using amorphous silicon.
  • the semiconductor layer 108 and the semiconductor layer 208 each preferably contain a metal oxide (also called an oxide semiconductor) that exhibits semiconductor properties.
  • a metal oxide also called an oxide semiconductor
  • the band gap of the metal oxide used in the semiconductor layer 108 and the semiconductor layer 208 is preferably 2.0 eV or more, and more preferably 2.5 eV or more.
  • the band gap of metal oxides can be evaluated by optical evaluation using a spectrophotometer, spectroscopic ellipsometry, photoluminescence, X-ray photoelectron spectroscopy (XPS: X-ray Photoelectron Spectrometry or ESCA: Electron Spectrometry for Chemical Analysis), or X-ray absorption fine structure (XAFS: X-ray Absorption Fine Structure). Analysis can also be performed by combining multiple of these techniques.
  • the electron affinity or conduction band lower end can be determined from the ionization potential, which is the difference in energy between the vacuum level and the upper end of the valence band, and the band gap. Ionization potential can be evaluated, for example, using ultraviolet photoelectron spectroscopy (UPS: Ultraviolet Photoelectron Spectrometry).
  • OS transistors have extremely high field-effect mobility compared to transistors using amorphous silicon.
  • OS transistors have an extremely small off-state current and can retain charge accumulated in a capacitor connected in series with the transistor for a long period of time.
  • the use of OS transistors can reduce the power consumption of a semiconductor device.
  • the insulating layer 110 one or both of an inorganic insulating layer and an organic insulating layer can be used.
  • examples of materials that can be used for the organic insulating layer include acrylic resin and polyimide resin.
  • the insulating layer 110 has one or more inorganic insulating layers. Examples of materials that can be used for the inorganic insulating layer include oxides, nitrides, oxynitrides, and nitride oxides.
  • oxides include silicon oxide, aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, cerium oxide, gallium zinc oxide, and hafnium aluminate.
  • nitrides include silicon nitride and aluminum nitride.
  • oxynitrides include silicon oxynitride, aluminum oxynitride, gallium oxynitride, yttrium oxynitride, and hafnium oxynitride.
  • nitride oxides include silicon nitride oxide and aluminum nitride oxide.
  • an oxynitride refers to a material whose composition contains more oxygen than nitrogen.
  • An oxynitride refers to a material whose composition contains more nitrogen than oxygen.
  • the insulating layer 110 preferably has a laminated structure.
  • FIG. 1B and other figures show an example in which the insulating layer 110 has an insulating layer 110a, an insulating layer 110b on the insulating layer 110a, an insulating layer 110c on the insulating layer 110b, an insulating layer 110d on the insulating layer 110c, an insulating layer 110e on the insulating layer 110d, and an insulating layer 110f on the insulating layer 110e.
  • the insulating layers 110a, 110b, 110c, 110d, 110e, and 110f can each be made of a material that can be used for the insulating layer 110.
  • sputtering or plasma enhanced chemical vapor deposition can be preferably used to form the insulating layers 110a, 110b, 110c, 110d, 110e, and 110f.
  • the flow rate of the hydrogen-containing gas e.g., hydrogen gas and ammonia gas
  • the partial pressure of the gas in the processing chamber of the deposition apparatus is low. This can reduce the hydrogen content contained in the insulating layers 110a, 110b, 110c, 110d, 110e, and 110f.
  • the hydrogen content contained in these layers can be extremely reduced.
  • sputtering can be preferably used.
  • insulating layer 110a, insulating layer 110b, insulating layer 110c, insulating layer 110d, insulating layer 110e, and insulating layer 110f By reducing the hydrogen content in insulating layer 110a, insulating layer 110b, insulating layer 110c, insulating layer 110d, insulating layer 110e, and insulating layer 110f, it is possible to suppress the supply of hydrogen to the channel formation region of semiconductor layer 108, and stabilize the electrical characteristics of transistor 100.
  • the insulating layer 110s has a region in contact with the semiconductor layer 108.
  • a region in contact with the insulating layer 110s can function as a channel formation region. Therefore, when a metal oxide is used for the semiconductor layer 108, the insulating layer 110s preferably contains oxygen. This can improve the interface characteristics between the semiconductor layer 108 and the insulating layer 110s.
  • the insulating layer 110s releases oxygen by heat applied during the manufacturing process of the transistor 100, so that oxygen can be supplied to the semiconductor layer 108.
  • the transistor 100 can have good electrical characteristics and high reliability.
  • the insulating layer 110s for example, one or more of an oxide and an oxynitride that can be used for the insulating layer 110 can be preferably used.
  • the insulating layer 110s preferably contains silicon and oxygen, and one or both of silicon oxide and silicon oxynitride can be preferably used.
  • the insulating layer 110b sandwiched between the insulating layers 110a and 110c, and the insulating layer 110e sandwiched between the insulating layers 110d and 110f preferably contain oxygen.
  • both the oxygen contained in the insulating layer 110s and the oxygen contained in the insulating layers 110b and 110e can be supplied to the channel formation region of the semiconductor layer 108, thereby further improving the reliability of the transistor 100.
  • oxygen can be supplied to the insulating layer 110s, insulating layer 110b, or insulating layer 110e by performing heat treatment in an oxygen-containing atmosphere or plasma treatment in an oxygen-containing atmosphere on the insulating layer.
  • oxygen can be supplied to the insulating layer by forming an oxide film on the upper surface of the insulating layer 110b or insulating layer 110e by a sputtering method in an oxygen-containing atmosphere. The oxide film may then be removed. Note that a method for supplying oxygen to the insulating layer 110b, etc. will be described in embodiment 2.
  • substances e.g., atoms, molecules, and ions
  • the diffusion coefficient of the substance in the insulating layers 110s, 110b, and 110e is large.
  • oxygen is easily diffused in the insulating layers 110s, 110b, and 110e.
  • the diffusion coefficient of oxygen in the insulating layers 110s, 110b, and 110e is large.
  • the oxygen contained in the insulating layer 110s diffuses in the insulating layer 110s and is supplied to the semiconductor layer 108 through the interface between the insulating layer 110s and the semiconductor layer 108.
  • the oxygen contained in the insulating layer 110b diffuses in the insulating layer 110b and is supplied to the insulating layer 110s, and is supplied to the semiconductor layer 108 through the interface between the insulating layer 110s and the semiconductor layer 108.
  • oxygen contained in the insulating layer 110e diffuses through the insulating layer 110e and is supplied to the insulating layer 110s, and is then supplied to the semiconductor layer 108 through the interface between the insulating layer 110s and the semiconductor layer 108.
  • the oxygen contained in the insulating layer can be efficiently supplied to the semiconductor layer 108 (particularly the channel formation region).
  • the region in contact with the conductive layer 112a of the semiconductor layer 108 functions as one of the source region and drain region of the transistor 100, and the region in contact with the conductive layer 112b of the semiconductor layer 108 functions as the other of the source region and drain region.
  • the source region and drain region are regions with lower electrical resistance than the channel formation region.
  • the source region and drain region can also be said to be regions with a higher carrier concentration and a higher oxygen defect density than the channel formation region.
  • the insulating layer 110a is provided between the conductive layer 112a and the insulating layer 110b.
  • the insulating layer 110c is provided between the insulating layer 110b and the conductive layer 116.
  • the insulating layer 110d is provided between the conductive layer 116 and the insulating layer 110e.
  • the insulating layer 110f is provided between the insulating layer 110e and the conductive layer 112b. It is preferable that the insulating layer 110a, the insulating layer 110c, the insulating layer 110d, and the insulating layer 110f each release a small amount of impurities (e.g., hydrogen and water).
  • impurities e.g., hydrogen and water
  • the insulating layer 110a, the insulating layer 110c, the insulating layer 110d, and the insulating layer 110f each are difficult for substances to permeate. It can also be said that the insulating layer 110a, the insulating layer 110c, the insulating layer 110d, and the insulating layer 110f function as a barrier film. Specifically, it is preferable that the insulating layer 110a, the insulating layer 110c, the insulating layer 110d, and the insulating layer 110f are each impermeable to impurities.
  • the transistor 100 can have good electrical characteristics and high reliability.
  • a material through which oxygen does not easily permeate for each of the insulating layers 110a, 110c, 110d, and 110f can suppress the oxygen contained in the insulating layer 110b and the oxygen contained in the insulating layer 110e from diffusing to the conductive layer 112a through the insulating layer 110a and the insulating layer 110d, respectively. Similarly, it can suppress the oxygen contained in the insulating layer 110b and the oxygen contained in the insulating layer 110e from diffusing to the conductive layer 112b through the insulating layer 110c and the insulating layer 110f, respectively.
  • the transistor 100 can have good electrical characteristics and high reliability.
  • the conductive layer 112a can be prevented from being oxidized by the oxygen contained in the insulating layer 110b and the oxygen contained in the insulating layer 110e, and the electrical resistance of the conductive layer 112a can be prevented from being increased.
  • the conductive layer 112b can be prevented from being oxidized by the oxygen contained in the insulating layer 110b and the oxygen contained in the insulating layer 110e, and the electrical resistance of the conductive layer 112b can be prevented from being increased.
  • the transistor 100 can have a large on-state current.
  • a barrier film refers to a film that has barrier properties.
  • Barrier properties refer to one or both of the function of suppressing the diffusion of a target substance (also called low permeability) and the function of capturing or fixing the substance (also called gettering).
  • a target substance also called low permeability
  • gettering the function of capturing or fixing the substance
  • an insulating layer that has barrier properties can be called a barrier insulating layer.
  • insulating layer 110a, insulating layer 110c, insulating layer 110d, and insulating layer 110f that function as a barrier film one or more of, for example, an oxide having one or both of aluminum and hafnium, an oxide having magnesium, an oxide having gallium, a nitride having silicon, and a nitride oxide having silicon can be used.
  • the insulating layer 110a, insulating layer 110c, insulating layer 110d, and insulating layer 110f one or more of, for example, aluminum oxide, hafnium oxide, hafnium aluminate, magnesium oxide, gallium oxide, gallium zinc oxide, silicon nitride, and silicon nitride oxide can be preferably used.
  • the same material can be used for each of the insulating layers 110a, insulating layer 110c, insulating layer 110d, and insulating layer 110f. By using the same material, the equipment used to form each insulating layer can be shared, thereby increasing productivity and reducing manufacturing costs.
  • different materials can be used for insulating layer 110a, insulating layer 110c, insulating layer 110d, and insulating layer 110f.
  • different materials refer to materials in which some or all of the constituent elements are different, or materials in which the constituent elements are the same but the composition is different.
  • insulating layers 110a, 110c, 110d, and 110f are formed by a method that does not use a gas containing hydrogen.
  • a sputtering method can be suitably used to form insulating layers 110a, 110c, 110d, and 110f.
  • insulating layers 110a, 110c, 110d, and 110f one or more of aluminum oxide, hafnium oxide, hafnium aluminate, magnesium oxide, gallium oxide, and gallium zinc oxide can be particularly suitably used, respectively.
  • the insulating layer 110c provided on the insulating layer 110b and the insulating layer 110f provided on the insulating layer 110e are preferably formed in an atmosphere containing oxygen. This allows oxygen to be supplied to the insulating layer 110b when the insulating layer 110c is formed. Similarly, oxygen can be supplied to the insulating layer 110e when the insulating layer 110f is formed. A material containing oxygen can be particularly preferably used for the insulating layer 110c and the insulating layer 110f.
  • oxygen flow rate ratio the ratio of the flow rate of oxygen gas to the total film-forming gas used to form the insulating layer 110c
  • the oxygen partial pressure in the processing chamber of the film-forming apparatus the more efficiently oxygen can be supplied to the insulating layer 110b.
  • each of insulating layer 110a and insulating layer 110d is preferably 3 nm or more and 500 nm or less, more preferably 5 nm or more and 400 nm or less, more preferably 10 nm or more and 300 nm or less, more preferably 20 nm or more and 300 nm or less, more preferably 50 nm or more and 300 nm or less, more preferably 100 nm or more and 300 nm or less, more preferably 100 nm or more and 250 nm or less, and more preferably 150 nm or more and 250 nm or less.
  • oxygen contained in the insulating layer 110b may diffuse to the conductive layer 112a side through the insulating layer 110a, and the amount of oxygen supplied to the channel formation region of the semiconductor layer 108 may decrease.
  • oxygen contained in the insulating layer 110e may diffuse to the conductive layer 112a side through the insulating layer 110d, and the amount of oxygen supplied to the channel formation region of the semiconductor layer 108 may decrease.
  • the insulating layer 110a is thick, the amount of impurities released from the insulating layer 110a may increase, and the amount of impurities diffused to the channel formation region of the semiconductor layer 108 may increase.
  • the insulating layer 110d when the insulating layer 110d is thick, the amount of impurities released from the insulating layer 110d may increase, and the amount of impurities diffused to the channel formation region of the semiconductor layer 108 may increase.
  • the amount of oxygen supplied to the channel formation region of the semiconductor layer 108 can be increased, and oxygen vacancies ( VO ) and VOH in the channel formation region can be reduced.
  • the conductive layer 112a can be prevented from being oxidized by oxygen contained in the insulating layers 110b and 110e, and the electrical resistance of the conductive layer 112a can be prevented from increasing. Note that the thicknesses of the insulating layers 110a and 110d are not limited to the above-described ranges.
  • each of insulating layer 110c and insulating layer 110f is preferably 3 nm or more and 500 nm or less, more preferably 5 nm or more and 400 nm or less, more preferably 10 nm or more and 300 nm or less, more preferably 20 nm or more and 300 nm or less, more preferably 20 nm or more and 200 nm or less, more preferably 30 nm or more and 200 nm or less, more preferably 50 nm or more and 200 nm or less, and more preferably 50 nm or more and 150 nm or less.
  • the insulating layer 110c When the insulating layer 110c is thick, the amount of impurities released from the insulating layer 110c increases, and the amount of impurities diffusing into the channel formation region of the semiconductor layer 108 may increase. Similarly, when the insulating layer 110f is thick, the amount of impurities released from the insulating layer 110f increases, and the amount of impurities diffusing into the channel formation region of the semiconductor layer 108 may increase. On the other hand, when the insulating layer 110c is thin, oxygen contained in the insulating layer 110b may diffuse to the conductive layer 112b side through the insulating layer 110c, and the amount of oxygen supplied to the channel formation region of the semiconductor layer 108 may decrease.
  • the insulating layer 110f when the insulating layer 110f is thin, oxygen contained in the insulating layer 110e may diffuse to the conductive layer 112b side through the insulating layer 110f, and the amount of oxygen supplied to the channel formation region of the semiconductor layer 108 may decrease.
  • oxygen vacancies ( VO ) and VOH in the channel formation region of the semiconductor layer 108 can be reduced.
  • the thicknesses of the insulating layers 110c and 110f are not limited to the above-described ranges.
  • the channel length of transistor 100 when the channel length of transistor 100 is short, the impact of impurities diffusing into the channel formation region on the electrical characteristics of transistor 100 becomes greater. Therefore, it is preferable to use materials that release less impurities (especially hydrogen) from the insulating layers 110a, 110c, 110d, and 110f. Furthermore, it is more preferable that insulating layers 110a, 110c, 110d, and 110f are thin. This can reduce the amount of impurities diffusing into the channel formation region, and can result in a highly reliable transistor 100 that exhibits good electrical characteristics even when the channel length is short.
  • the thicknesses of the insulating layers 110a, 110c, 110d, and 110f are each preferably 3 nm or more and 100 nm or less, more preferably 3 nm or more and 50 nm or less, more preferably 3 nm or more and 30 nm or less, more preferably 3 nm or more and 20 nm or less, more preferably 3 nm or more and 10 nm or less, and more preferably 5 nm or more and 10 nm or less.
  • the insulating layer 110 has a six-layer stacked structure, one embodiment of the present invention is not limited to this.
  • the insulating layer 110 can also be a single layer, a two-layer stacked structure, a three-layer stacked structure, a four-layer stacked structure, a five-layer stacked structure, or a seven or more layer stacked structure.
  • the insulating layer 109 (see FIG. 4) provided between the conductive layer 112b and the conductive layer 202 has a function of insulating the conductive layer 112b and the conductive layer 202.
  • the insulating layer 109 can be made of a material that can be used for the insulating layer 110.
  • the insulating layer 109 having a region in contact with each of the conductive layer 112b and the conductive layer 202 is preferably made of a material that releases impurities that reduce the electrical resistance of the conductive layer 112b and the conductive layer 202.
  • the impurity preferably contains hydrogen. Examples of the impurity include water and hydrogen. This increases the carrier concentration of the conductive layer 112b, and the electrical resistance can be reduced. Thus, the transistor 100 can have a large on-current.
  • the conductive layer 112b can function as a wiring, and a semiconductor device with low wiring resistance can be obtained.
  • the impurity preferably contains hydrogen.
  • the impurities that reduce the electrical resistance of the conductive layer 112b and the conductive layer 202 may be the same or may be partially or entirely different.
  • silicon nitride or silicon nitride oxide can be suitably used for the insulating layer 109.
  • the insulating layer 110f is provided between the insulating layer 109 and the insulating layer 110e.
  • the insulating layer 110f functions as a barrier film, and thus it is possible to suppress the diffusion of impurities contained in the insulating layer 109 to the channel formation region of the semiconductor layer 108 through the insulating layer 110f.
  • the insulating layer 109 has a region having a higher impurity content than the insulating layer 110f.
  • the insulating layer 109 has a region having a higher hydrogen content than the insulating layer 110f.
  • secondary ion mass spectrometry can be used to analyze the impurity content of the insulating layer 109 and the insulating layer 110f.
  • the insulating layer 120 has a barrier insulating layer. This makes it possible to suppress the diffusion of impurities contained in the insulating layer 109 to the channel formation region of the semiconductor layer 208 through the insulating layer 120.
  • the top surface shape of the opening 143 is not limited, and may be, for example, a circle, an ellipse, a triangle, a quadrangle (including a rectangle, a diamond, and a square), a pentagon, or other polygon, or a shape with rounded corners of these polygons.
  • the polygon may be either a concave polygon (a polygon with at least one interior angle exceeding 180 degrees) or a convex polygon (a polygon with all interior angles less than 180 degrees).
  • the top surface shape of the opening 143 is preferably a circle.
  • the top surface shape of the opening 143 refers to the shape of the top surface end of the conductive layer 112b on the opening 143 side.
  • the channel length and channel width of the transistor 100 are described with reference to Figures 2A and 2B.
  • the case where the region of the semiconductor layer 108 in contact with the insulating layer 110s functions as a channel formation region is described as an example.
  • the channel length L100 of the transistor 100 is indicated by a dashed double-headed arrow.
  • the channel length L100 of the transistor 100 corresponds to the distance along the insulating layer 110s between the top surface of the conductive layer 112a and the top surface of the conductive layer 112b in the semiconductor layer 108.
  • the channel length L100 of the transistor 100 may be the sum of the thicknesses of the insulating layers 110a, 110b, 110c, 116, 110d, 110e, and 110f in the region of the semiconductor layer 108 sandwiched between the top surface of the conductive layer 112a and the bottom surface of the conductive layer 112b (in FIG. 2B, the thickness T110 is indicated by a double-headed arrow with a dashed dotted line).
  • the channel length L100 of the transistor 100 may be the sum of the thickness T110 and the thickness of the conductive layer 112b.
  • the channel length L100 is determined by the thickness T110, the thickness of the conductive layer 112b, and the angle (angle ⁇ 110) between the surface on which the insulating layer 110s is formed (here, the side of the insulating layer 110a, the side of the insulating layer 110b, the side of the insulating layer 110c, the side of the conductive layer 116, the side of the insulating layer 110d, the side of the insulating layer 110e, the side of the insulating layer 110f, and the side of the conductive layer 112b) and the surface on which the insulating layer 110a is formed (here, the top surface of the conductive layer 112a), and is not affected by the performance of the exposure device used to manufacture the transistor.
  • the channel length L100 can be made smaller than the minimum dimension of the exposure device, and a transistor of a fine size can be realized.
  • a transistor with an extremely short channel length that could not be realized with conventional exposure devices for mass production of flat panel displays (for example, a minimum dimension of about 2 ⁇ m or 1.5 ⁇ m) can be realized. It is also possible to create transistors with channel lengths of less than 10 nm without using the extremely expensive exposure equipment used in cutting-edge LSI technology.
  • the channel length L100 can be, for example, 5 nm or more and less than 3 ⁇ m, 7 nm or more and less than 2.5 ⁇ m, 10 nm or more and less than 2 ⁇ m, 10 nm or more and less than 1.5 ⁇ m, 10 nm or more and less than 1.2 ⁇ m, 10 nm or more and less than 1 ⁇ m, 10 nm or more and less than 500 nm, 10 nm or more and less than 300 nm, 10 nm or more and less than 200 nm, 10 nm or more and less than 100 nm, 10 nm or more and less than 50 nm, 10 nm or more and less than 30 nm, or 10 nm or more and less than 20 nm.
  • the channel length L100 can be 100 nm or more and less than 1 ⁇ m.
  • the on-state current of the transistor 100 can be increased.
  • the transistor 100 By using the transistor 100, a circuit capable of high-speed operation can be manufactured. Furthermore, the area occupied by the circuit can be reduced. Therefore, a small-sized semiconductor device can be obtained. For example, when the semiconductor device of one embodiment of the present invention is applied to a large display device or a high-definition display device, even if the number of wirings is increased, signal delay in each wiring can be reduced and display unevenness can be suppressed. Furthermore, since the area occupied by the circuit can be reduced, the frame of the display device can be narrowed.
  • the channel length L100 can be controlled by adjusting the thickness T110 and the angle ⁇ 110, etc.
  • the thickness T110 can be, for example, 5 nm or more but less than 3 ⁇ m, 7 nm or more but less than 2.5 ⁇ m, 10 nm or more but less than 2 ⁇ m, 10 nm or more but less than 1.5 ⁇ m, 10 nm or more but less than 1.2 ⁇ m, 10 nm or more but less than 1 ⁇ m, 10 nm or more but less than 500 nm, 10 nm or more but less than 300 nm, 10 nm or more but less than 200 nm, 10 nm or more but less than 100 nm, 10 nm or more but less than 50 nm, 10 nm or more but less than 30 nm, or 10 nm or more but less than 20 nm.
  • the side of the insulating layer 110 on the opening 143 side is preferably tapered.
  • the angle ⁇ 110 is preferably less than 90 degrees. By reducing the angle ⁇ 110, the coverage of the layer (e.g., the semiconductor layer 108) formed on the insulating layer 110 can be improved. Furthermore, the smaller the angle ⁇ 110, the longer the channel length L100 can be, and the larger the angle ⁇ 110, the shorter the channel length L100 can be.
  • the angle ⁇ 110 can be, for example, 30 degrees or more and 90 degrees or less, 35 degrees or more and 85 degrees or less, 40 degrees or more and 80 degrees or less, 45 degrees or more and 80 degrees or less, 50 degrees or more and 80 degrees or less, 55 degrees or more and 80 degrees or less, 60 degrees or more and 80 degrees or less, 65 degrees or more and 80 degrees or less, or 70 degrees or more and 80 degrees or less.
  • the angle ⁇ 110 is shown as less than 90 degrees, but this is not a limitation of one embodiment of the present invention.
  • the angle ⁇ 110 can also be 90 degrees or approximately 90 degrees. This allows the channel length L100 of the transistor 100 to be shortened.
  • FIG. 2B and other figures show an example in which the side walls of the opening 143 (side surface of insulating layer 110a, side surface of insulating layer 110b, side surface of insulating layer 110c, side surface of conductive layer 116, side surface of insulating layer 110d, side surface of insulating layer 110e, side surface of insulating layer 110f, and side surface of conductive layer 112b) are formed in a straight line, but this is not a limited embodiment of the present invention.
  • the angle between the side surface of each of insulating layer 110a, insulating layer 110b, and insulating layer 110c and the top surface of conductive layer 112a, the angle between the side surface of conductive layer 116 and the top surface of insulating layer 110c, the angle between the side surface of each of insulating layer 110d, insulating layer 110e, and insulating layer 110f and the top surface of conductive layer 116, and the angle between the side surface of conductive layer 112b and the top surface of insulating layer 110f may be different from each other.
  • the channel width W100 of the transistor 100 is indicated by a solid double-headed arrow.
  • the channel width W100 is the perimeter of the opening 143 in a plan view.
  • the width D143 of the opening 143 is indicated by a double-headed dashed arrow. If the top surface shape of the opening 143 is circular, the width D143 corresponds to the diameter of the circle, and the channel width W100 of the transistor 100 is the perimeter of the circle. In other words, the channel width W100 is ⁇ D143. In this way, if the top surface shape of the opening 143 is circular, a transistor with a smaller channel width W100 can be realized compared to other shapes.
  • the width D143 of the opening 143 may vary in the depth direction.
  • the width D143 of the opening 143 may be the average value of the diameter at the highest point of the opening 143 in a cross-sectional view, the diameter at the lowest point, and the diameter at the midpoint between these three.
  • the width D143 of the opening 143 is equal to or larger than the minimum dimension of the exposure device.
  • the width D143 can be, for example, 200 nm or more and less than 5 ⁇ m, 300 nm or more and less than 4.5 ⁇ m, 400 nm or more and less than 4 ⁇ m, 500 nm or more and less than 3.5 ⁇ m, 500 nm or more and less than 3 ⁇ m, 500 nm or more and less than 2.5 ⁇ m, 500 nm or more and less than 2 ⁇ m, 500 nm or more and less than 1.5 ⁇ m, or 500 nm or more and less than 1 ⁇ m.
  • the channel length and channel width of the transistor 200 will be described with reference to Figures 3A to 4.
  • the portion of the semiconductor layer 208 that overlaps with the conductive layer 204 will be described as a channel formation region.
  • the channel length of the transistor 200 is the length of the region where the semiconductor layer 208 and the conductive layer 204 overlap between a pair of regions 208D.
  • the channel length L200 of the transistor 200 is indicated by a dashed double-headed arrow.
  • the channel length L200 of the transistor 200 is determined by the length of the conductive layer 204 and is equal to or greater than the minimum dimension of the exposure device used to fabricate the transistor.
  • the channel length L200 can be 1.5 ⁇ m or greater.
  • the channel width of the transistor 200 is the width of the region where the semiconductor layer 208 and the conductive layer 204 overlap in a direction perpendicular to the channel length direction.
  • the channel width W200 of the transistor 200 is indicated by a dashed double-headed arrow.
  • the channel length L100 of the transistor 100 can be smaller than the minimum dimension of the exposure device, and the channel length L200 of the transistor 200 can be equal to or larger than the minimum dimension of the exposure device.
  • the transistors 100 and 200 can be formed by sharing some of the steps.
  • the semiconductor layer 108 and the semiconductor layer 208 can be formed in the same step.
  • a part of the insulating layer 106 functions as a gate insulating layer of the transistor 100, and another part of the insulating layer 106 functions as a gate insulating layer of the transistor 200.
  • the conductive layer 104, the conductive layer 204, the conductive layer 212a, and the conductive layer 212b can be formed in the same step. Therefore, the productivity of the semiconductor device can be increased and the manufacturing cost can be reduced.
  • the conductive layer 204 and the conductive layer 202 protrude outward beyond the end of the semiconductor layer 208 in the channel width direction of the transistor 200.
  • the entire channel width direction of the semiconductor layer 208 is covered by the conductive layer 204 and the conductive layer 202 via the insulating layer 106 and the insulating layer 120.
  • the semiconductor layer 208 can be electrically surrounded by an electric field generated by a pair of gate electrodes.
  • 3A and 4 show a configuration in which the conductive layer 204 and the conductive layer 202 are not connected.
  • a constant potential can be applied to one of a pair of gate electrodes, and a signal for driving the transistor 200 can be applied to the other.
  • the threshold voltage when the transistor 200 is driven by the other gate electrode can be controlled by the potential applied to one gate electrode.
  • the conductive layer 204 and the conductive layer 202 can also be connected. By applying the same potential to the conductive layer 204 and the conductive layer 202, an electric field for inducing a channel in the semiconductor layer 208 can be effectively applied, and the on-current of the transistor 200 can be increased. Therefore, the transistor 200 can be miniaturized. For example, an opening reaching the conductive layer 202 can be provided in the insulating layer 106 and the insulating layer 120, and the conductive layer 204 can be formed to cover the opening.
  • the conductive layer 202 can also be connected to the conductive layer 212a or the conductive layer 212b.
  • an opening that reaches the conductive layer 202 can be provided in the insulating layer 106 and the insulating layer 120, and the conductive layer 212a or the conductive layer 212b can be formed to cover the opening.
  • the insulating layer 120 can be made of the same material that can be used for the insulating layer 110.
  • the insulating layer 120 preferably has a laminated structure.
  • FIG. 3B and other figures show that the insulating layer 120 has a laminated structure of an insulating layer 120a and an insulating layer 120b on the insulating layer 120a.
  • the insulating layers 120a and 120b can each be made of the same material that can be used for the insulating layer 110.
  • the transistor 200 can have good electrical characteristics and high reliability.
  • the insulating layer 120a preferably releases a small amount of impurities (e.g., hydrogen and water) from itself and is difficult for impurities to penetrate. This can prevent the impurities contained in the insulating layer 120a from diffusing into the channel formation region of the semiconductor layer 208. This can result in a transistor 200 that exhibits good electrical characteristics and is highly reliable.
  • impurities e.g., hydrogen and water
  • the insulating layer 120a is preferably a film through which oxygen does not easily permeate. It can also be said that the insulating layer 120a functions as a barrier film. By providing the insulating layer 120a functioning as a barrier film, it is possible to suppress the diffusion of oxygen contained in the insulating layer 120b to the conductive layer 202 side through the insulating layer 120a. This can suppress the conductive layer 202 from being oxidized and the electrical resistance from being increased.
  • the diffusion of oxygen contained in the insulating layer 120b to the insulating layer 120a side is suppressed, the amount of oxygen supplied from the insulating layer 120b to the channel formation region of the semiconductor layer 208 is increased, and oxygen vacancies ( VO ) and VOH in the channel formation region can be reduced.
  • the insulating layer 120a located on the conductive layer 202 side is preferably made of a material that does not easily diffuse the metal elements contained in the conductive layer 202. This makes it possible to prevent the metal elements contained in the conductive layer 202 from diffusing into the channel formation region of the semiconductor layer 208 via the insulating layer 120.
  • the insulating layer 120a is preferably made of a material that can be used for the insulating layers 110a, 110c, 110d, and 110f.
  • the insulating layer 120a preferably contains nitrogen, and one or more of a nitride and a nitride oxide can be preferably used.
  • the insulating layer 120a can be made of, for example, one or both of silicon nitride and silicon nitride oxide.
  • the insulating layer 120a can be made of one or more of an oxide and an oxide nitride.
  • the insulating layer 120a can be made of, for example, aluminum oxide.
  • the insulating layer 120a, the insulating layer 110a, the insulating layer 110c, the insulating layer 110d, and the insulating layer 110f can be made of the same material. Alternatively, different materials can be used for some or all of these.
  • the insulating layer 120a and the insulating layer 120b can each have a stacked structure.
  • the insulating layer 120 is shown here as having a two-layer stacked structure, one embodiment of the present invention is not limited to this.
  • the insulating layer 120 can have a stacked structure of three or more layers, or a single layer structure.
  • the semiconductor layer 208 has a region in contact with the side surface of the insulating layer 120, but one embodiment of the present invention is not limited to this.
  • a configuration is also possible in which the semiconductor layer 208 does not have a region in contact with the side surface of the insulating layer 120, the end of the semiconductor layer 208 is located on the upper surface of the insulating layer 120, and the entire lower surface of the semiconductor layer 208 is in contact with the upper surface of the insulating layer 120.
  • the insulating layer 120 encompasses the semiconductor layer 208 in a planar view. This can reduce the step on the surface on which the semiconductor layer 208 is formed, thereby improving the coverage of the semiconductor layer 208.
  • the region 208D is a region with a lower electrical resistance than the channel formation region.
  • the region 208D can also be said to be a region with a higher carrier concentration, a higher oxygen defect density, or a higher impurity concentration than the channel formation region.
  • Region 208L has the same or lower electrical resistance as the channel formation region. Region 208L can also be said to have the same or higher carrier concentration, the same or higher oxygen defect density, or the same or higher impurity concentration as the channel formation region. Furthermore, region 208L has the same or higher electrical resistance as region 208D. Region 208L can also be said to have the same or lower carrier concentration, the same or lower oxygen defect density, or the same or lower impurity concentration as region 208D.
  • Region 208L functions as a buffer region for alleviating the drain electric field.
  • Region 208L does not overlap with conductive layer 204, and therefore is a region in which a channel is hardly formed even when a gate voltage is applied to conductive layer 204.
  • Region 208L preferably has a higher carrier concentration than the channel formation region. This allows region 208L to function as an LDD (Lightly Doped Drain) region.
  • LDD Lightly Doped Drain
  • the carrier concentration in the semiconductor layer 208 is preferably distributed so that it is lowest in the channel formation region, and then increases in the order of region 208L and region 208D.
  • region 208L between the channel formation region and region 208D, the carrier concentration in the channel formation region can be kept extremely low, even if impurities such as hydrogen diffuse from region 208D during the manufacturing process.
  • the carrier concentration in the region 208L is not uniform and may have a gradient such that the carrier concentration decreases from the region 208D side to the channel formation region.
  • the region 208L may have a configuration in which either or both of the hydrogen concentration and the oxygen vacancy ( VO ) concentration in the region 208L have a gradient such that the concentration decreases from the region 208D side to the channel formation region side.
  • the ends of the conductive layers 212a and 212b are located inside the openings 147a and 147b, respectively.
  • the ends of the conductive layers 212a and 212b have regions in contact with the semiconductor layer 208 in the openings 147a and 147b. This allows the region in contact with the conductive layer 212a of the semiconductor layer 208 to be adjacent to one of the pair of regions 208D, and similarly, the region in contact with the conductive layer 212b of the semiconductor layer 208 to be adjacent to the other of the pair of regions 208D.
  • the region in contact with the conductive layer 212a of the semiconductor layer 208 and one of the pair of regions 208D function as one of the source region or drain region of the transistor 200.
  • the region of the semiconductor layer 208 in contact with the conductive layer 212b and the other of the pair of regions 208D function as the other of the source or drain regions of the transistor 200.
  • the top surface shapes of openings 147a and 147b are not particularly limited.
  • the top surface shapes of openings 147a and 147b can be any shape that can be applied to opening 143.
  • the top surface shapes of openings 147a and 147b are shown as being rectangular with rounded corners, which is different from the top surface shape of opening 143, but one embodiment of the present invention is not limited to this.
  • the top surface shapes of openings 147a and 147b can also be the same as the top surface shape of opening 143.
  • the impurity element when an impurity element is supplied to the semiconductor layer 208 to form the regions 208L and 208D, in the transistor 100, the impurity element may be supplied to the semiconductor layer 108 through the insulating layer 106 using the conductive layer 104 as a mask. As a result, the region 108L is formed in a region of the semiconductor layer 108 that does not overlap with the conductive layer 104. Note that in the transistor 100, a region in contact with the conductive layer 112b of the semiconductor layer 108 functions as a source region or a drain region. The region 108L is formed in a part of the source region or the drain region.
  • the concentration of the impurity element in the region 108L may be different from the concentration of the impurity element in the region 208L.
  • the region 108L may not be formed. For example, if the conductive layer 104 extends to cover the end of the semiconductor layer 108, the entire semiconductor layer 108 is masked by the conductive layer 104, so that the impurity element is not supplied to the semiconductor layer 108 and the region 108L is not formed.
  • the structure in which the conductive layer 212a and the conductive layer 212b are formed in the same process as the conductive layer 204 is shown, but one embodiment of the present invention is not limited to this.
  • the conductive layer 212a and the conductive layer 212b can be formed in a process different from that of the conductive layer 204.
  • the conductive layer 104 and the conductive layer 204 are formed over the insulating layer 106, and an impurity element is supplied to the semiconductor layer 208 using the conductive layer 204 as a mask to form a source region and a drain region.
  • the insulating layer 195 is formed over the conductive layer 104 and the conductive layer 204, and an opening that reaches the source region and an opening that reaches the drain region are formed in the insulating layer 106 and the insulating layer 195, and the conductive layer 212a and the conductive layer 212b can be formed so as to cover these openings.
  • FIG. 1B and other figures show an example in which the thickness of the semiconductor layer 208 is uniform regardless of location, but one embodiment of the present invention is not limited to this.
  • a configuration in which the thickness is different between a region of the semiconductor layer 208 that overlaps with the insulating layer 106 and a region that does not overlap with the insulating layer 106 may be used.
  • a part of the semiconductor layer 208 may be removed, so that the thickness of the region of the semiconductor layer 208 that does not overlap with the insulating layer 106 may become thinner than the thickness of the overlapping region.
  • a configuration in which the thickness is different between a region of the semiconductor layer 208 that overlaps with any of the insulating layer 106, the conductive layer 212a, and the conductive layer 212b and a region that does not overlap with any of these may be used.
  • a part of the semiconductor layer 208 may be removed, so that the thickness of the region of the semiconductor layer 208 that does not overlap with any of the insulating layer 106, the conductive layer 212a, and the conductive layer 212b may be thinner than the thickness of the region that overlaps with any of them.
  • the thickness may be different between the region of the semiconductor layer 208 that overlaps with the insulating layer 106, the region that overlaps with any of the conductive layer 212a and the conductive layer 212b, and the region that does not overlap with any of the insulating layer 106, the conductive layer 212a, and the conductive layer 212b.
  • the semiconductor device 10 can have a structure including a capacitor.
  • the semiconductor device 10 has a structure including a capacitor 150.
  • the capacitor 150 has a structure in which a conductive layer 112b, an insulating layer 109, and a conductive layer 202 are stacked in this order.
  • the conductive layer 112b and the conductive layer 202 function as a pair of electrodes of the capacitor 150.
  • the conductive layer 112b functions as the other of the source electrode or drain electrode of the transistor 100 and functions as one of the pair of electrodes of the capacitor 150.
  • the conductive layer 202 functions as the backgate electrode of the transistor 200 and functions as the other of the pair of electrodes of the capacitor 150.
  • the region of the insulating layer 109 sandwiched between the conductive layer 112b and the conductive layer 202 functions as a dielectric of the capacitor 150.
  • the capacitor 150 having these conductive layers as a pair of electrodes can be formed.
  • different materials can be used for the conductive layer 112b and the conductive layer 202, which allows a wider range of material selection.
  • the thickness of the insulating layer 109 can be set according to the capacitance of the capacitor 150, the area of the capacitor 150, and the relative dielectric constant of the material used for the insulating layer 109. Note that the area of the capacitor 150 refers to the area of the region where the conductive layer 112b, the conductive layer 202, and the insulating layer 109 overlap each other in the capacitor 150.
  • FIG. 1A and other figures illustrate an example in which the capacitor 150 is composed of the conductive layer 112b, the conductive layer 202, and the insulating layer 109, but the configuration of the capacitor 150 is not particularly limited.
  • the other of the source electrode or the drain electrode of the transistor 100 is connected to one of the pair of electrodes of the capacitor 150 and the backgate electrode of the transistor 200 is connected to the other of the pair of electrodes of the capacitor 150 is shown, but the connection relationship between the transistor 100, the transistor 200, and the capacitor 150 is not particularly limited.
  • the semiconductor device may also be configured not to have a capacitor.
  • Metal oxides that can be used for the semiconductor layer 108 and the semiconductor layer 208 will be specifically described.
  • metal oxides include indium oxide, gallium oxide, and zinc oxide.
  • the metal oxide preferably contains at least indium or zinc.
  • the metal oxide preferably contains one or more elements selected from indium, element M, and zinc.
  • the element M is a metal element or semimetal element having a high bond energy with oxygen, for example, a metal element or semimetal element having a bond energy with oxygen higher than that of indium.
  • the element M include aluminum, gallium, tin, yttrium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, zirconium, molybdenum, hafnium, tantalum, tungsten, lanthanum, cerium, neodymium, magnesium, calcium, strontium, barium, boron, silicon, germanium, and antimony.
  • the element M of the metal oxide is preferably one or more of the above elements, more preferably one or more selected from gallium, aluminum, tin, and yttrium, and even more preferably one or more of gallium, aluminum, and tin.
  • metal elements and metalloid elements may be collectively referred to as "metal elements", and the "metal elements" described in this specification may include metalloid elements.
  • the semiconductor layer 108 and the semiconductor layer 208 may each be made of, for example, indium zinc oxide (In-Zn oxide, also referred to as IZO (registered trademark)), indium tin oxide (In-Sn oxide, also referred to as ITO), indium titanium oxide (In-Ti oxide), indium gallium oxide (In-Ga oxide), indium tungsten oxide (In-W oxide, also referred to as IWO), indium gallium aluminum oxide (In-Ga-Al oxide), indium gallium tin oxide (In-Ga-Sn oxide, also referred to as IGTO), gallium zinc oxide (Ga-Zn oxide, also referred to as GZO), aluminum zinc oxide ( Indium aluminum zinc oxide (In-Al-Zn oxide, also written as AZO), indium tin zinc oxide (In-Sn-Zn oxide, also written as ITZO (registered trademark)), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-
  • the metal oxide may have one or more metal elements having a higher periodic number in the periodic table instead of or in addition to indium.
  • Examples of metal elements having a higher periodic number in the periodic table include metal elements belonging to the fifth period and metal elements belonging to the sixth period.
  • the metal elements include yttrium, zirconium, silver, cadmium, tin, antimony, barium, lead, bismuth, lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium. Note that lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium are called light rare earth elements.
  • the metal oxide can have one or more nonmetallic elements.
  • the carrier concentration can be increased or the band gap can be narrowed, which may increase the field effect mobility of the transistor.
  • nonmetallic elements include carbon, nitrogen, phosphorus, sulfur, selenium, fluorine, chlorine, bromine, and hydrogen.
  • the field effect mobility of the transistor can be increased.
  • a transistor with a large on-current can be realized.
  • the ratio of the number of indium atoms to the sum of the numbers of atoms of all contained metal elements may be referred to as the indium content.
  • the sum of the ratios of the number of atoms of element M to the sum of the numbers of atoms of all contained metal elements can be taken as the content of element M.
  • Increasing the zinc content in the metal oxide results in a highly crystalline metal oxide, which can suppress the diffusion of impurities in the metal oxide. This suppresses fluctuations in the electrical characteristics of the transistor, and increases reliability.
  • the metal oxide By increasing the content of element M in the metal oxide, the metal oxide can have a large band gap. Furthermore, by suppressing the formation of oxygen vacancies (V 2 O 3 ) in the metal oxide, carrier generation due to oxygen vacancies (V 2 O 3 ) can be suppressed, and a shift in the threshold voltage of the transistor can be suppressed. As a result, the cutoff current can be reduced, and a normally-off transistor can be obtained. Furthermore, a transistor with a small off-current can be obtained. Furthermore, fluctuations in the electrical characteristics of the transistor can be suppressed, and reliability can be improved.
  • the electrical characteristics and reliability of the transistors vary depending on the composition of the metal oxide applied to the semiconductor layer 108 and the semiconductor layer 208. Therefore, by varying the composition of the metal oxide depending on the electrical characteristics and reliability required of the transistor, a semiconductor device that combines excellent electrical characteristics and high reliability can be obtained.
  • the metal oxide is an In-M-Zn oxide
  • the atomic ratio of In in the In-M-Zn oxide is equal to or greater than the atomic ratio of element M.
  • the atomic ratio of In in the In-M-Zn oxide can be less than the atomic ratio of element M.
  • the on-current or field effect mobility of the transistor can be increased. Furthermore, by having the element M, the generation of oxygen vacancies (V 0 ) can be suppressed.
  • the content of the element M (the ratio of the number of atoms of the element M to the sum of the number of atoms of all metal elements contained) is preferably 0.1% to 25% or less, more preferably 0.1% to 20% or less, more preferably 0.1% to 10% or less, more preferably 0.1% to 8% or less, more preferably 0.1% to 6% or less, and even more preferably 0.1% to 4% or less. This allows a transistor with good electrical characteristics to be obtained.
  • the element M is preferably one or more of the above elements, and more preferably one or more selected from aluminum, gallium, tin, and yttrium.
  • the grain boundaries become the recombination center, and carriers are captured, which may reduce the on-current of the transistor.
  • a metal oxide having a polycrystalline structure is used for the semiconductor layer 108 and the semiconductor layer 208, the unevenness of the surface of the semiconductor layer 108 and the surface of the semiconductor layer 208 may become large.
  • the step of the surface on which the layer (e.g., the insulating layer 106) formed on the semiconductor layer 108 and the semiconductor layer 208 is formed becomes large, and defects such as step breaks or pores may occur in the layer.
  • the semiconductor layer 108 and the semiconductor layer 208 When a metal oxide having a composition that easily becomes a polycrystalline structure is used for the semiconductor layer 108 and the semiconductor layer 208, it is preferable to include an element that inhibits crystallization. This prevents the semiconductor layer 108 and the semiconductor layer 208 from becoming a polycrystalline structure, and a transistor having a large on-current can be obtained. In addition, the coverage of the layers (e.g., insulating layer 106) formed on the semiconductor layer 108 and the semiconductor layer 208 can be improved, and defects such as discontinuities or voids in the layers can be suppressed.
  • the layers e.g., insulating layer 106
  • indium tin oxide (ITSO) containing silicon is less likely to have a polycrystalline structure, and therefore can be suitably used for the semiconductor layer 108 and the semiconductor layer 208.
  • ITSO indium tin oxide
  • the silicon content is preferably 1% or more and 20% or less, more preferably 3% or more and 20% or less, even more preferably 3% or more and 15% or less, and even more preferably 5% or more and 15% or less.
  • the semiconductor layer 108 and the semiconductor layer 208 When indium tin oxide (ITSO) containing silicon is used for the semiconductor layer 108 and the semiconductor layer 208, it is preferable that it has crystallinity. Note that the semiconductor layer 108 and the semiconductor layer 208 can also be configured to have an amorphous region or be amorphous.
  • ITSO indium tin oxide
  • Metal oxides not containing element M can be applied to the semiconductor layer 108 and the semiconductor layer 208.
  • the atomic ratio of In is equal to or greater than the atomic ratio of Zn.
  • the composition of the semiconductor layer 108 and the semiconductor layer 208 can be analyzed using, for example, energy dispersive X-ray spectrometry (EDX), X-ray photoelectron spectrometry (XPS or ESCA), inductively coupled plasma mass spectrometry (ICP-MS), or inductively coupled plasma-atomic emission spectrometry (ICP-AES). Analysis can also be performed by combining a number of these techniques. It is preferable to separate the peaks of the spectrum obtained by the analysis and identify and quantify the elements.
  • the actual content may differ from the content obtained by analysis due to the influence of analytical accuracy. For example, when the content of element M is low, the content of element M obtained by analysis may be lower than the actual content, may be difficult to quantify, or may be below the detection limit.
  • the metal oxide can be formed preferably by sputtering or atomic layer deposition (ALD).
  • ALD atomic layer deposition
  • the composition of the formed metal oxide may differ from the composition of the sputtering target.
  • the zinc content in the formed metal oxide may decrease to about 50% compared to the sputtering target.
  • the semiconductor layer 108 and the semiconductor layer 208 are preferably made of a crystalline metal oxide.
  • Examples of the structure of a crystalline metal oxide include a CAAC (C-Axis Aligned Crystal) structure, a polycrystalline (poly-crystal) structure, and a nanocrystalline (nc: nano-crystal) structure.
  • CAAC C-Axis Aligned Crystal
  • poly-crystal polycrystalline
  • nanocrystalline nanocrystalline
  • the CAAC structure is a crystal structure in which multiple microcrystals (typically multiple IGZO microcrystals) have a c-axis orientation, and the multiple microcrystals are connected without being oriented in the a-b plane.
  • the CAAC structure has fewer crystal grain boundaries and grains in the a-b plane than the polycrystalline structure, and therefore a highly reliable semiconductor device can be realized.
  • CAAC-OS or nc-OS for the semiconductor layer 108 and the semiconductor layer 208, respectively.
  • CAAC-OS has multiple layered crystals.
  • the c-axes of the crystals are oriented in the normal direction to the surface on which they are formed.
  • the semiconductor layer 108 and the semiconductor layer 208 each preferably have layered crystals parallel or approximately parallel to the surface on which they are formed.
  • the semiconductor layer 108 preferably has layered crystals parallel or approximately parallel to the top surface in a region in contact with the top surface of the conductive layer 112b, and has layered crystals parallel or approximately parallel to the side surface in a region in contact with the side surface of the insulating layer 110s.
  • the semiconductor layer 108 preferably has layered crystals parallel or approximately parallel to the side surface of the insulating layer 110s, which is the surface on which they are formed, in the opening 143.
  • the layered crystals of the semiconductor layer 108 are formed approximately parallel to the channel length direction of the transistor 100, and therefore the transistor can have a large on-current.
  • the semiconductor layer 208 preferably has layered crystals that are parallel or approximately parallel to the surface on which it is formed (here, the upper and side surfaces of the insulating layer 120 and the upper surface of the insulating layer 110).
  • the semiconductor layer 208 preferably has layered crystals that are parallel or approximately parallel to the upper surface of the insulating layer 120, which is the surface on which it is formed, in the region that overlaps with the conductive layer 204.
  • the density of defect states in the channel formation region can be reduced.
  • a metal oxide with low crystallinity a transistor capable of passing a large current can be realized.
  • the substrate temperature during formation can be adjusted, for example, by the temperature of the stage on which the substrate is placed during formation. Also, the higher the oxygen flow rate ratio of the deposition gas used in formation, or the oxygen partial pressure in the processing chamber, the more crystalline the metal oxide that can be formed.
  • the crystallinity of the semiconductor layer 108 and the semiconductor layer 208 can be analyzed, for example, by X-ray diffraction (XRD), a transmission electron microscope (TEM), or electron diffraction (ED). In addition, the analysis can be performed by combining a plurality of these techniques.
  • XRD X-ray diffraction
  • TEM transmission electron microscope
  • ED electron diffraction
  • V O H When a metal oxide is used for the semiconductor layer 108 and the semiconductor layer 208, it is preferable to reduce V O H in the channel formation region as much as possible to make it highly pure or substantially highly pure.
  • it is important to remove impurities such as water and hydrogen in the metal oxide (sometimes referred to as dehydration or dehydrogenation treatment) and to supply oxygen to the metal oxide to repair oxygen vacancies (V O ).
  • a metal oxide with sufficiently reduced defects such as V O H for the channel formation region of a transistor, stable electrical characteristics can be imparted.
  • oxygen addition treatment supplying oxygen to a metal oxide to repair oxygen vacancies (V O ) may be referred to as oxygen addition treatment.
  • the carrier concentration of the channel formation region is preferably 1 ⁇ 10 18 cm ⁇ 3 or less, more preferably less than 1 ⁇ 10 17 cm ⁇ 3 , further preferably less than 1 ⁇ 10 16 cm ⁇ 3 , further preferably less than 1 ⁇ 10 13 cm ⁇ 3 , and further preferably less than 1 ⁇ 10 12 cm ⁇ 3 .
  • the carrier concentration of the channel formation region can be, for example, 1 ⁇ 10 ⁇ 9 cm ⁇ 3 .
  • OS transistors have small variations in electrical characteristics due to radiation exposure, i.e., they have high resistance to radiation, and therefore can be suitably used in environments where radiation may be present. It can also be said that OS transistors have high reliability against radiation.
  • OS transistors can be suitably used in pixel circuits of X-ray flat panel detectors.
  • OS transistors can also be suitably used in semiconductor devices used in outer space.
  • radiation include electromagnetic radiation (e.g., X-rays and gamma rays) and particle radiation (e.g., alpha rays, beta rays, proton rays, and neutron rays).
  • the semiconductor layer 108 and the semiconductor layer 208 may each have a layered material that functions as a semiconductor.
  • a layered material is a general term for a group of materials that have a layered crystal structure.
  • a layered crystal structure is a structure in which layers formed by covalent bonds or ionic bonds are stacked via bonds weaker than covalent bonds or ionic bonds, such as van der Waals bonds.
  • a layered material has high electrical conductivity within a unit layer, that is, high two-dimensional electrical conductivity.
  • Examples of the layered material include graphene, silicene, and chalcogenides.
  • Chalcogenides are compounds containing chalcogen (an element belonging to Group 16).
  • Examples of the chalcogenides include transition metal chalcogenides and Group 13 chalcogenides.
  • MoS 2 molybdenum sulfide
  • MoSe 2 molybdenum selenide
  • MoTe 2 molybdenum
  • the semiconductor layer 108 and the semiconductor layer 208 can each have a stacked structure having two or more metal oxide layers.
  • the compositions of the two or more metal oxide layers in the semiconductor layer 108 and the semiconductor layer 208 can be the same or approximately the same.
  • they can be formed using the same sputtering target, which can reduce manufacturing costs.
  • the boundary (interface) between these metal oxide layers may not be clearly identified.
  • the conductive layer 112a, the conductive layer 112b, the conductive layer 104, the conductive layer 116, the conductive layer 204, the conductive layer 212a, the conductive layer 212b, and the conductive layer 202 can each have a single-layer structure or a stacked-layer structure.
  • Examples of materials that can be used for the conductive layers 112a, 112b, 104, 116, 204, 212a, 212b, and 202 include chromium, copper, aluminum, gold, and the like.
  • the metals include one or more of silver, zinc, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt, molybdenum, and niobium, as well as alloys containing one or more of the aforementioned metals.
  • the conductive layer 112a, the conductive layer 112b, the conductive layer 104, the conductive layer 116, the conductive layer 204, the conductive layer 212a, the conductive layer 212b, and the conductive layer 202 are each made of one or more of copper, silver, gold, and aluminum. In particular, copper or aluminum is preferred because of its excellent mass productivity.
  • the conductive layer 112a, the conductive layer 112b, the conductive layer 104, the conductive layer 116, the conductive layer 204, the conductive layer 212a, the conductive layer 212b, and the conductive layer 202 can each be made of a metal oxide (oxide conductor) having electrical conductivity.
  • oxide conductors include indium oxide, zinc oxide, In-Sn oxide (ITO), In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Sn-Si oxide (also called ITO containing silicon, ITSO), zinc oxide with added gallium, and In-Ga-Zn oxide.
  • oxide conductors containing indium are preferred because of their high electrical conductivity.
  • the conductive layer 112a, the conductive layer 112b, the conductive layer 104, the conductive layer 116, the conductive layer 204, the conductive layer 212a, the conductive layer 212b, and the conductive layer 202 can each have a stacked structure of a conductive film containing the oxide conductor described above and a conductive film containing a metal or an alloy. By using a conductive film containing a metal or an alloy, the wiring resistance can be reduced.
  • a Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) can be applied to each of conductive layer 112a, conductive layer 112b, conductive layer 104, conductive layer 116, conductive layer 204, conductive layer 212a, conductive layer 212b, and conductive layer 202.
  • X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti
  • the conductive layer 112a, the conductive layer 112b, the conductive layer 104, the conductive layer 116, the conductive layer 204, the conductive layer 212a, the conductive layer 212b, and the conductive layer 202 may be made of the same material. Alternatively, different materials may be used for some or all of these layers.
  • the conductive layer 112a and the conductive layer 112b have a region in contact with the semiconductor layer 108.
  • a metal oxide is used for the semiconductor layer 108
  • an insulating oxide e.g., aluminum oxide
  • conductive layer 112a and conductive layer 112b it is preferable to use, for example, titanium, tantalum nitride, titanium nitride, nitride containing titanium and aluminum, nitride containing tantalum and aluminum, ruthenium, ruthenium oxide, ruthenium nitride, oxide containing strontium and ruthenium, and oxide containing lanthanum and nickel, respectively. These are preferable because they are conductive materials that are difficult to oxidize, or materials that maintain low electrical resistance even when oxidized.
  • the conductive layer 112a and the conductive layer 112b can each be made of the oxide conductors described above. Specifically, metal oxides such as indium oxide, zinc oxide, ITO, In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Sn oxide containing silicon, and zinc oxide doped with gallium can be used.
  • metal oxides such as indium oxide, zinc oxide, ITO, In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Sn oxide containing silicon, and zinc oxide doped with gallium can be used.
  • the conductive layers 112a and 112b may each be made of a nitride conductor.
  • nitride conductors include tantalum nitride and titanium nitride.
  • the conductive layer 112a, the conductive layer 112b, the conductive layer 104, and the conductive layer 116 can each have a stacked structure.
  • the conductive layer 112a has a stacked structure, it is preferable to use a conductive material that is not easily oxidized for at least the layer in contact with the semiconductor layer 108. The same applies to the conductive layer 112b.
  • the insulating layer 106 preferably includes one or more inorganic insulating layers.
  • the insulating layer 106 can be made of the same material as the insulating layer 110 and the insulating layer 110s.
  • the insulating layer 106 has regions in contact with the semiconductor layer 108, the conductive layer 112b, the conductive layer 104, and the insulating layer 110.
  • a metal oxide is used for the semiconductor layer 108, it is preferable to use any of the above-mentioned oxides and oxynitrides for at least the film that is in contact with the semiconductor layer 108 among the films that constitute the insulating layer 106.
  • the insulating layer 106 has a single-layer structure, silicon oxide, silicon oxynitride, or aluminum oxide can be suitably used for the insulating layer 106.
  • the leakage current may become large.
  • a material with a high relative dielectric constant also called a high-k material
  • examples of high-k materials that can be used for the insulating layer 106 include gallium oxide, hafnium oxide, zirconium oxide, oxides having aluminum and hafnium, oxynitrides having aluminum and hafnium, oxides having silicon and hafnium, oxynitrides having silicon and hafnium, and nitrides having silicon and hafnium.
  • a material that can have ferroelectricity can be used for the gate insulating layer.
  • materials that can have ferroelectricity include metal oxides such as hafnium oxide, zirconium oxide, and HfZrO x (X is a real number greater than 0).
  • materials that may have ferroelectricity include materials in which an element J1 (here, element J1 is one or more selected from zirconium, silicon, aluminum, gadolinium, yttrium, lanthanum, strontium, etc.) is added to hafnium oxide. For example, the ratio of the number of hafnium atoms to the number of element J1 may be 1:1 or close thereto.
  • Examples of materials that may have ferroelectricity include materials in which an element J2 (here, element J2 is one or more selected from hafnium, silicon, aluminum, gadolinium, yttrium, lanthanum, strontium, etc.) is added to zirconium oxide.
  • element J2 is one or more selected from hafnium, silicon, aluminum, gadolinium, yttrium, lanthanum, strontium, etc.
  • the ratio of the number of zirconium atoms to the number of element J2 may be 1:1 or close thereto.
  • examples of materials that can have ferroelectricity include piezoelectric ceramics having a perovskite structure, such as lead titanate ( PbTiOx ), barium strontium titanate (BST), strontium titanate, lead zirconate titanate (PZT), strontium bismuth tantalate (SBT), bismuth ferrite (BFO), and barium titanate.
  • PbTiOx lead titanate
  • BST barium strontium titanate
  • PZT lead zirconate titanate
  • SBT strontium bismuth tantalate
  • BFO bismuth ferrite
  • the insulating layer 106 is shown as having a single-layer structure, but one embodiment of the present invention is not limited to this.
  • the insulating layer 106 can also have a stacked structure.
  • the insulating layer 195 which functions as a protective layer, is preferably made of a material that is difficult for impurities to diffuse into. By providing the insulating layer 195, it is possible to effectively prevent impurities from diffusing into the transistor from the outside, thereby improving the reliability of the semiconductor device. Examples of impurities include water and hydrogen.
  • the insulating layer 195 can be an insulating layer having an inorganic material or an insulating layer having an organic material.
  • an inorganic material such as oxide, oxynitride, nitride oxide, or nitride can be suitably used for the insulating layer 195.
  • silicon nitride, silicon nitride oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, aluminum nitride, hafnium oxide, and hafnium aluminate can be used.
  • one or more of acrylic resin and polyimide resin can be used as the organic material.
  • a photosensitive material can be used as the organic material. Two or more of the above insulating films can be stacked.
  • the insulating layer 195 can have a stacked structure of an insulating layer having an inorganic material and an insulating layer having an organic material.
  • the material of the substrate 102 it is necessary that the material has at least a heat resistance sufficient to withstand subsequent heat treatment.
  • a single crystal semiconductor substrate made of silicon or silicon carbide, a polycrystalline semiconductor substrate, a compound semiconductor substrate such as silicon germanium, an SOI substrate, a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, or an organic resin substrate can be used as the substrate 102.
  • the substrate 102 may be provided with a semiconductor element. Note that the shape of the semiconductor substrate and the insulating substrate may be circular or rectangular.
  • a flexible substrate can be used as the substrate 102, and the transistor 100 and the like can be formed directly on the flexible substrate.
  • a peeling layer can be provided between the substrate 102 and the transistor 100 and the like. By providing a peeling layer, after a semiconductor device is partially or entirely completed on the substrate, it can be separated from the substrate 102 and transferred to another substrate. In this case, the transistor 100 and the like can also be transferred to a substrate with low heat resistance or a flexible substrate.
  • ⁇ Configuration Example 2> 5A is a cross-sectional view of a semiconductor device 10A according to one embodiment of the present invention, taken along dashed line A1-A2 in the plan view of the semiconductor device 10 shown in FIG.
  • the semiconductor device 10A has a transistor 100 and a transistor 200A.
  • the semiconductor device 10A differs from the semiconductor device 10 shown in FIG. 1B mainly in that the semiconductor device 10A has a transistor 200A instead of a transistor 200.
  • Transistor 200A has conductive layer 204, conductive layer 212a, conductive layer 212b, insulating layer 106, semiconductor layer 208, insulating layer 120b, insulating layer 110, and conductive layer 202a.
  • the conductive layer 202a is provided in a region different from the conductive layer 112a on the substrate 102.
  • An insulating layer 110 (insulating layer 110a, insulating layer 110b, insulating layer 110c, insulating layer 110d, insulating layer 110e, and insulating layer 110f) is provided on the conductive layer 202a.
  • An insulating layer 120b is provided on the insulating layer 110 so as to have a region overlapping with the conductive layer 202a. For the configuration of the layers above the insulating layer 120b, the description of the transistor 200 can be referred to.
  • the conductive layer 204 functions as a gate electrode, and a part of the insulating layer 106 functions as a gate insulating layer.
  • the conductive layer 202a functions as a back gate electrode, and a part of the insulating layer 120b and a part of the insulating layer 110 function as a back gate insulating layer.
  • the conductive layer 212a functions as one of the source electrode and the drain electrode, and the conductive layer 212b functions as the other of the source electrode and the drain electrode.
  • the transistor 200A and the transistor 200 have different configurations of the back gate electrode and the back gate insulating layer. Since the transistor 200A has the above-mentioned configuration, the conductive layer 112a that functions as one of the source electrode and drain electrode of the transistor 100 and the conductive layer 202a that functions as the back gate electrode of the transistor 200A can be formed using the same material and in the same process. Furthermore, the transistor 200A does not have the insulating layer 109 and the insulating layer 120a that the transistor 200 has. Therefore, the number of processes involved in the manufacture of the semiconductor device 10A can be reduced compared to the semiconductor device 10 shown in FIG. 1B.
  • semiconductor device 10A for anything other than the above, the contents described for semiconductor device 10 can be referred to.
  • ⁇ Configuration Example 3> 5B is a cross-sectional view of the semiconductor device 10B according to one embodiment of the present invention, taken along dashed line A1-A2 in the plan view of the semiconductor device 10 shown in FIG.
  • the semiconductor device 10B has a transistor 100, a transistor 200B, an insulating layer 110a, an insulating layer 110b, and an insulating layer 110c.
  • the semiconductor device 10B differs from the semiconductor device 10 shown in FIG. 1B mainly in that the semiconductor device 10B has a transistor 200B instead of a transistor 200.
  • Transistor 200B has conductive layer 204, conductive layer 212a, conductive layer 212b, insulating layer 106, semiconductor layer 208, insulating layer 120b, insulating layer 110d, insulating layer 110e, insulating layer 110f, and conductive layer 202b.
  • the conductive layer 202b is provided in a region on the insulating layer 110c that is different from the conductive layer 116.
  • insulating layers 110d, 110e, and 110f are provided on the conductive layer 202b.
  • the insulating layer 120b is provided so as to have a region that overlaps with the conductive layer 202b.
  • the description of the transistor 200 can be referred to.
  • the conductive layer 204 functions as a gate electrode, and a part of the insulating layer 106 functions as a gate insulating layer.
  • the conductive layer 202b functions as a back gate electrode, and a part of the insulating layer 120b, a part of the insulating layer 110f, a part of the insulating layer 110e, and a part of the insulating layer 110d function as a back gate insulating layer.
  • the conductive layer 212a functions as one of the source electrode or the drain electrode, and the conductive layer 212b functions as the other of the source electrode or the drain electrode.
  • the transistor 200B and the transistor 200 have different configurations of the back gate electrode and the back gate insulating layer. Since the transistor 200B has the above-mentioned configuration, the conductive layer 116 that functions as the back gate electrode of the transistor 100 and the conductive layer 202b that functions as the back gate electrode of the transistor 200B can be formed using the same material and in the same process. Furthermore, the transistor 200B does not have the insulating layer 109 and the insulating layer 120a that the transistor 200 has. Therefore, the number of processes involved in the manufacture of the semiconductor device 10B can be reduced compared to the semiconductor device 10 shown in FIG. 1B.
  • semiconductor device 10B other than the above, the contents described for semiconductor device 10 can be referred to.
  • ⁇ Configuration Example 4> 6A is a cross-sectional view of a semiconductor device 10C according to one embodiment of the present invention, taken along dashed line A1-A2 in the plan view of the semiconductor device 10 shown in FIG.
  • the semiconductor device 10C has a transistor 100, a transistor 200C, and an insulating layer 110.
  • the semiconductor device 10C differs from the semiconductor device 10 shown in FIG. 1B mainly in that the semiconductor device 10C has a transistor 200C instead of a transistor 200.
  • Transistor 200C has conductive layer 204, conductive layer 212a, conductive layer 212b, insulating layer 106, semiconductor layer 208, insulating layer 120, and conductive layer 202c.
  • the conductive layer 202c is provided in a region different from the conductive layer 112b on the insulating layer 110.
  • the insulating layer 120 (insulating layer 120a and insulating layer 120b) is provided on the conductive layer 202c.
  • the insulating layer 120 has a region in contact with the top surface of the conductive layer 202c, the side surface of the conductive layer 202c, and the top surface of the insulating layer 110.
  • the description of the transistor 200 can be referred to.
  • the conductive layer 204 functions as a gate electrode, and a part of the insulating layer 106 functions as a gate insulating layer.
  • the conductive layer 202c functions as a back gate electrode, and a part of the insulating layer 120 functions as a back gate insulating layer.
  • the conductive layer 212a functions as one of the source electrode and the drain electrode, and the conductive layer 212b functions as the other of the source electrode and the drain electrode.
  • the transistor 200C and the transistor 200 have different back gate electrode configurations. Since the transistor 200C has the above-described configuration, the conductive layer 112b that functions as the other of the source electrode or drain electrode of the transistor 100 and the conductive layer 202c that functions as the back gate electrode of the transistor 200C can be formed using the same material and in the same process. Furthermore, the transistor 200C does not have the insulating layer 109 that the transistor 200 has. Therefore, the number of processes involved in manufacturing the semiconductor device 10C can be reduced compared to the semiconductor device 10 shown in FIG. 1B.
  • semiconductor device 10C other than the above, the contents described for semiconductor device 10 can be referred to.
  • ⁇ Configuration Example 5> 6B is a cross-sectional view of a semiconductor device 10D according to one embodiment of the present invention, taken along dashed line A1-A2 in the plan view of the semiconductor device 10 shown in FIG.
  • the semiconductor device 10D has a transistor 100A, a transistor 200, an insulating layer 110, and an insulating layer 109.
  • the semiconductor device 10D differs from the semiconductor device 10 shown in FIG. 1B mainly in that the semiconductor device 10D has a transistor 100A instead of a transistor 100.
  • Transistor 100A differs from transistor 100 in that insulating layer 110s has a layered structure of insulating layer 110s1 and insulating layer 110s2 on insulating layer 110s1.
  • Insulating layer 110s1 is provided in contact with the top surface of conductive layer 112a, the side of insulating layer 110, the side of conductive layer 116, and the side of conductive layer 112b.
  • Insulating layer 110s2 is provided to face the top surface of conductive layer 112a, the side of insulating layer 110, the side of conductive layer 116, and the side of conductive layer 112b via insulating layer 110s1.
  • insulating layer 110s1 for example, the materials and manufacturing methods used for insulating layers 110a, 110c, 110d, and 110f can be applied. Also, as insulating layer 110s2, for example, the materials and manufacturing methods used for insulating layers 110b and 110e can be applied. That is, a material that is difficult for oxygen to permeate can be used for insulating layer 110s1, and a material that contains oxygen and releases oxygen when heated can be used for insulating layer 110s2.
  • the conductive layer 112a and the conductive layer 112b are oxidized by the oxygen released from the insulating layer 110s, and there is a concern that the amount of oxygen supplied from the insulating layer 110s to the semiconductor layer 108 is reduced.
  • the transistor 100A by forming the insulating layer 110s into a stacked structure of the insulating layer 110s1 and the insulating layer 110s2, it is possible to configure the insulating layer 110s2 that releases oxygen to be not in contact with the conductive layer 112a and the conductive layer 112b.
  • semiconductor device 10D other than the above, the contents described for semiconductor device 10 can be referred to.
  • ⁇ Configuration Example 6> 7A is a cross-sectional view of a semiconductor device 10E according to one embodiment of the present invention, taken along dashed line A1-A2 in the plan view of the semiconductor device 10 shown in FIG.
  • the semiconductor device 10E has a transistor 100B, a transistor 200, an insulating layer 110, and an insulating layer 109.
  • the semiconductor device 10E differs from the semiconductor device 10 shown in FIG. 1B mainly in that the semiconductor device 10E has a transistor 100B instead of a transistor 100.
  • Transistor 100B differs from transistor 100 in that it has insulating layer 110g between conductive layer 116 and insulating layer 110s.
  • the insulating layer 110g contains, for example, an oxide of an element contained in the conductive layer 116. If the conductive layer 116 is a metal, the insulating layer 110g is, for example, an oxide of that metal. If the conductive layer 116 is silicon, the insulating layer 110g is, for example, a silicon oxide. For example, a metal oxide such as aluminum oxide or tantalum oxide can be used as the insulating layer 110g, and it is particularly preferable to use aluminum oxide.
  • the insulating layer 110g can function as a back gate insulating layer of the transistor 100B.
  • the stacked structure of the insulating layer 110s and the insulating layer 110g functions as the back gate insulating layer of the transistor 100B.
  • the transistor 100B uses a stacked structure of the insulating layer 110s and the insulating layer 110g as the back gate insulating layer, even if the insulating property of the insulating layer 110g is lower than that of the insulating layer 110s, if sufficient insulating property is obtained by stacking it with the insulating layer 110s, the electrical characteristics and reliability of the transistor 100B may be sufficiently ensured.
  • the insulating layer 110g in the transistor 100B it may be possible to reduce the thickness of the insulating layer 110s. By reducing the thickness of the insulating layer 110s, it is possible to increase the electric field strength applied from the back gate electrode (conductive layer 116) of the transistor 100B to the semiconductor layer 108.
  • a material with a higher relative dielectric constant than the material used for the insulating layer 110s can be suitably used as the insulating layer 110g.
  • the insulating layer 110g can be formed in a self-aligning manner, for example, by forming a layer capable of supplying oxygen so as to be in contact with the surface of the conductive layer 116, and oxidizing the surface of the conductive layer 116 by oxygen supply from the insulating layer 110b and the insulating layer 110e through the layer.
  • the transistor 100B can suppress the leakage current between the semiconductor layer 108 and the conductive layer 116 by having the insulating layer 110g.
  • semiconductor device 10E other than the above, the contents explained for semiconductor device 10 can be referred to.
  • ⁇ Configuration Example 7> 7B is a cross-sectional view of the semiconductor device 10F according to one embodiment of the present invention, taken along dashed line A1-A2 in the plan view of the semiconductor device 10 shown in FIG.
  • the semiconductor device 10F has a transistor 100C, a transistor 200, an insulating layer 110, and an insulating layer 109.
  • the semiconductor device 10F differs from the semiconductor device 10 shown in FIG. 1B mainly in that the semiconductor device 10F has a transistor 100C instead of a transistor 100.
  • Transistor 100C differs from transistor 100 in the configuration of insulating layer 110s.
  • the bottom surface of the insulating layer 110s is in contact with the top surface of the insulating layer 110a, and the side surface of the insulating layer 110a is in contact with the semiconductor layer 108.
  • the insulating layer 110s is not in contact with the conductive layer 112a.
  • the insulating layer 110s can have the function of supplying oxygen to the semiconductor layer 108. Therefore, in a configuration in which the bottom surface of the insulating layer 110s is in contact with the conductive layer 112a, as in the transistor 100, oxygen diffused from the insulating layer 110s may oxidize a portion of the top surface of the conductive layer 112a, increasing its resistance, which may induce a defect that reduces the on-current of the transistor. In contrast, by using a configuration in which the insulating layer 110s and the conductive layer 112a are not in contact, as in the transistor 100C, the risk of inducing the above-mentioned defect can be reduced.
  • semiconductor device 10F other than the above, the contents described for semiconductor device 10 can be referred to.
  • ⁇ Configuration Example 8> 8A is a cross-sectional view of a semiconductor device 10G according to one embodiment of the present invention, taken along dashed dotted line A1-A2 in the plan view of the semiconductor device 10 shown in FIG.
  • the semiconductor device 10G has a transistor 100D, a transistor 200, an insulating layer 110, and an insulating layer 109.
  • the semiconductor device 10F differs from the semiconductor device 10 shown in FIG. 1B mainly in that it has a transistor 100D instead of a transistor 100.
  • Transistor 100D differs from transistor 100 in that it does not have conductive layer 112b and that the ends of semiconductor layer 108 extend outside conductive layer 116 and conductive layer 112a.
  • the semiconductor layer 108 has a region in contact with the top surface of the conductive layer 112a, the side surface of the insulating layer 110s, the curved portion of the insulating layer 110s, and the top surface of the insulating layer 110.
  • the semiconductor layer 108 can function as a semiconductor layer having a channel formation region and as the other of the source electrode and drain electrode.
  • the region of the semiconductor layer 108 that overlaps with the insulating layer 110s can function as the channel formation region.
  • the region located outside the opening 143 can function as the other of the source electrode and drain electrode.
  • the semiconductor layer 108 can be made low-resistance by supplying impurities such as boron to the semiconductor layer 108 from a direction perpendicular to the substrate surface using ion implantation, ion doping, plasma immersion ion implantation, plasma treatment, or the like.
  • impurities such as boron
  • a silicon nitride film or the like can be formed on a region of the semiconductor layer 108 that does not overlap with the opening 143, making the region an oxide conductor (OC), and forming a low-resistance region in the semiconductor layer 108. In this way, the region corresponding to the source region and drain region of the semiconductor layer 108 can be made lower in resistance than the channel formation region.
  • the channel formation region and the source region and drain region having lower resistance than the channel formation region can be separately formed in the semiconductor layer 108.
  • the region corresponding to the source electrode and drain electrode can be formed in the semiconductor layer 108. Therefore, in the transistor 100D, the number of steps involved in the manufacture of the transistor can be reduced by the amount that the conductive layer 112b is not provided.
  • semiconductor device 10G for anything other than the above, the contents explained for semiconductor device 10 can be referred to.
  • ⁇ Configuration Example 9> 8B is a cross-sectional view of a semiconductor device 10H according to one embodiment of the present invention, taken along dashed line A1-A2 in the plan view of the semiconductor device 10 shown in FIG 1A.
  • the semiconductor device 10H has a transistor 100, a transistor 200, an insulating layer 110, and an insulating layer 109.
  • the configuration of the insulating layer 110 of the semiconductor device 10H is different from that of the semiconductor device 10 shown in FIG. 1B.
  • the insulating layers corresponding to the insulating layers 110a, 110b, and 110c are composed only of the insulating layer 110h, and the insulating layers corresponding to the insulating layers 110d, 110e, and 110f are composed only of the insulating layer 110i. That is, the semiconductor device 10H is different from the semiconductor device 10 in that the insulating layer 110 is composed only of two layers, the insulating layer 110h and the insulating layer 110i on the insulating layer 110h.
  • a material that has high blocking properties against oxygen and hydrogen is preferable to use. This makes it possible to suppress the conductive layer 116 from being oxidized by the diffusion of oxygen from the outside of the insulating layers 110h and 110i. Furthermore, it is possible to suppress the oxygen in the semiconductor layer 108 from diffusing to the insulating layer 110h and the insulating layer 110i, and the formation of oxygen vacancies ( VO ) in the semiconductor layer 108. As described above, since the insulating layer 110s has the function of releasing oxygen, even if the insulating layer 110 has the above-mentioned configuration, oxygen can be supplied to the semiconductor layer 108. In the semiconductor device 10H, the number of insulating layers constituting the insulating layer 110 can be significantly reduced, and therefore the number of steps related to the formation of the insulating layer 110 can be reduced compared to the semiconductor device 10 and the like.
  • semiconductor device 10H other than the above, the contents described for semiconductor device 10 can be referred to.
  • ⁇ Configuration Example 10> 9A is a cross-sectional view of a semiconductor device 10I according to one embodiment of the present invention, taken along dashed line A1-A2 in the plan view of the semiconductor device 10 shown in FIG.
  • the semiconductor device 10I has a transistor 100, a transistor 200D, an insulating layer 110, and an insulating layer 109.
  • the semiconductor device 10I differs from the semiconductor device 10 shown in FIG. 1B mainly in that it has a transistor 200D instead of a transistor 200.
  • Transistor 200D differs from transistor 200 in that it does not have a conductive layer 202 that functions as a backgate electrode.
  • the transistor 200 which is a TGSA transistor, can have a longer channel length than the transistor 100, which is a vertical transistor. Therefore, even if the transistor 200 does not have a backgate electrode, it may be possible to achieve higher saturation than the transistor 100.
  • the transistor 200 By configuring the transistor 200 to have no backgate electrode (transistor 200D), the number of steps involved in manufacturing the semiconductor device 10I can be reduced compared to the semiconductor device 10 shown in FIG. 1B.
  • semiconductor device 10I other than the above, the contents described for semiconductor device 10 can be referred to.
  • ⁇ Configuration Example 11> 9B is a cross-sectional view of the semiconductor device 10J according to one embodiment of the present invention, taken along dashed line A1-A2 in the plan view of the semiconductor device 10 shown in FIG.
  • the semiconductor device 10J has a transistor 100E, a transistor 200, an insulating layer 110, and an insulating layer 109.
  • the semiconductor device 10J differs from the semiconductor device 10 shown in FIG. 1B mainly in that the semiconductor device 10J has a transistor 100E instead of a transistor 100.
  • Transistor 100E differs from transistor 100 in that it does not have conductive layer 104. That is, transistor 100E is a transistor that has only one conductive layer (conductive layer 116) that functions as a gate electrode. By providing only conductive layer 116 with the function of a gate electrode as in transistor 100E, it is not necessary to provide conductive layer 104 in opening 143, and the diameter of the top surface shape of opening 143 can be reduced compared to the case where conductive layer 104 is provided. Therefore, transistor 100E can occupy a smaller area in the substrate surface than transistor 100, and a semiconductor device 10J that occupies a smaller area than the semiconductor device 10 shown in FIG. 1B can be realized.
  • semiconductor device 10J for anything other than the above, the contents described for semiconductor device 10 can be referred to.
  • Embodiment 2 In this embodiment, a method for manufacturing a semiconductor device according to one embodiment of the present invention will be described with reference to the drawings. Note that with regard to materials and formation methods of each element, description of the same parts as those described in Embodiment 1 may be omitted.
  • the thin films (insulating films, semiconductor films, conductive films, etc.) that make up semiconductor devices can be formed using methods such as sputtering, chemical vapor deposition (CVD), vacuum deposition, pulsed laser deposition (PLD: Pulsed Laser Deposition), and ALD.
  • CVD methods include PECVD and thermal CVD.
  • One type of thermal CVD method is metal organic chemical vapor deposition (MOCVD: Metal Organic CVD).
  • the thin films (insulating films, semiconductor films, conductive films, etc.) that make up semiconductor devices can be formed by wet film formation methods such as spin coating, dipping, spray coating, inkjet, dispensing, screen printing, offset printing, doctor knife, slit coating, roll coating, curtain coating, or knife coating.
  • the thin film When processing the thin film that constitutes the semiconductor device, a photolithography method or the like can be used.
  • the thin film may be processed by a nanoimprint method, a sandblasting method, a lift-off method, or the like.
  • island-shaped thin films may be directly formed by a film formation method using a shielding mask such as a metal mask.
  • the light used for exposure can be, for example, i-line (wavelength 365 nm), g-line (wavelength 436 nm), h-line (wavelength 405 nm), or a mixture of these. Other light such as ultraviolet light, KrF laser light, or ArF laser light can also be used.
  • Exposure can also be performed by immersion exposure technology. Extreme ultraviolet (EUV) light or X-rays can also be used as the light used for exposure. Electron beams can also be used instead of the light used for exposure. Extreme ultraviolet light, X-rays, or electron beams are preferable because they enable extremely fine processing. When exposure is performed by scanning a beam such as an electron beam, a photomask is not required.
  • etching the thin film one or more of the following methods can be used: dry etching, wet etching, and sandblasting.
  • a conductive film that will become the conductive layer 112a is formed on the substrate 102, and then the conductive film is processed to form the conductive layer 112a.
  • a sputtering method can be suitably used to form the conductive film.
  • insulating film 110af which will become insulating layer 110a
  • insulating film 110bf which will become insulating layer 110b
  • the insulating film 110af and the insulating film 110bf can be preferably formed by sputtering or PECVD. After forming the insulating film 110af, it is preferable to form the insulating film 110bf without exposing the surface of the insulating film 110af to the atmosphere. This makes it possible to prevent impurities from the atmosphere from adhering to the interface between the insulating films 110af and 110bf. Examples of such impurities include water and organic matter. For example, it is preferable to form the insulating film 110bf continuously in the same device after forming the insulating film 110af.
  • the substrate temperature during formation is preferably 180°C or higher and 450°C or lower, more preferably 200°C or higher and 450°C or lower, more preferably 250°C or higher and 450°C or lower, more preferably 300°C or higher and 450°C or lower, more preferably 300°C or higher and 400°C or lower, and even more preferably 350°C or higher and 400°C or lower.
  • the substrate temperature during the formation of the insulating film 110af and the insulating film 110bf can also be room temperature.
  • the insulating films 110af and 110bf are formed before the semiconductor layers 108 and 208, there is no need to worry about oxygen being desorbed from the semiconductor layers 108 and 208 due to the heat applied during the formation of the insulating films 110af and 110bf.
  • oxygen can be supplied to the insulating film 110bf.
  • an ion implantation method, an ion doping method, a plasma immersion ion implantation method, or a plasma treatment can be used as a method for supplying oxygen.
  • an apparatus that converts oxygen gas into plasma by high-frequency power can be suitably used.
  • the apparatus that converts gas into plasma by high-frequency power include a PECVD apparatus, a plasma etching apparatus, and a plasma ashing apparatus.
  • the plasma treatment is preferably performed in an atmosphere containing oxygen.
  • the plasma treatment is preferably performed in an atmosphere containing one or more of oxygen, nitrous oxide (N 2 O), nitrogen dioxide (NO 2 ), carbon monoxide, and carbon dioxide.
  • the plasma treatment can be performed without exposing the surface of the insulating film 110bf to the atmosphere.
  • a PECVD apparatus is used to form the insulating film 110bf, it is preferable to perform the plasma treatment in the PECVD apparatus. This can increase productivity.
  • the N 2 O plasma treatment can be performed continuously in the same apparatus.
  • the film 137 contains oxygen. By forming the film 137, oxygen can be supplied to the insulating film 110bf.
  • the conductivity of the film 137 does not matter.
  • At least one of an insulating film, a semiconductor film, and a conductive film can be used as the film 137.
  • aluminum oxide, hafnium oxide, hafnium aluminate, indium oxide, indium tin oxide (ITO), or indium tin oxide containing silicon (ITSO) can be used as the film 137.
  • the film 137 it is preferable to use an oxide material that contains one or more of the same elements as the semiconductor layer 108 and the semiconductor layer 208. In particular, it is preferable to use a metal oxide material that can be applied to the semiconductor layer 108 and the semiconductor layer 208.
  • the oxygen flow ratio or oxygen partial pressure is, for example, 50% or more and 100% or less, preferably 65% or more and 100% or less, more preferably 80% or more and 100% or less, and even more preferably 90% or more and 100% or less. In particular, it is preferable to set the oxygen flow ratio to 100% and the oxygen partial pressure as close to 100% as possible.
  • oxygen can be supplied to the insulating film 110bf during the formation of the film 137, and oxygen can be prevented from being released from the insulating film 110bf.
  • a large amount of oxygen can be trapped in the insulating film 110bf.
  • a large amount of oxygen can be supplied to the semiconductor layer 108 by a subsequent heat treatment.
  • oxygen vacancies ( VO ) and VOH in the semiconductor layer 108 can be reduced, and a transistor with good electrical characteristics and high reliability can be obtained.
  • a heat treatment can be performed. By performing a heat treatment after the film 137 is formed, oxygen can be effectively supplied from the film 137 to the insulating film 110bf.
  • the temperature of the heat treatment is preferably, for example, 150°C or higher and lower than the distortion point of the substrate, 200°C or higher and 450°C or lower, 230°C or higher and 400°C or lower, 250°C or higher and 350°C or lower, or 250°C or higher and 300°C or lower.
  • the heat treatment can be performed in an atmosphere containing one or more of a noble gas, nitrogen, or oxygen.
  • a noble gas nitrogen, or oxygen.
  • nitrogen or the atmosphere containing oxygen dry air (CDA: Clean Dry Air) can be used. Note that it is preferable that the content of hydrogen, water, and the like in the atmosphere is as small as possible.
  • the atmosphere it is preferable to use a high-purity gas with a dew point of -60°C or lower, preferably -100°C or lower.
  • a high-purity gas with a dew point of -60°C or lower, preferably -100°C or lower.
  • an atmosphere containing as little hydrogen, water, and the like as possible it is possible to prevent hydrogen, water, and the like from being taken into the insulating film 110af and the insulating film 110bf as much as possible.
  • an oven, a rapid heating (RTA: Rapid Thermal Annealing) device, and the like can be used. By using an RTA device, the heating process time can be shortened.
  • oxygen can be further supplied to the insulating film 110bf through the film 137.
  • the above description can be referred to for the method of supplying oxygen, so a detailed description is omitted.
  • film 137 is removed.
  • wet etching can be suitably used. By using wet etching, it is possible to prevent insulating film 110bf from being etched when film 137 is removed. This makes it possible to prevent the thickness of insulating film 110bf from becoming thin, and to make the thickness of insulating film 110bf uniform.
  • oxygen can be further supplied to insulating film 110bf.
  • the above description can be referred to for the method of supplying oxygen.
  • film 139 can be formed on insulating film 110bf, and oxygen can be supplied to insulating film 110bf through film 139.
  • Plasma treatment in an atmosphere containing oxygen can be used as a treatment for supplying oxygen.
  • FIG. 10C shows, with arrows, a schematic diagram of oxygen being supplied to insulating film 110bf through film 139.
  • a conductive film or a semiconductor film As the film 139.
  • a metal oxide film, a metal film, or an alloy film can be used as the film 139. It is preferable to use a metal oxide as the film 139 and form it by a sputtering method or the like in an atmosphere containing oxygen, because oxygen can be supplied to the insulating film 110bf even during the formation of the film 139.
  • the thickness of film 139 is preferably thin. Specifically, the thickness of film 139 is preferably 1 nm or more and 20 nm or less, more preferably 2 nm or more and 15 nm or less, and even more preferably 3 nm or more and 10 nm or less. Typically, the thickness can be about 5 nm.
  • the substrate temperature during the formation of film 139 is preferably 350°C or less, more preferably 340°C or less, even more preferably 330°C or less, and even more preferably 300°C or less. This allows a large amount of oxygen to be supplied to insulating film 110bf.
  • the processing apparatus for supplying oxygen a dry etching apparatus, an ashing apparatus, or a PECVD apparatus can be suitably used. In particular, it is preferable to use an ashing apparatus.
  • the bias voltage When a bias voltage is applied between a pair of electrodes of the processing apparatus, the bias voltage may be, for example, 10 V or more and 1 kV or less. Alternatively, the power density of the bias may be, for example, 1 W/cm 2 or more and 5 W/cm 2 or less.
  • a wet etching method can be suitably used to remove the film 139.
  • the process of supplying oxygen to the insulating film 110bf is not limited to the above-mentioned method.
  • oxygen radicals, oxygen atoms, oxygen atomic ions, or oxygen molecular ions are supplied to the insulating film 110bf by ion doping, ion implantation, or plasma treatment.
  • oxygen can be supplied to the insulating film 110bf through the film. It is preferable to remove the film after supplying oxygen.
  • a conductive film or a semiconductor film containing one or more of indium, zinc, gallium, tin, aluminum, chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt, and tungsten can be used.
  • the amount of oxygen released from insulating layer 110b through insulating layer 110s to the channel formation region of transistor 100 is large.
  • the amount of oxygen contained in insulating layer 110b increases, and the amount of oxygen supplied from insulating layer 110b through insulating layer 110s to semiconductor layer 108 can be increased.
  • even a transistor 100 with a short channel length can exhibit good electrical characteristics.
  • insulating film 110cf which will become insulating layer 110c, is formed on insulating film 110bf (FIG. 10D).
  • the description of the formation of insulating film 110af can be referenced for the formation of insulating film 110cf, so a detailed description is omitted.
  • a conductive film 116f that will become the conductive layer 116 is formed on the insulating film 110cf (FIG. 11A).
  • a sputtering method can be suitably used to form the conductive film 116f.
  • the conductive film 116f is processed to form a conductive layer 116s on the insulating film 110cf so as to have an area overlapping with the conductive layer 112a (FIG. 11B).
  • a wet etching method can be suitably used to form the conductive layer 116s.
  • insulating films 110df, 110ef, and 110ff are formed in this order on the conductive layer 116s and on the insulating film 110cf.
  • the description of the formation of insulating films 110af, 110bf, and 110cf can be referred to for the formation of insulating films 110df, 110ef, and 110ff, so a detailed description will be omitted.
  • oxygen can be supplied to the insulating film 110ef.
  • the description regarding the supply of oxygen to the insulating film 110bf can be referred to, and therefore a detailed description thereof will be omitted.
  • an insulating film 109f that will become the insulating layer 109 is formed on the insulating film 110ff.
  • the formation of the insulating film 109f can be performed by referring to the description of the formation of the insulating films 110af, 110bf, and 110cf, so a detailed description will be omitted.
  • a conductive film 202f that will become the conductive layer 202 is formed on the insulating film 109f (FIG. 11C).
  • a sputtering method can be suitably used to form the conductive film 202f.
  • the conductive film 202f is processed to form a conductive layer 202 on the insulating film 109f (FIG. 12A).
  • the conductive layer 202 is provided in a region that does not overlap with the conductive layer 112a and the conductive layer 116s.
  • a wet etching method can be suitably used to form the conductive layer 202.
  • insulating film 120af which will become insulating layer 120a
  • insulating film 120bf which will become insulating layer 120b
  • the insulating films 120af and 120bf can be preferably formed by sputtering or PECVD. After forming the insulating film 120af, it is preferable to form the insulating film 120bf without exposing the surface of the insulating film 120af to the atmosphere. This makes it possible to prevent impurities from the atmosphere from adhering to the interface between the insulating films 120af and 120bf. Examples of such impurities include water and organic matter. For example, it is preferable to form the insulating film 120bf continuously in the same device after forming the insulating film 120af.
  • the substrate temperature during the formation of the insulating film 120af and the insulating film 120bf is preferably 180°C or higher and 450°C or lower, more preferably 200°C or higher and 450°C or lower, even more preferably 250°C or higher and 450°C or lower, even more preferably 300°C or higher and 450°C or lower, even more preferably 300°C or higher and 400°C or lower, even more preferably 350°C or higher and 400°C or lower.
  • the substrate temperature during the formation of the insulating film 120af and the insulating film 120bf within the above-mentioned range, it is possible to reduce the release of impurities (e.g., water and hydrogen) from the insulating film 120af and the insulating film 120bf, and to suppress the diffusion of the impurities into the semiconductor layer 108 to be formed later. Therefore, it is possible to obtain a transistor that exhibits good electrical characteristics and is highly reliable.
  • impurities e.g., water and hydrogen
  • the insulating films 120af and 120bf are formed before the semiconductor layers 108 and 208, there is no need to worry about oxygen being desorbed from the semiconductor layers 108 and 208 due to the heat applied during the formation of the insulating films 120af and 120bf.
  • oxygen can be supplied to the insulating film 120bf.
  • the method for supplying oxygen can be seen in the description above.
  • the insulating layer 109 is formed by processing the insulating layers 109f, 120af, and 120bf, and the insulating layer 120 having the insulating layers 120a and 120b is formed (FIG. 12C).
  • the insulating layers 109 and 120 are formed at least in the region where the conductive layer 202 is provided. Furthermore, a part of the insulating layer 110 is exposed by forming the insulating layers 109 and 120. For example, a dry etching method can be suitably used to process the insulating layers 109f, 120af, and 120bf.
  • the insulating film 110ff When forming the insulating layer 109 and the insulating layer 120, a part of the insulating film 110ff (later insulating layer 110f) in an area that does not overlap with either the insulating layer 109 or the insulating layer 120 may be etched, and the thickness of the insulating film 110ff in that area may become thin. It is preferable that the insulating film 110ff has a high selectivity with respect to the insulating layer 109 and the insulating layer 120 when etching the insulating layer 109 and the insulating layer 120. This is preferable because it is possible to prevent the thickness of the insulating film 110ff from becoming thin.
  • a conductive film 112bf that will become the conductive layer 112b is formed on the insulating layer 120 and the insulating film 110ff (FIG. 13A).
  • the conductive film 112bf can be formed, for example, by a sputtering method.
  • the conductive film 112bf, the insulating film 110ff, the insulating film 110ef, the insulating film 110df, the conductive layer 116s, the insulating film 110cf, the insulating film 110bf, and the insulating film 110af are partially removed to form the conductive layer 112B, the conductive layer 116, and the insulating layer 110 (insulating layer 110f, insulating layer 110e, insulating layer 110d, insulating layer 110c, insulating layer 110b, and insulating layer 110a) having the opening 143 (FIG. 13B).
  • the opening 143 is provided in a region overlapping with the conductive layer 112a. By forming the opening 143, a part of the conductive layer 112a is exposed.
  • a dry etching method can be suitably used to form the conductive layer 112B and the insulating layer 110.
  • the conductive layer 112B and the insulating layer 110 can be formed at the same time by using the same resist mask.
  • the conductive layer 112B and the insulating layer 110 can also be formed separately. For example, after the conductive layer 112B is formed using a first resist mask, the first resist mask can be removed, and then the insulating layer 110 can be formed using a second resist mask.
  • the conductive layer 112a may have a recess in a region overlapping with the opening 143. This allows the semiconductor layer 108 and the conductive layer 104 to be provided even in the recess, thereby strengthening the electric field of the gate electrode applied to the channel formation region near the conductive layer 112a. This allows the on-current of the transistor 100 to be increased. For example, when the opening 143 is formed, etching is performed so that a part of the top surface of the conductive layer 112a is removed, thereby forming the conductive layer 112a having the recess.
  • insulating film 110sf which will become insulating layer 110s, is formed so as to cover opening 143 (FIG. 13C). Insulating film 110sf is provided in contact with the top surface of conductive layer 112B, the side surface of conductive layer 112B in opening 143, the side surface of insulating layer 110 in opening 143, the side surface of conductive layer 116 in opening 143, and the top surface of conductive layer 112a in opening 143.
  • a portion of the insulating film 110sf is removed by etching to form the insulating layer 110s (FIG. 14A). Specifically, the region of the insulating film 110sf that contacts the upper surface of the conductive layer 112a and the region that contacts the upper surface of the conductive layer 112B are removed by etching, and the region that contacts the side of the conductive layer 112B in the opening 143, the side of the insulating layer 110 in the opening 143, and the side of the conductive layer 116 in the opening 143 remain, thereby forming the insulating layer 110s.
  • the upper end of the insulating layer 110s has a curved shape.
  • anisotropic etching can be used to etch the insulating film 110sf. More specifically, for example, the insulating layer 110s can be formed by performing highly anisotropic etching using a dry etching method.
  • a portion of the insulating film 110sf may remain on the side surface of the step portion of the conductive layer 112B outside the opening 143.
  • the conductive layer 112b is formed so as to have an area overlapping with the conductive layer 116 and the conductive layer 112a.
  • a wet etching method can be suitably used to form the conductive layer 112b.
  • metal oxide film 108f which will become semiconductor layer 108 and semiconductor layer 208, is formed so as to cover opening 143 (FIG. 14C).
  • Metal oxide film 108f is provided in contact with the upper surface of conductive layer 112a in opening 143, the side of insulating layer 110s in opening 143, the curved portion of insulating layer 110s, the upper surface of conductive layer 112b, the side of conductive layer 112b, the upper surface of insulating layer 110, the side of insulating layer 109, the side of insulating layer 120, and the upper surface of insulating layer 120.
  • the metal oxide film 108f is preferably formed by a sputtering method using a metal oxide target.
  • the metal oxide film 108f is preferably formed by an ALD method.
  • the ALD method has high coverage and can be suitably used to form the metal oxide film 108f that covers the opening 143.
  • a metal oxide film can be formed with good coverage on the side surface of the insulating layer 110s.
  • the ALD method makes it easy to control the film formation speed, so a thin film can be formed with good yield.
  • the metal oxide film 108f is preferably a dense film with as few defects as possible.
  • the metal oxide film 108f is preferably a high-purity film with as few impurities, including hydrogen, as possible reduced.
  • oxygen gas oxygen can be suitably supplied to the insulating layer 110s and the insulating layer 120.
  • oxygen gas oxygen can be suitably supplied to the insulating layer 110s.
  • oxygen can be suitably supplied to the insulating layer 120b.
  • oxygen can be supplied to the channel formation region of the semiconductor layer 108 in a later step, and oxygen vacancies ( VO ) and VOH in the channel formation region can be reduced.
  • oxygen vacancies ( VO ) and VOH in the channel formation region can be reduced.
  • oxygen gas can be mixed with an inert gas (e.g., helium gas, argon gas, xenon gas, etc.).
  • an inert gas e.g., helium gas, argon gas, xenon gas, etc.
  • the lower the oxygen flow rate ratio or the oxygen partial pressure the lower the crystallinity and the higher the electrical conductivity of the metal oxide film can be, and the larger the on-current of the transistor can be.
  • the metal oxide film may become polycrystalline.
  • the grain boundaries become the recombination centers, and carriers may be captured, resulting in a small on-current of the transistor. Therefore, it is preferable to adjust the oxygen flow ratio or oxygen partial pressure so that the metal oxide film 108f does not become polycrystalline. Since the ease with which the metal oxide film becomes polycrystalline differs depending on the composition of the metal oxide film, the oxygen flow ratio or oxygen partial pressure can be adjusted according to the composition of the metal oxide film 108f.
  • the higher the substrate temperature when forming the metal oxide film the higher the crystallinity and the denser the metal oxide film will be.
  • the lower the substrate temperature the lower the crystallinity and the higher the electrical conductivity of the metal oxide film will be.
  • the substrate temperature during the formation of the metal oxide film 108f is preferably from room temperature to 250°C, more preferably from room temperature to 200°C, and even more preferably from room temperature to 140°C.
  • a substrate temperature of from room temperature to 140°C is preferable because it increases productivity.
  • the crystallinity can be reduced.
  • the metal oxide film may become polycrystalline. It is preferable to adjust the substrate temperature so that the metal oxide film 108f does not become polycrystalline.
  • the substrate temperature can be adjusted according to the composition to be applied to the metal oxide film 108f.
  • the thermal ALD method is preferable because it shows extremely high coating properties.
  • the PEALD method is preferable because it shows high coating properties and allows low-temperature film formation.
  • the metal oxide film can be formed, for example, by the ALD method using a precursor containing the constituent metal elements and an oxidizing agent.
  • three precursors can be used: a precursor containing indium, a precursor containing gallium, and a precursor containing zinc.
  • two precursors can be used: a precursor containing indium, and a precursor containing gallium and zinc.
  • precursors containing indium include triethylindium, trimethylindium, tris(2,2,6,6-tetramethyl-3,5-heptanedionate)indium, cyclopentadienylindium, indium(III) chloride, (3-(dimethylamino)propyl)dimethylindium, and [1,1,1-trimethyl-N-(trimethylsilyl)amide]-indium.
  • precursors containing gallium include trimethylgallium, triethylgallium, gallium trichloride, tris(dimethylamido)gallium(III), gallium(III) acetylacetonate, tris(2,2,6,6-tetramethyl-3,5-heptanedionate)gallium, dimethylchlorogallium, and diethylchlorogallium.
  • aluminum-containing precursors examples include aluminum chloride and trimethylaluminum.
  • precursors containing tin include tin(IV) chloride and tetrakis(dimethylamido)tin.
  • Examples of zinc-containing precursors include dimethylzinc, diethylzinc, zinc bis(2,2,6,6-tetramethyl-3,5-heptanedionate), and zinc chloride.
  • Oxidizing agents include, for example, ozone, oxygen, and water.
  • Methods for controlling the composition of the resulting film include adjusting one or more of the type of raw material gas, the flow rate ratio of the raw material gas, the time for which the raw material gas is flowed, and the order in which the raw material gas is flowed. By adjusting these, the composition of the metal oxide film 108f can be controlled. In addition, by adjusting these, a film whose composition changes continuously can be formed. A configuration in which the composition of the metal oxide film 108f changes continuously can also be used.
  • a treatment for removing water, hydrogen, organic substances, and the like adsorbed on the surfaces of the insulating layer 110s, the insulating layer 109, and the insulating layer 120 and a treatment for supplying oxygen to the insulating layer 110s and the insulating layer 120 For example, a heat treatment can be performed at a temperature of 70° C. or higher and 200° C. or lower in a reduced pressure atmosphere. Alternatively, a plasma treatment can be performed in an atmosphere containing oxygen. Alternatively, oxygen can be supplied to the insulating layer 110s and the insulating layer 120 by a plasma treatment in an atmosphere containing an oxidizing gas such as nitrous oxide (N 2 O).
  • oxygen can be supplied to the insulating layer 110s and the insulating layer 120 while the organic substances on the surfaces of the insulating layer 110s, the insulating layer 109, and the insulating layer 120 are suitably removed.
  • the semiconductor layer 108 and the semiconductor layer 208 have a laminated structure, it is preferable to deposit the next metal oxide film in succession after depositing the first metal oxide film without exposing the surface to the air.
  • all layers constituting the semiconductor layer 108 and the semiconductor layer 208 can be formed by the same film formation method (for example, sputtering or ALD).
  • ALD atomic layer deposition
  • different film formation methods can be used for different layers.
  • the first metal oxide layer can be formed by sputtering
  • the second metal oxide layer can be formed by ALD.
  • the metal oxide film 108f is processed into an island shape to form the semiconductor layer 108 and the semiconductor layer 208 ( Figure 15A).
  • the semiconductor layer 108 is formed so as to have an area that overlaps with the conductive layer 112a and the conductive layer 112b.
  • the semiconductor layer 208 is formed so as to have an area that overlaps with the conductive layer 202.
  • wet etching can be suitably used to form the semiconductor layer 108 and the semiconductor layer 208. At this time, a part of the insulating layer 110 and the conductive layer 112b in the region that does not overlap with either the semiconductor layer 108 or the semiconductor layer 208 may be etched and become thin. Note that in etching the metal oxide film 108f, it is preferable to use a material with a high selectivity for each of the insulating layer 110 and the conductive layer 112b, which can prevent the insulating layer 110 and the conductive layer 112b from becoming thin.
  • the heat treatment can remove hydrogen and water contained in the metal oxide film 108f, or the semiconductor layer 108 and the semiconductor layer 208, or adsorbed on the surface.
  • the heat treatment can also improve the film quality of the metal oxide film 108f, or the semiconductor layer 108 and the semiconductor layer 208 (for example, defects are reduced or crystallinity is improved).
  • oxygen can be supplied from the insulating layer 110s and the insulating layer 120b to the metal oxide film 108f, or from the insulating layer 110s to the semiconductor layer 108, and from the insulating layer 120b to the semiconductor layer 208.
  • This can reduce oxygen vacancies (V O ) in the channel formation regions of the transistors 100 and 200.
  • it is more preferable to perform the heat treatment before processing the metal oxide film 108f into the semiconductor layer 108 and the semiconductor layer 208.
  • the above description can be referred to for the heat treatment, and detailed description thereof will be omitted. Note that the heat treatment is not limited to this, and oxygen may be supplied to the channel formation region even in a step in which heat is applied after the formation of the metal oxide film 108f (for example, a step of forming the insulating layer 106).
  • this heat treatment does not have to be performed if it is not necessary. Also, instead of performing the heat treatment here, it is possible to combine this with a heat treatment performed in a later process. Also, a high-temperature process in a later process (e.g., a film formation process) may also serve as this heat treatment.
  • insulating film 106f which will become insulating layer 106, is formed to cover semiconductor layer 108, semiconductor layer 208, and insulating layer 110 (FIG. 15B).
  • PECVD or ALD can be suitably used to form insulating film 106f.
  • the insulating layer 106 When a metal oxide is used for the semiconductor layer 108 and the semiconductor layer 208, the insulating layer 106 preferably functions as a barrier film that suppresses oxygen diffusion.
  • the insulating layer 106 has a function of suppressing oxygen diffusion, whereby oxygen contained in the semiconductor layer 108 and the semiconductor layer 208 is suppressed from diffusing above the insulating layer 106, and an increase in oxygen vacancies ( VO ) in the semiconductor layer 108 and the semiconductor layer 208 can be suppressed. As a result, a transistor having good electrical characteristics and high reliability can be obtained.
  • the insulating layer 106 can have fewer defects. However, if the temperature during the formation of the insulating film 106f is high, oxygen is released from the semiconductor layer 108 and the semiconductor layer 208, and oxygen vacancies (V O ) and V O H in the semiconductor layer 108 and the semiconductor layer 208 may increase.
  • the substrate temperature during the formation of the insulating film 106f is preferably 180° C. to 450° C., more preferably 200° C. to 450° C., more preferably 250° C. to 450° C., even more preferably 300° C. to 450° C., and even more preferably 300° C. to 400° C.
  • the substrate temperature during the formation of the insulating film 106f within the above range, it is possible to reduce defects in the insulating layer 106 and suppress release of oxygen from the semiconductor layer 108 and the semiconductor layer 208. Therefore, a transistor exhibiting good electrical characteristics and high reliability can be obtained.
  • a plasma treatment can be performed on the surfaces of the semiconductor layer 108 and the semiconductor layer 208.
  • the plasma treatment can reduce impurities (e.g., water) adsorbed on the surfaces of the semiconductor layer 108 and the semiconductor layer 208. Therefore, impurities at the interface between the semiconductor layer 108 and the insulating layer 106 and the interface between the semiconductor layer 208 and the insulating layer 106 can be reduced, and a highly reliable transistor can be realized. This is particularly suitable for the case where the surfaces of the semiconductor layer 108 and the semiconductor layer 208 are exposed to the air between the formation of the semiconductor layer 108 and the semiconductor layer 208 and the formation of the insulating film 106f.
  • the plasma treatment can be performed in an atmosphere of oxygen, ozone, nitrogen, nitrous oxide, argon, or the like. In addition, it is preferable that the plasma treatment and the formation of the insulating film 106f are performed successively without exposure to the air.
  • the insulating film 106f is processed to form the insulating layer 106 (FIG. 15C).
  • the insulating layer 106 is provided with openings 147a and 147b that reach the semiconductor layer 208.
  • a portion of the insulating layer 106 is provided so as to have an area that overlaps with the semiconductor layer 108 and the conductive layer 112b, and another portion of the insulating layer 106 (the area sandwiched between the openings 147a and 147b) is provided so as to have an area that overlaps with the conductive layer 202. Dry etching can be suitably used to form the insulating layer 106.
  • a conductive film 104f that will become the conductive layer 104, the conductive layer 204, the conductive layer 212a, and the conductive layer 212b is formed on the insulating layer 106 (FIG. 16A).
  • a sputtering method, a thermal CVD method (including an MOCVD method), or an ALD method can be suitably used to form the conductive film 104f.
  • the conductive film 104f is processed to form the conductive layer 104, the conductive layer 204, the conductive layer 212a, and the conductive layer 212b ( Figure 16B).
  • the conductive layer 104 is formed to have a region that overlaps with the opening 143.
  • the conductive layer 204 is formed to have a region that overlaps with the conductive layer 202 and the insulating layer 106.
  • the conductive layer 212a is formed to have a region that overlaps with the opening 147a.
  • the conductive layer 212b is formed to have a region that overlaps with the opening 147b.
  • impurities are supplied (also referred to as added or injected) to the semiconductor layer 208 using the conductive layer 204, the conductive layer 212a, and the conductive layer 212b as masks.
  • a region 208D is formed in a region of the semiconductor layer 208 that does not overlap with any of the conductive layer 204, the conductive layer 212a, the conductive layer 212b, and the insulating layer 106
  • a region 208L is formed in a region that does not overlap with any of the conductive layer 204, the conductive layer 212a, and the conductive layer 212b and overlaps with the insulating layer 106 (FIG. 16C).
  • the conditions for supplying the impurities in consideration of the material and thickness of the conductive layer 204 that serves as a mask so that impurities are not supplied as much as possible to the region of the semiconductor layer 208 that overlaps with the conductive layer 204.
  • a channel formation region in which the impurity concentration is sufficiently reduced can be formed in the region of the semiconductor layer 208 that overlaps with the conductive layer 204.
  • impurities may be supplied to the semiconductor layer 108 using the conductive layer 104 as a mask. By supplying the impurities, a region 108L is formed in a region of the semiconductor layer 108 that does not overlap with the conductive layer 104 and overlaps with the insulating layer 106.
  • the impurities can be preferably supplied by plasma ion doping or ion implantation. These methods allow the concentration profile in the depth direction to be controlled with high precision by the ion acceleration voltage and dose amount. By using the plasma ion doping method, productivity can be increased. In addition, by using the ion implantation method using mass separation, the purity of the supplied impurities can be increased.
  • the impurity concentration is highest on the surface of the semiconductor layer 208 or in the area close to the surface.
  • the source material used for supplying the impurity may be, for example, a gas containing the above-mentioned impurity element.
  • a gas containing the above-mentioned impurity element typically, one or more of B2H6 gas and BF3 gas may be used.
  • B2H6 gas and BF3 gas may be used.
  • PH3 gas may be used. Gases obtained by diluting these source gases with a noble gas may also be used.
  • Examples of the raw material used for supplying the impurity include CH4 , N2 , NH3 , AlH3 , AlCl3 , SiH4 , Si2H6 , F2 , HF, H2 , ( C5H5 ) 2Mg , and noble gases. Note that the raw material is not limited to gas , and a solid or liquid may be heated and vaporized for use.
  • the supply of impurities can be controlled by setting conditions such as acceleration voltage and dose amount, taking into account the composition, density, thickness, etc. of the insulating layer 106 and the semiconductor layer 208.
  • the acceleration voltage can be, for example, in the range of 5 kV to 100 kV, preferably 7 kV to 70 kV, and more preferably 10 kV to 50 kV.
  • the dose can be, for example, in the range of 1 ⁇ 10 13 ions/cm 2 to 1 ⁇ 10 17 ions/cm 2 , preferably 1 ⁇ 10 14 ions/cm 2 to 5 ⁇ 10 16 ions/cm 2 , and more preferably 1 ⁇ 10 15 ions/cm 2 to 3 ⁇ 10 16 ions/cm 2 .
  • the acceleration voltage can be, for example, in the range of 10 kV to 100 kV, preferably 30 kV to 90 kV, and more preferably 40 kV to 80 kV.
  • the dose can be, for example, in the range of 1 ⁇ 10 13 ions/cm 2 to 1 ⁇ 10 17 ions/cm 2 , preferably 1 ⁇ 10 14 ions/cm 2 to 5 ⁇ 10 16 ions/cm 2 , and more preferably 1 ⁇ 10 15 ions/cm 2 to 3 ⁇ 10 16 ions/cm 2 .
  • the method of supplying the impurities is not limited to this, and for example, plasma processing or processing utilizing thermal diffusion by heating can also be used.
  • the impurities can be supplied by generating plasma in a gas atmosphere containing the impurities to be supplied and performing plasma processing.
  • a dry etching apparatus, an ashing apparatus, a plasma CVD apparatus, a high-density plasma CVD apparatus, etc. can be used as an apparatus for generating the above plasma.
  • hydrogen can be supplied as an impurity to the semiconductor layer 208 in the region that does not overlap with the conductive layer 204.
  • a plasma CVD apparatus to perform plasma treatment in an atmosphere containing a gas containing hydrogen, hydrogen can be supplied as an impurity to the semiconductor layer 208 in the region that does not overlap with the conductive layer 204.
  • a plasma CVD apparatus to supply the impurity and form the insulating layer 195, the supply of the impurity and the formation of the insulating layer 195 can be performed continuously in the same apparatus, thereby improving productivity.
  • transistor 100 and transistor 200 This results in the formation of transistor 100 and transistor 200.
  • an insulating layer 195 is formed covering the conductive layer 104, the conductive layer 204, the conductive layer 212a, the conductive layer 212b, the insulating layer 106, and the semiconductor layer 208 (FIG. 1B).
  • the insulating layer 195 can be preferably formed by the PECVD method.
  • the deposition temperature of the insulating layer 195 may be determined taking into account the diffusion of impurities.
  • the deposition temperature of the insulating layer 195 can be, for example, 150°C or higher and 400°C or lower, preferably 180°C or higher and 360°C or lower, and more preferably 200°C or higher and 250°C or lower.
  • a heat treatment can be performed.
  • the heat treatment may reduce the electrical resistance of the regions 108L, 208L, and 208D.
  • the heat treatment may cause the impurities to diffuse appropriately, forming the regions 208L and 208D with an ideal impurity concentration gradient.
  • the above description of the heat treatment can be referred to, and a detailed description is omitted. Note that if the temperature of the heat treatment is too high (for example, 500° C. or higher), the impurities may diffuse to the channel formation region, which may cause deterioration in the electrical characteristics and reliability of the transistor.
  • a semiconductor device 10 according to one embodiment of the present invention can be manufactured.
  • the display device of this embodiment can be a high-resolution display device or a large display device. Therefore, the display device of this embodiment can be used in electronic devices with relatively large screens, such as television devices, desktop or notebook computers, computer monitors, digital signage, large game machines such as pachinko machines, as well as the display unit of digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and audio playback devices.
  • electronic devices with relatively large screens such as television devices, desktop or notebook computers, computer monitors, digital signage, large game machines such as pachinko machines, as well as the display unit of digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and audio playback devices.
  • the display device of this embodiment can be a high-definition display device. Therefore, the display device of this embodiment can be used, for example, in the display section of a wristwatch-type or bracelet-type information terminal (wearable device), as well as in the display section of a wearable device that can be worn on the head, such as a head-mounted display (HMD) or other VR device, and a glasses-type AR device.
  • a wearable device such as a head-mounted display (HMD) or other VR device, and a glasses-type AR device.
  • HMD head-mounted display
  • AR device glasses-type AR device
  • the semiconductor device of one embodiment of the present invention can be used in a display device or a module having the display device.
  • the module having the display device include a module to which a connector such as a flexible printed circuit (hereinafter, referred to as FPC) or a TCP (Tape Carrier Package) is attached to the display device, and a module to which an integrated circuit (IC) is mounted by a COG (Chip On Glass) method or a COF (Chip On Film) method, etc.
  • FPC flexible printed circuit
  • TCP Tape Carrier Package
  • the display device of this embodiment can be configured to function as a touch panel.
  • various detection elements also called sensor elements
  • a detectable object such as a finger
  • Sensor types include, for example, capacitance type, resistive film type, surface acoustic wave type, infrared type, optical type, and pressure sensitive type.
  • Examples of the capacitance type include the surface capacitance type and the projected capacitance type.
  • Examples of the projected capacitance type include the self-capacitance type and the mutual capacitance type.
  • the mutual capacitance type is preferable because it allows simultaneous multi-point detection.
  • Touch panels include, for example, out-cell, on-cell, and in-cell types.
  • an in-cell touch panel is one in which electrodes constituting a sensing element are provided on one or both of the substrate supporting the display element (also called a display device) and the opposing substrate.
  • FIG. 17A shows a perspective view of a display device 50A.
  • Display device 50A has a configuration in which substrate 152 and substrate 151 are bonded together.
  • substrate 152 is indicated by a dashed line.
  • the display device 50A has a display section 162, a connection section 140, a circuit section 164, a conductive layer 165, etc.
  • FIG. 17A shows an example in which an IC 173 and an FPC 172 are mounted on the display device 50A. Therefore, the configuration shown in FIG. 17A can also be said to be a display module having the display device 50A, an IC, and an FPC.
  • connection portion 140 is provided on the outside of the display portion 162.
  • the connection portion 140 can be provided along one or more sides of the display portion 162.
  • FIG. 17A shows an example in which the connection portion 140 is provided so as to surround the four sides of the display portion.
  • the connection portion 140 connects the common electrode of the display element and the conductive layer, and can supply a potential to the common electrode.
  • the circuit portion 164 has, for example, a scanning line driver circuit (also called a gate driver).
  • the circuit portion 164 can also have both a scanning line driver circuit and a signal line driver circuit (also called a source driver).
  • the conductive layer 165 has a function of supplying signals and power to the display portion 162 and the circuit portion 164.
  • the signals and power are input to the conductive layer 165 from the outside via the FPC 172, or are input to the conductive layer 165 from the IC 173.
  • FIG. 17A shows an example in which an IC 173 is provided on a substrate 151 by a COG method, a COF method, or the like.
  • an IC having one or both of a scanning line driver circuit and a signal line driver circuit can be used as the IC 173.
  • the display device 50A and the display module can be configured so as not to include an IC.
  • the IC can be mounted on an FPC by a COF method, or the like.
  • the semiconductor device of one embodiment of the present invention can be applied to, for example, one or both of the display portion 162 and the circuit portion 164 of the display device 50A.
  • An oxide semiconductor (OS) can be preferably used for a channel formation region of a transistor included in the display device.
  • OS oxide semiconductor
  • the semiconductor device of one embodiment of the present invention can be used for both the display portion 162 and the circuit portion 164, that is, all the transistors included in the display device can be OS transistors. By using OS transistors for all the transistors included in the display device in this manner, an effect of keeping manufacturing costs low can be obtained.
  • the semiconductor device of one embodiment of the present invention when the semiconductor device of one embodiment of the present invention is applied to a pixel circuit of a display device, the area occupied by the pixel circuit can be reduced, and a high-definition display device can be obtained. Furthermore, when the semiconductor device of one embodiment of the present invention is applied to a driver circuit of a display device (e.g., one or both of a gate line driver circuit and a source line driver circuit), the area occupied by the driver circuit can be reduced, and a display device with a narrow frame can be obtained. Furthermore, since the semiconductor device of one embodiment of the present invention has good electrical characteristics, the reliability of the display device can be improved by using it in a display device.
  • a driver circuit of a display device e.g., one or both of a gate line driver circuit and a source line driver circuit
  • the display unit 162 is an area in the display device 50A that displays an image, and has a number of periodically arranged pixels 210.
  • Figure 17A shows an enlarged view of one pixel 210.
  • pixel arrangements there are no particular limitations on the pixel arrangement in the display device of this embodiment, and various methods can be applied. Examples of pixel arrangements include a stripe arrangement, an S-stripe arrangement, a matrix arrangement, a delta arrangement, a Bayer arrangement, and a Pentile arrangement.
  • the pixel 210 shown in FIG. 17A has a pixel 230R that emits red light, a pixel 230G that emits green light, and a pixel 230B that emits blue light.
  • a full-color display can be realized by configuring one pixel 210 with pixels 230R, 230G, and 230B.
  • Each of the pixels 230R, 230G, and 230B functions as a subpixel.
  • the display device 50A shown in FIG. 17A shows an example in which the pixels 230 that function as subpixels are arranged in a stripe array.
  • the number of subpixels that configure one pixel 210 is not particularly limited. For example, a configuration having four subpixels that emit R, G, B, and white (W) light can be used. Or, a configuration having four subpixels that emit R, G, B, and Y light can be used.
  • Pixel 230R, pixel 230G, and pixel 230B each have a display element and a circuit that controls the driving of the display element.
  • Various elements can be used as display elements, including liquid crystal elements and light-emitting elements.
  • shutter-type or optical interference-type MEMS (Micro Electro Mechanical Systems) elements display elements using microcapsules, electrophoresis, electrowetting, or electronic liquid powder (registered trademark) methods can also be used.
  • QLEDs Quantum-dot LEDs that use a light source and color conversion technology using quantum dot materials can be used.
  • Display devices using liquid crystal elements include, for example, transmissive liquid crystal display devices, reflective liquid crystal display devices, and semi-transmissive liquid crystal display devices.
  • Modes that can be used in displays using liquid crystal elements include, for example, vertical alignment (VA) mode, FFS (Fringe Field Switching) mode, IPS (In-Plane Switching) mode, TN (Twisted Nematic) mode, and ASM (Axially Symmetrically aligned Micro-cell) mode.
  • VA mode include the MVA (Multi-Domain Vertical Alignment) mode, the PVA (Patterned Vertical Alignment) mode, and the ASV (Advanced Super View) mode.
  • Liquid crystal materials that can be used in liquid crystal elements include, for example, thermotropic liquid crystal, low molecular weight liquid crystal, polymer liquid crystal, polymer dispersed liquid crystal (PDLC: Polymer Dispersed Liquid Crystal), polymer network liquid crystal (PNLC: Polymer Network Liquid Crystal), ferroelectric liquid crystal, and antiferroelectric liquid crystal.
  • thermotropic liquid crystal low molecular weight liquid crystal
  • polymer liquid crystal polymer dispersed liquid crystal
  • PNLC Polymer Network liquid crystal
  • ferroelectric liquid crystal and antiferroelectric liquid crystal.
  • these liquid crystal materials can exhibit a cholesteric phase, smectic phase, cubic phase, chiral nematic phase, isotropic phase, blue phase, etc.
  • either positive type liquid crystal or negative type liquid crystal can be used as the liquid crystal material, and can be selected according to the mode or design to be applied.
  • Light-emitting elements include, for example, self-emitting light-emitting elements such as LEDs, OLEDs (organic LEDs), and semiconductor lasers. LEDs can also be, for example, mini LEDs and micro LEDs.
  • Light-emitting materials that light-emitting elements have include, for example, materials that emit fluorescence (fluorescent materials), materials that emit phosphorescence (phosphorescent materials), materials that exhibit thermally activated delayed fluorescence (thermally activated delayed fluorescence (TADF) materials), and inorganic compounds (quantum dot materials, etc.).
  • fluorescent materials materials that emit fluorescence
  • phosphorescent materials materials that emit phosphorescence
  • TADF thermally activated delayed fluorescence
  • inorganic compounds quantum dot materials, etc.
  • the light-emitting element can emit light of infrared, red, green, blue, cyan, magenta, yellow, or white.
  • the color purity can be increased by providing the light-emitting element with a microcavity structure.
  • one electrode functions as an anode and the other electrode functions as a cathode.
  • the display device of one embodiment of the present invention may be a top-emission type that emits light in a direction opposite to the substrate on which the light-emitting elements are formed, a bottom-emission type that emits light toward the substrate on which the light-emitting elements are formed, or a dual-emission type that emits light on both sides.
  • FIG. 17B is a block diagram illustrating the display device 50A.
  • the display device 50A has a display unit 162 and a circuit unit 164.
  • the display unit 162 has a plurality of periodically arranged pixels 230 (pixels 230[1,1] to 230[m,n], where m and n are each independently an integer of 2 or more).
  • the circuit unit 164 has a first drive circuit unit 231 and a second drive circuit unit 232.
  • the circuit included in the first drive circuit unit 231 functions, for example, as a scanning line drive circuit.
  • the circuit included in the second drive circuit unit 232 functions, for example, as a signal line drive circuit. Note that some kind of circuit can be provided at a position facing the first drive circuit unit 231 across the display unit 162. Some kind of circuit can be provided at a position facing the second drive circuit unit 232 across the display unit 162.
  • the circuit portion 164 can include various circuits such as a shift register circuit, a level shifter circuit, an inverter circuit, a latch circuit, an analog switch circuit, a demultiplexer circuit, and a logic circuit.
  • the circuit portion 164 can include transistors, capacitors, and the like. The transistors included in the circuit portion 164 can be formed in the same process as the transistors included in the pixel 230.
  • Display device 50A has wiring 236 that are arranged approximately in parallel and whose potential is controlled by a circuit included in first drive circuit section 231, and wiring 238 that are arranged approximately in parallel and whose potential is controlled by a circuit included in second drive circuit section 232.
  • FIG. 17B shows an example in which wiring 236 and wiring 238 are connected to pixel 230.
  • wiring 236 and wiring 238 are just an example, and wirings connected to pixel 230 are not limited to wiring 236 and wiring 238.
  • a vertical transistor (VFET) with a short channel length and a large on-state current and a TGSA transistor with a long channel length and high saturation can be formed by sharing some of the steps.
  • An oxide semiconductor (OS) can be preferably used for the channel formation region of these transistors, and the transistors can have a small off-state current.
  • the semiconductor device of one embodiment of the present invention can be preferably used for one or both of the display portion 162 and the circuit portion 164.
  • the semiconductor device of one embodiment of the present invention can be used for both the display portion 162 and the circuit portion 164, that is, all the transistors included in the display device can be OS transistors.
  • Example of drive circuit configuration As a circuit that can be used for the driver circuit, a configuration example will be described taking a latch circuit as an example.
  • FIG. 18A is a circuit diagram showing an example of the configuration of a latch circuit LAT.
  • the latch circuit LAT shown in FIG. 18A has transistors Tr31, Tr33, Tr35, Tr36, a capacitance element C31, and an inverter circuit INV.
  • a node to which one of the source or drain of transistor Tr33, the gate (first gate) of transistor Tr35, and one electrode of the capacitance element C31 are connected is referred to as node N.
  • the transistor Tr33 when a high potential signal is input to the terminal SMP, the transistor Tr33 is turned on. As a result, the potential of the node N becomes a potential corresponding to the potential of the terminal ROUT, and data corresponding to the signal input from the terminal ROUT to the latch circuit LAT is written to the latch circuit LAT. After the data is written to the latch circuit LAT, if the potential of the terminal SMP is made low, the transistor Tr33 is turned off. As a result, the potential of the node N is held, and the data written to the latch circuit LAT is held.
  • transistor Tr33 It is preferable to use a transistor with a small off-state current for the transistor Tr33.
  • An OS transistor can be suitably used for the transistor Tr33. This allows the latch circuit LAT to hold data for a long period of time. This reduces the frequency with which data is rewritten to the latch circuit LAT.
  • writing data to the latch circuit LAT such that the signal input from terminal SP2 is output to terminal LIN may be simply referred to as "writing data to the latch circuit LAT.”
  • writing data with a value of "1" to the latch circuit LAT may be simply referred to as "writing data to the latch circuit LAT.”
  • a semiconductor device can be suitably used in the latch circuit LAT.
  • the transistor 100 or the transistor 200 shown in FIG. 1B can be used for one or more of the transistors Tr31, Tr33, Tr35, and Tr36.
  • the backgates of the transistors of one embodiment of the present invention can be connected to a wiring to which a ground potential or any potential is applied, or can be connected to another terminal (gate (first gate), source, or drain) of the transistor.
  • the inverter circuit INV has transistors Tr41, Tr43, Tr45, Tr47, and a capacitance element C41.
  • all the transistors in the latch circuit LAT can be transistors of the same polarity, for example, n-channel transistors. This allows, for example, transistor Tr33 as well as transistors Tr31, Tr35, Tr36, Tr41, Tr43, Tr45, and Tr47 to be OS transistors. Therefore, all the transistors in the latch circuit LAT can be manufactured in the same process.
  • a semiconductor device can be preferably used for the inverter circuit INV.
  • the transistor 100 or the transistor 200 shown in FIG. 1B and the like can be used for one or more of the transistors Tr41, Tr43, Tr45, and Tr47.
  • the backgates of the transistors of one embodiment of the present invention can be connected to a wiring to which a ground potential or any potential is applied, or can be connected to another terminal (gate, source, or drain) of the transistor.
  • the occupied area can be reduced, and a display device with a narrow frame can be obtained.
  • the transistors 100 and 100A to 100E described in embodiment 1 as transistors that require a large on-state current, and by preferably using one or more of the transistors 200 and 200A to 200D described in embodiment 1 as transistors that require high saturation, a display device with high performance can be obtained.
  • ⁇ Pixel Circuit Configuration Example 1> 19A shows an example of the configuration of a pixel 230.
  • the pixel 230 includes a pixel circuit 51 and a light emitting device 61.
  • the pixel circuit 51 shown in FIG. 19A includes a transistor 52A, a transistor 52B, and a capacitor 53.
  • the pixel circuit 51 is a 2Tr1C type pixel circuit including two transistors (Tr) and one capacitor (C). Note that there is no particular limitation on the pixel circuit that can be applied to the display device of one embodiment of the present invention.
  • the anode of the light-emitting device 61 is connected to one of the source or drain of the transistor 52B and one electrode of the capacitance element 53.
  • the other of the source or drain of the transistor 52B is connected to the wiring ANO.
  • the gate of the transistor 52B is connected to one of the source or drain of the transistor 52A and the other electrode of the capacitance element 53.
  • the other of the source or drain of the transistor 52A is connected to the wiring SL.
  • the gate of the transistor 52A is connected to the wiring GL.
  • the cathode of the light-emitting device 61 is connected to the wiring VCOM.
  • the wiring GL corresponds to the wiring 236, and the wiring SL corresponds to the wiring 238.
  • the wiring VCOM is a wiring that provides a potential for supplying a current to the light-emitting device 61.
  • the transistor 52A has a function of controlling the conductive state or non-conductive state between the wiring SL and the gate of the transistor 52B based on the potential of the wiring GL. For example, VDD is supplied to the wiring ANO, and VSS is supplied to the wiring VCOM.
  • Transistor 52B has a function of controlling the amount of current flowing through light-emitting device 61.
  • Capacitive element 53 has a function of holding the gate potential of transistor 52B. The intensity of the light emitted by light-emitting device 61 is controlled according to an image signal supplied to the gate of transistor 52B.
  • a backgate can be provided for some or all of the transistors included in the pixel circuit 51.
  • the pixel circuit 51 shown in FIG. 19A shows a configuration in which the transistor 52A has a backgate, and the backgate is connected to the other of the source or drain of the transistor 52A. Also, a configuration in which the transistor 52B has a backgate, and the backgate is connected to one of the source or drain of the transistor 52B. Note that the backgate of the transistor 52A can also be connected to the gate of the transistor 52A. Also, a configuration in which the backgate of the transistor 52B is connected to the gate of the transistor 52B can also be used.
  • the above-mentioned semiconductor device can be preferably used in the pixel circuit 51.
  • the transistor 52B that functions as a drive transistor for controlling the current flowing through the light-emitting device 61 preferably has high saturation.
  • the transistor 52B By using one of the transistors 200 and 200A to 200D, which have a long channel length, as the transistor 52B, a highly reliable display device can be obtained.
  • the transistor 100 and one of the transistors 100A to 100E as the transistor 52A the area occupied by the pixel circuit 51A can be reduced, and a high-definition display device can be obtained.
  • the transistor 52B can be one of the transistors 100 and the transistors 100A to 100E.
  • a transistor with a short channel length as the transistor 52B, a display device with high luminance can be obtained.
  • the area occupied by the pixel circuit 51 can be reduced, and a high-definition display device can be obtained.
  • FIG. 19B shows an example of a configuration different from that of pixel 230 shown in FIG. 19A.
  • Pixel 230 has a pixel circuit 51A and a light-emitting device 61.
  • the pixel circuit 51A shown in FIG. 19B differs from the pixel circuit 51 shown in FIG. 19A mainly in that it has a transistor 52C.
  • the pixel circuit 51A has a transistor 52A, a transistor 52B, a transistor 52C, and a capacitance element 53.
  • the pixel circuit 51A is a 3Tr1C type pixel circuit having three transistors (Tr) and one capacitance element (C).
  • One of the source or drain of transistor 52C is connected to one of the source or drain of transistor 52B.
  • the other of the source or drain of transistor 52C is connected to wiring V0.
  • a reference potential is supplied to wiring V0.
  • the gate of transistor 52C is connected to wiring GL.
  • Transistor 52C has a function of controlling the conductive state or non-conductive state between one of the source electrode or drain electrode of transistor 52B and wiring V0 based on the potential of wiring GL.
  • the reference potential of wiring V0 provided via transistor 52C can suppress variations in the gate-source voltage of transistor 52B.
  • the wiring V0 can be used to obtain a current value that can be used to set pixel parameters. Specifically, the wiring V0 can function as a monitor line for outputting the current flowing through the transistor 52B or the current flowing through the light-emitting device 61 to the outside.
  • the current output to the wiring V0 can be converted to a voltage by a source follower circuit and output to the outside, or converted to a digital signal by an AD converter and output to the outside.
  • the above-mentioned semiconductor device can be suitably used for the pixel circuit 51A.
  • the transistors 200 and 200A to 200D which have a long channel length, for the transistor 52B
  • a highly reliable display device can be obtained.
  • the transistors 100 and 100A to 100E for the transistors 52A and 52C
  • the area occupied by the pixel circuit 51A can be reduced, and a high-definition display device can be obtained.
  • the transistor 100 and one of the transistors 100A to 100E can also be used for the transistor 52B.
  • FIG. 19C is a cross-sectional view of pixel circuit 51.
  • FIG. 19C shows an excerpt of transistor 52A, transistor 52B, capacitance element 53, and pixel electrode of light-emitting device 61. Note that the connection between transistor 52A and transistor 52B is omitted.
  • Transistor 52A has a conductive layer 104, an insulating layer 106, a semiconductor layer 108, a conductive layer 116, an insulating layer 110s, a conductive layer 112a, and a conductive layer 112b.
  • Transistor 52B has a conductive layer 202, an insulating layer 106, a semiconductor layer 208, an insulating layer 120, a conductive layer 204, a conductive layer 212a, and a conductive layer 212b.
  • the above description can be referred to for transistors 52A and 52B, and detailed description thereof will be omitted.
  • the capacitor 53 has a conductive layer 212a, a conductive layer 112p, and an insulating layer 106 sandwiched between them.
  • the conductive layer 112p is provided on the insulating layer 120.
  • the conductive layer 112p can be formed, for example, in the same process as the conductive layer 112b.
  • the insulating layer 106 is provided on the conductive layer 112p, and the conductive layer 212b is provided on the insulating layer 106.
  • the conductive layer 212b functions as one of the source and drain electrodes of the transistor 52B and also functions as one electrode of the capacitor 53. Note that the configuration of the capacitor 53 is not particularly limited.
  • An insulating layer 195 is provided to cover the transistor 52A, the transistor 52B, and the capacitor 53, an insulating layer 233 is provided to cover the insulating layer 195, and an insulating layer 235 is provided to cover the insulating layer 233.
  • a light-emitting device 61 can be provided on the insulating layer 235.
  • FIG. 19C shows a pixel electrode 111 that functions as one electrode of the light-emitting device 61.
  • the insulating layer 195 and the insulating layer 233 have a first opening that reaches the conductive layer 212b, and a conductive layer 234 is provided to cover the first opening.
  • the conductive layer 234 is connected to the conductive layer 212b through the first opening.
  • the insulating layer 235 has a second opening that reaches the conductive layer 234, and a pixel electrode 111 is provided to cover the second opening.
  • the pixel electrode 111 is connected to the conductive layer 234 through the second opening.
  • the insulating layer 195 can be described above, so a detailed description will be omitted.
  • the insulating layer 233 and the insulating layer 235 have the function of reducing unevenness caused by the transistor 52A, the transistor 52B, and the transistor 52C, and making the surface on which the light-emitting device 61 is formed more flat. Note that in this specification and the like, the insulating layer 233 and the insulating layer 235 may each be referred to as a flattening layer.
  • the insulating layer 233 and the insulating layer 235 are preferably made of an organic insulating film.
  • materials that can be used for the organic insulating film include acrylic resin, polyimide resin, epoxy resin, polyamide resin, polyimideamide resin, siloxane resin, benzocyclobutene resin, phenol resin, and precursors of these resins.
  • the insulating layer 235 can be made to have a laminated structure of an organic insulating film and an inorganic insulating film. It is preferable that the insulating layer 235 be made to have a laminated structure of an organic insulating film and an inorganic insulating film on the organic insulating film.
  • the inorganic insulating film can function as an etching protection layer when forming the light-emitting device 61. Specifically, it is possible to prevent a part of the insulating layer 235 from being etched when the pixel electrode 111 is formed, and a recess from being formed in the insulating layer 235. Alternatively, a recess may be provided in the insulating layer 235 when the pixel electrode 111 is formed. Similarly, the insulating layer 233 can be made to have a laminated structure of an organic insulating film and an inorganic insulating film.
  • ⁇ Pixel Circuit Configuration Example 2> 20 shows an example of a configuration different from the above-described pixel 230.
  • the pixel 230 has a pixel circuit 51B and a light-emitting device 61.
  • Pixel circuit 51B has transistor M11, transistor M12, transistor M13, transistor M14, transistor M15, transistor M16, capacitance element C11, and capacitance element C12.
  • Pixel circuit 51B is a 6Tr2C type pixel circuit having six transistors (Tr) and two capacitance elements (C).
  • FIG. 20 does not show where the backgates of the transistors other than the transistor M12 (transistor M11, transistor M13, transistor M14, transistor M15, and transistor M16) are connected.
  • the backgates of the transistors of one embodiment of the present invention can be connected to a wiring to which a ground potential or any potential is applied, or can be connected to another terminal (gate, source, or drain) of the transistor.
  • the anode of the light-emitting device 61 is connected to one of the source or drain of the transistor M15.
  • the cathode of the light-emitting device 61 is connected to the wiring VCOM.
  • the other of the source or drain of the transistor M15 is connected to one of the source or drain of the transistor M12, one of the source or drain of the transistor M13, one of the source or drain of the transistor M16, one electrode of the capacitance element C11, and one electrode of the capacitance element C12.
  • the gate of the transistor M12 is connected to one of the source or drain of the transistor M11, the other of the source or drain of the transistor M13, and the other electrode of the capacitance element C11.
  • the backgate of the transistor M12 is connected to one of the source or drain of the transistor M14 and the other electrode of the capacitance element C12.
  • the other of the source and drain of transistor M11 is connected to wiring SL.
  • the other of the source and drain of transistor M12 is connected to wiring ANO.
  • the other of the source and drain of transistor M14 is connected to wiring V0.
  • the other of the source and drain of transistor M16 is connected to wiring V1.
  • a constant potential is supplied to wiring V1.
  • the gates of transistors M11 and M16 are connected to wiring GL1.
  • the gates of transistors M13 and M14 are connected to wiring GL2.
  • the gate of transistor M15 is connected to wiring GL3.
  • the transistor M11 functions as a selection transistor that controls the conductive state or non-conductive state between the gate of the transistor M12 and the wiring SL.
  • the transistor M12 functions as a drive transistor that controls the current flowing through the light-emitting device 61.
  • the transistor M14 has a function of supplying the potential of the wiring V0 to the back gate of the transistor M12.
  • the threshold voltage can be controlled by supplying a constant potential to the back gate of the transistor M12.
  • the capacitance element C11 has a function of holding the gate potential of the transistor M12.
  • the capacitance element C12 has a function of holding the back gate potential of the transistor M12.
  • the pixel circuit 51B has a so-called internal threshold voltage correction function that corrects the threshold voltage of the transistor M12 by the back gate.
  • the capacitance element C12 is made to hold a back gate potential such that the threshold voltage of the transistor M12 becomes 0V. This makes it possible to correct the threshold voltage of the transistor M12 so that it is fixed at 0V or near 0V, regardless of the variation in the threshold voltage of the transistor and deterioration over time.
  • the above-mentioned semiconductor device can be suitably used in the pixel circuit 51B.
  • one or more of the transistors 100 and 100A to 100E shown in FIG. 1B can be used for the transistors M11, M13, M14, M15, and M16, and one of the transistors 200 and 200A to 200D can be used for the transistor M12.
  • the transistor M12 which functions as a driving transistor, preferably has high saturation.
  • the transistors 200 and 200A to 200D which have a long channel length, as the transistor M12, a highly reliable display device can be obtained.
  • the transistors 100 and 100A to 100E as the transistors M11, M13, M14, M15, and M16, the area occupied by the pixel circuit 51B can be reduced, and a high-definition display device can be obtained.
  • the transistor M12 can be one of the transistors 100 and the transistors 100A to 100E. By using a transistor with a short channel length as the transistor M12, a display device with high luminance can be obtained. In addition, the area occupied by the pixel circuit 51B can be reduced, and a high-definition display device can be obtained.
  • a high-performance display device By using a plurality of transistors and capacitors in a pixel circuit, a high-performance display device can be obtained.
  • the area occupied can be reduced even if the number of transistors and capacitors is increased, and a high-performance and high-resolution display device can be obtained.
  • a display device with a resolution of 300 ppi or more, 500 ppi or more, 1000 ppi or more, 2000 ppi or more, or 3000 ppi or more can be realized.
  • the semiconductor device can reduce the area occupied by the semiconductor device, and therefore can increase the aperture ratio of a pixel in a display device having a bottom emission structure.
  • a display device having an aperture ratio of 50% or more, 55% or more, or 60% or more can be realized.
  • the aperture ratio refers to the ratio of the area of the region through which light is emitted to the area of the pixel.
  • FIG. 21A shows an example of a cross section of the display device 50A, in which a portion of the region including the FPC 172, a portion of the circuit portion 164, a portion of the display portion 162, a portion of the connection portion 140, and a portion of the region including the end portion are cut.
  • the display device 50A shown in FIG. 21A has transistors 205D, 205R, 205G, 207G, 207B, light-emitting elements 130R, 130G, and 130B between substrates 151 and 152.
  • Light-emitting element 130R is a display element included in pixel 230R that emits red light
  • light-emitting element 130G is a display element included in pixel 230G that emits green light
  • light-emitting element 130B is a display element included in pixel 230B that emits blue light.
  • the display device 50A uses an SBS structure.
  • the SBS structure allows the material and configuration to be optimized for each light-emitting element, which increases the freedom of material and configuration selection and makes it easier to improve brightness and reliability.
  • the display device 50A is a top emission type.
  • transistors and the like can be arranged so as to overlap the light emitting region of the light emitting element, so the aperture ratio of the pixel can be increased compared to a bottom emission type.
  • Transistors 205D, 205R, 205G, 207G, and 207B are all formed on substrate 151. These transistors can be manufactured using some of the same processes.
  • One or more of the transistors 100, 100A to 100E, 200, and 200A to 200D described above can be applied to any one or more of the transistors 205D, 205R, 205G, 207G, and 207B.
  • FIG. 21A shows a configuration example in which the transistor 100 described above is applied to the transistors 205D, 205R, and 205G, and the transistor 200 described above is applied to the transistors 207G and 207B.
  • a high-definition display device can be obtained by using one or more of the above-mentioned transistors 100 and transistors 100A to 100E as the transistors provided in the display portion 162.
  • one or more of the highly saturable transistors 200 and transistors 200A to 200D can be suitably used as the driving transistors of the light-emitting elements 130R, 130G, and 130B. This makes it possible to obtain a highly reliable display device.
  • the transistors 100 and 100A to 100E described above in the circuit portion 164 By using one or more of the transistors 100 and 100A to 100E described above in the circuit portion 164, a display device that operates at high speed can be obtained. Compared to the transistors provided in the display portion 162, the transistors provided in the circuit portion 164 may require a large on-state current. It is preferable to use a transistor with a short channel length in the circuit portion 164.
  • the circuit portion 164 can preferably use one or more of the transistors 100 and 100A to 100E described above. By using one or more of the transistors 100 and 100A to 100E in the circuit portion 164, the occupied area can be reduced, and a display device with a narrow frame can be obtained. Note that one or more of the transistors 200 and 200A to 200D can also be used in the circuit portion 164.
  • the transistors included in the display device of this embodiment are not limited to only the transistors included in the semiconductor device of one embodiment of the present invention.
  • a structure in which a transistor included in the semiconductor device of one embodiment of the present invention is combined with a transistor having another structure can be used.
  • the display device of this embodiment can have, for example, one or more of a planar transistor, a staggered transistor, and an inverted staggered transistor.
  • the transistors included in the display device of this embodiment can be either a top-gate type or a bottom-gate type.
  • a structure in which gates are provided above and below a semiconductor layer in which a channel is formed can be used.
  • Transistors 205D, 205R, 205G, 207G, and 207B can preferably be OS transistors.
  • the display device of this embodiment can also be configured to include Si transistors.
  • an OS transistor When a transistor operates in the saturation region, an OS transistor can reduce the change in source-drain current in response to a change in gate-source voltage compared to a Si transistor. Therefore, by using an OS transistor as a driving transistor included in a pixel circuit, the current flowing between the source and drain can be precisely determined by changing the gate-source voltage, and the amount of current flowing to the light-emitting element can be controlled. This makes it possible to increase the number of gray levels in the pixel circuit.
  • an OS transistor can pass a more stable current (saturation current) than a Si transistor, even when the source-drain voltage gradually increases. Therefore, by using an OS transistor as a driving transistor, a stable current can be passed to a light-emitting element, for example, even when the current-voltage characteristics of an EL element vary. In other words, when an OS transistor operates in the saturation region, the source-drain current hardly changes even when the source-drain voltage is changed, so the light emission luminance of the light-emitting element can be stabilized.
  • the transistors included in the circuit portion 164 and the transistors included in the display portion 162 can have the same structure. Or, they can have different structures.
  • the transistors included in the circuit portion 164 can all have the same structure. Or, they can have two or more types of transistor structures.
  • the transistors included in the display portion 162 can all have the same structure. Or, they can have two or more types of transistor structures.
  • All of the transistors in the display portion 162 can be OS transistors. Or, all of the transistors in the display portion 162 can be Si transistors. Or, some of the transistors in the display portion 162 can be OS transistors, and the rest can be Si transistors.
  • LTPS transistors and OS transistors are combined in the display unit 162
  • LTPO A configuration in which LTPS transistors and OS transistors are combined is sometimes called LTPO.
  • a more suitable example is a configuration in which an OS transistor is used as a transistor that functions as a switch for controlling conduction/non-conduction between wirings, and an LTPS transistor is used as a transistor for controlling current.
  • one of the transistors in the display unit 162 functions as a transistor for controlling the current flowing to the light-emitting element, and can also be called a driving transistor.
  • One of the source and drain of the driving transistor is connected to the pixel electrode of the light-emitting element. It is preferable to use an LTPS transistor as the driving transistor. This makes it possible to increase the current flowing to the light-emitting element in the pixel circuit.
  • the other transistor in the display unit 162 functions as a switch for controlling pixel selection/non-selection and can also be called a selection transistor.
  • the gate of the selection transistor is connected to a gate line, and one of the source and drain is connected to a source line (signal line). It is preferable to use an OS transistor as the selection transistor. This makes it possible to maintain the gradation of the pixel even if the frame frequency is significantly reduced (for example, 1 fps or less), and therefore power consumption can be reduced by stopping the driver when displaying a still image.
  • An insulating layer 195 is provided to cover transistors 205D, 205R, 205G, 207G, and 207B, and an insulating layer 235 is provided on insulating layer 195.
  • Light-emitting elements 130R, 130G, and 130B are provided on insulating layer 235.
  • the light-emitting element 130R has a pixel electrode 111R on the insulating layer 235, an EL layer 113R on the pixel electrode 111R, and a common electrode 115 on the EL layer 113R.
  • the light-emitting element 130R shown in FIG. 21A emits red light (R).
  • the EL layer 113R has a light-emitting layer that emits red light.
  • the light-emitting element 130G has a pixel electrode 111G on the insulating layer 235, an EL layer 113G on the pixel electrode 111G, and a common electrode 115 on the EL layer 113G.
  • the light-emitting element 130G shown in FIG. 21A emits green light (G).
  • the EL layer 113G has a light-emitting layer that emits green light.
  • the light-emitting element 130B has a pixel electrode 111B on the insulating layer 235, an EL layer 113B on the pixel electrode 111B, and a common electrode 115 on the EL layer 113B.
  • the light-emitting element 130B shown in FIG. 21A emits blue light (B).
  • the EL layer 113B has a light-emitting layer that emits blue light.
  • EL layers 113R, 113G, and EL layers 113B are all shown to have the same thickness, but this is not limited to this.
  • EL layers 113R, 113G, and EL layers 113B may each have a different thickness.
  • Pixel electrode 111R is connected to conductive layer 112b of transistor 205R through openings provided in insulating layer 106, insulating layer 195, and insulating layer 235.
  • pixel electrode 111G is connected to conductive layer 112b of transistor 205G
  • pixel electrode 111B is connected to conductive layer 112b of transistor 205B (not shown).
  • the ends of the pixel electrodes 111R, 111G, and 111B are covered with an insulating layer 237.
  • the insulating layer 237 functions as a partition wall.
  • the insulating layer 237 can be formed in a single layer structure or a laminated structure using one or both of an inorganic insulating material and an organic insulating material.
  • the material that can be used for the insulating layer 195 and the material that can be used for the insulating layer 235 can be used for the insulating layer 237.
  • the insulating layer 237 can insulate the pixel electrodes and the common electrode. Furthermore, the insulating layer 237 can insulate adjacent light-emitting elements from each other.
  • the insulating layer 237 is provided at least in the display section 162.
  • the insulating layer 237 can be configured to be provided not only in the display section 162, but also in the connection section 140 and the circuit section 164.
  • the insulating layer 237 can also be configured to be provided up to the edge of the display device 50A.
  • the common electrode 115 is a continuous film that is provided in common to the light-emitting elements 130R, 130G, and 130B.
  • the common electrode 115 that is shared by the multiple light-emitting elements is connected to a conductive layer 123 provided in the connection portion 140.
  • the conductive layer 123 it is preferable to use a conductive layer formed from the same material and in the same process as the pixel electrodes 111R, 111G, and 111B.
  • a conductive film that transmits visible light is used for the pixel electrode and the common electrode, which is the electrode from which light is extracted. It is preferable to use a conductive film that reflects visible light for the electrode from which light is not extracted.
  • a conductive film that transmits visible light can also be used for the electrode on the side from which light is not extracted.
  • the light emitted from the EL layer can be reflected by the reflective layer and extracted from the display device.
  • a metal, an alloy, an electrically conductive compound, a mixture thereof, etc. can be appropriately used as a material for forming a pair of electrodes of a light-emitting element.
  • the material include metals such as aluminum, magnesium, titanium, chromium, manganese, iron, cobalt, nickel, copper, gallium, zinc, indium, tin, molybdenum, tantalum, tungsten, palladium, gold, platinum, silver, yttrium, neodymium, and alloys containing these in appropriate combinations.
  • In-Sn oxide also called ITO
  • In-Si-Sn oxide also called ITSO
  • indium zinc oxide In-Zn oxide
  • In-W-Zn oxide examples of the material include alloys containing aluminum (aluminum alloys) such as an alloy of aluminum, nickel, and lanthanum (Al-Ni-La), as well as alloys containing silver such as an alloy of silver and magnesium, and an alloy of silver, palladium, and copper (Ag-Pd-Cu, also called APC).
  • Such materials include elements belonging to Group 1 or 2 of the periodic table (e.g., lithium, cesium, calcium, and strontium) not listed above, rare earth metals such as europium and ytterbium, and alloys containing appropriate combinations of these, graphene, etc.
  • the light-emitting element preferably has a micro-optical resonator (microcavity) structure. Therefore, one of the pair of electrodes of the light-emitting element is preferably an electrode that is transparent and reflective to visible light (semi-transparent and semi-reflective electrode), and the other is preferably an electrode that is reflective to visible light (reflective electrode).
  • the light-emitting element have a microcavity structure, the light emitted from the light-emitting layer can be resonated between both electrodes, thereby intensifying the light emitted from the light-emitting element.
  • the light transmittance of the transparent electrode is 40% or more.
  • the visible light reflectance of the semi-transmissive/semi-reflective electrode is 10% or more and 95% or less, preferably 30% or more and 80% or less.
  • the visible light reflectance of the reflective electrode is 40% or more and 100% or less, preferably 70% or more and 100% or less.
  • the electrical resistivity of these electrodes is preferably 1 ⁇ 10 ⁇ 2 ⁇ cm or less.
  • EL layer 113R, EL layer 113G, and EL layer 113B are each provided in an island shape.
  • the ends of adjacent EL layers 113R and 113G overlap, the ends of adjacent EL layers 113G and 113B overlap, and the ends of adjacent EL layers 113R and 113B overlap.
  • the ends of adjacent EL layers may overlap as shown in FIG. 21A, but this is not limited to this. In other words, adjacent EL layers may not overlap and may be separated from each other.
  • EL layer 113R, EL layer 113G, and EL layer 113B each have at least a light-emitting layer.
  • the light-emitting layer has one or more types of light-emitting material.
  • a material that emits light of a color such as blue, purple, blue-purple, green, yellow-green, yellow, orange, or red is appropriately used.
  • a material that emits near-infrared light can also be used.
  • Light-emitting materials include fluorescent materials, phosphorescent materials, TADF materials, quantum dot materials, etc.
  • the light-emitting layer may have one or more organic compounds (host material, assist material, etc.) in addition to the light-emitting substance (guest material).
  • the one or more organic compounds one or both of a substance with high hole transport properties (hole transport material) and a substance with high electron transport properties (electron transport material) may be used.
  • a bipolar substance a substance with high electron transport properties and hole transport properties
  • a TADF material may be used as the one or more organic compounds.
  • the light-emitting layer preferably has, for example, a phosphorescent material and a hole-transporting material and an electron-transporting material, which are a combination that easily forms an exciplex.
  • ExTET Exciplex-Triple Energy Transfer
  • the energy transfer becomes smooth and light emission can be efficiently obtained.
  • the EL layer may have one or more of a layer containing a substance with high hole injection properties (hole injection layer), a layer containing a material with hole transport properties (hole transport layer), a layer containing a substance with high electron blocking properties (electron blocking layer), a layer containing a substance with high electron injection properties (electron injection layer), a layer containing a material with electron transport properties (electron transport layer), and a layer containing a substance with high hole blocking properties (hole blocking layer).
  • the EL layer may contain one or both of a bipolar substance and a TADF material.
  • Eigen elements can be made of either low molecular weight compounds or high molecular weight compounds, and may contain inorganic compounds.
  • the layers constituting the luminescent element can be formed by deposition methods (including vacuum deposition methods), transfer methods, printing methods, inkjet methods, coating methods, etc.
  • the light-emitting element may have a single structure (a structure having only one light-emitting unit) or a tandem structure (a structure having multiple light-emitting units).
  • the light-emitting unit has at least one light-emitting layer.
  • the tandem structure is a structure in which multiple light-emitting units are connected in series via a charge-generating layer. When a voltage is applied between a pair of electrodes, the charge-generating layer has the function of injecting electrons into one of the two light-emitting units and injecting holes into the other.
  • the tandem structure makes it possible to obtain a light-emitting element capable of emitting light with high brightness. Furthermore, the tandem structure can reduce the current required to obtain the same brightness compared to the single structure, thereby improving reliability.
  • the tandem structure may also be called a stack structure.
  • EL layer 113R has a structure having multiple light-emitting units that emit red light
  • EL layer 113G has a structure having multiple light-emitting units that emit green light
  • EL layer 113B has a structure having multiple light-emitting units that emit blue light.
  • a protective layer 131 is provided on the light emitting elements 130R, 130G, and 130B.
  • the protective layer 131 and the substrate 152 are bonded via an adhesive layer 142.
  • the substrate 152 is provided with a light shielding layer 117.
  • a solid sealing structure or a hollow sealing structure can be applied to seal the light emitting elements.
  • the space between the substrates 152 and 151 is filled with an adhesive layer 142, and a solid sealing structure is applied.
  • the space may be filled with an inert gas (such as nitrogen or argon), and a hollow sealing structure may be applied.
  • the adhesive layer 142 may be provided so as not to overlap with the light emitting elements.
  • the space may also be filled with a resin different from the adhesive layer 142 provided in a frame shape.
  • the protective layer 131 is provided at least on the display section 162, and is preferably provided so as to cover the entire display section 162.
  • the protective layer 131 is preferably provided so as to cover not only the display section 162, but also the connection section 140 and the circuit section 164.
  • the protective layer 131 is also preferably provided up to the end of the display device 50A.
  • the connection section 197 there are portions where the protective layer 131 is not provided in order to connect the FPC 172 and the conductive layer 166.
  • the reliability of the light-emitting elements can be improved.
  • the protective layer 131 may have a single layer structure or a laminated structure of two or more layers.
  • the conductivity of the protective layer 131 does not matter.
  • At least one of an insulating film, a semiconductor film, and a conductive film can be used as the protective layer 131.
  • the protective layer 131 has an inorganic film, which prevents the common electrode 115 from being oxidized and prevents impurities (water, oxygen, etc.) from entering the light-emitting element, thereby suppressing deterioration of the light-emitting element and improving the reliability of the display device.
  • An inorganic insulating film can be used for the protective layer 131.
  • materials that can be used for the inorganic insulating film include oxides, nitrides, oxynitrides, and nitride oxides. Specific examples of these inorganic insulating films are as described above.
  • the protective layer 131 preferably contains a nitride or a nitride oxide, and more preferably contains a nitride.
  • the protective layer 131 may be an inorganic film containing ITO, In-Zn oxide, Ga-Zn oxide, Al-Zn oxide, IGZO, or the like.
  • the inorganic film preferably has a high resistance, and more specifically, preferably has a higher resistance than the common electrode 115.
  • the inorganic film may further contain nitrogen.
  • the protective layer 131 has high transparency to visible light.
  • ITO, IGZO, and aluminum oxide are preferable because they are inorganic materials that have high transparency to visible light.
  • the protective layer 131 may be, for example, a laminated structure of an aluminum oxide film and a silicon nitride film on the aluminum oxide film, or a laminated structure of an aluminum oxide film and an IGZO film on the aluminum oxide film. By using such a laminated structure, it is possible to prevent impurities (water, oxygen, etc.) from penetrating into the EL layer.
  • the protective layer 131 may have an organic film.
  • the protective layer 131 may have both an organic film and an inorganic film.
  • An example of an organic film that can be used for the protective layer 131 is an organic insulating film that can be used for the insulating layer 235.
  • connection portion 197 is provided in an area of the substrate 151 where the substrate 152 does not overlap.
  • the conductive layer 165 is connected to the FPC 172 via the conductive layer 166 and the connection layer 242.
  • the conductive layer 165 can be formed, for example, by processing the same conductive film as the conductive layer 112b.
  • the conductive layer 166 can be formed, for example, by processing the same conductive film as the pixel electrode 111R, the pixel electrode 111G, and the pixel electrode 111B.
  • the connection portion between the conductive layer 165 and the conductive layer 166 can have the same configuration as the connection portion between the pixel electrode and the conductive layer 112b. Specifically, FIG.
  • connection portion 197 shows an example in which an opening is provided in the upper layer of the conductive layer 165, and the conductive layer 166 contacts the upper surface of the conductive layer 165 through the opening.
  • the conductive layer 166 is exposed on the upper surface of the connection portion 197. This allows the connection portion 197 and the FPC 172 to be connected via the connection layer 242.
  • Display device 50A is a top emission type. Light emitted by the light emitting elements is emitted towards substrate 152. It is preferable to use a material that is highly transparent to visible light for substrate 152. Pixel electrodes 111R, 111G, and 111B contain a material that reflects visible light, and the opposing electrode (common electrode 115) contains a material that transmits visible light.
  • the light-shielding layer 117 can be provided between adjacent light-emitting elements, in the connection section 140, in the circuit section 164, etc.
  • a colored layer such as a color filter may be provided on the surface of substrate 152 facing substrate 151 or on protective layer 131. By providing a color filter over the light-emitting element, the color purity of the light emitted from the pixel can be increased.
  • the colored layer is a colored layer that selectively transmits light in a specific wavelength range and absorbs light in other wavelength ranges.
  • a red (R) color filter that transmits light in the red wavelength range
  • a green (G) color filter that transmits light in the green wavelength range
  • a blue (B) color filter that transmits light in the blue wavelength range
  • R red
  • G green
  • B blue
  • metal materials, resin materials, pigments, and dyes can be used.
  • the colored layers are formed at the desired positions by a printing method, an inkjet method, an etching method using photolithography, or the like.
  • optical members can be arranged on the outside of the substrate 152 (the surface opposite to the substrate 151).
  • optical members include a polarizing plate, a retardation plate, a light diffusion layer (such as a diffusion film), an anti-reflection layer, and a light collecting film.
  • a surface protection layer such as an antistatic film that suppresses the adhesion of dust, a water-repellent film that makes it difficult for dirt to adhere, a hard coat film that suppresses the occurrence of scratches due to use, and an impact absorbing layer may be arranged on the outside of the substrate 152.
  • a glass layer or a silica layer As the surface protection layer, it is possible to suppress the occurrence of surface contamination and scratches, which is preferable.
  • DLC diamond-like carbon
  • AlO x aluminum oxide
  • a polyester-based material a polycarbonate-based material, or the like
  • the substrates 151 and 152 may each be made of glass, quartz, ceramics, sapphire, resin, metal, alloy, semiconductor, or the like.
  • a material that transmits light is used for the substrate on the side from which light from the light-emitting element is extracted. If a flexible material is used for the substrates 151 and 152, the flexibility of the display device can be increased, and a flexible display can be realized.
  • a polarizing plate may also be used for at least one of the substrates 151 and 152.
  • the substrates 151 and 152 may each be made of polyester resins such as polyethylene terephthalate (PET) and polyethylene naphthalate (PEN), polyacrylonitrile resin, acrylic resin, polyimide resin, polymethyl methacrylate resin, polycarbonate (PC) resin, polyethersulfone (PES) resin, polyamide resin (nylon, aramid, etc.), polysiloxane resin, cycloolefin resin, polystyrene resin, polyamideimide resin, polyurethane resin, polyvinyl chloride resin, polyvinylidene chloride resin, polypropylene resin, polytetrafluoroethylene (PTFE) resin, ABS resin, cellulose nanofiber, etc. At least one of the substrates 151 and 152 may be made of glass having a thickness sufficient to provide flexibility.
  • PET polyethylene terephthalate
  • PEN polyethylene naphthalate
  • polyacrylonitrile resin acrylic resin
  • polyimide resin polymethyl methacrylate resin
  • a substrate with high optical isotropy has low birefringence (it can also be said that the amount of birefringence is small).
  • films with high optical isotropy include triacetyl cellulose (TAC, also known as cellulose triacetate) film, cycloolefin polymer (COP) film, cycloolefin copolymer (COC) film, acrylic film, etc.
  • curing adhesives such as photo-curing adhesives such as ultraviolet curing adhesives, reactive curing adhesives, heat curing adhesives, and anaerobic adhesives.
  • photo-curing adhesives such as ultraviolet curing adhesives, reactive curing adhesives, heat curing adhesives, and anaerobic adhesives.
  • These adhesives include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, and EVA (ethylene vinyl acetate) resin.
  • materials with low moisture permeability such as epoxy resin are preferable.
  • Two-part mixed resins may also be used.
  • Adhesive sheets, etc. may also be used.
  • connection layer 242 an anisotropic conductive film (ACF), an anisotropic conductive paste (ACP), etc. can be used.
  • ACF anisotropic conductive film
  • ACP anisotropic conductive paste
  • FIG. 21B shows an example of a cross section of the display unit 162 of the display device 50B.
  • the display device 50B is mainly different from the display device 50A in that a light-emitting element having a common EL layer 113 and a colored layer (such as a color filter) are used in each subpixel of each color.
  • the configuration shown in FIG. 21B can be combined with the region including the FPC 172, the circuit portion 164, the laminated structure from the substrate 151 to the insulating layer 235 of the display unit 162, the connection portion 140, and the configuration of the end portion shown in FIG. 21A. Note that in the following description of the display device, the description of the same parts as those of the display device described above may be omitted.
  • the display device 50B shown in FIG. 21B has a light emitting element 130R, a light emitting element 130G, a light emitting element 130B, a colored layer 132R that transmits red light, a colored layer 132G that transmits green light, and a colored layer 132B that transmits blue light.
  • the light-emitting element 130R has a pixel electrode 111R, an EL layer 113 on the pixel electrode 111R, and a common electrode 115 on the EL layer 113.
  • the light emitted by the light-emitting element 130R is extracted as red light to the outside of the display device 50B via the colored layer 132R.
  • the light-emitting element 130G has a pixel electrode 111G, an EL layer 113 on the pixel electrode 111G, and a common electrode 115 on the EL layer 113.
  • the light emitted by the light-emitting element 130G is extracted as green light to the outside of the display device 50B via the colored layer 132G.
  • the light-emitting element 130B has a pixel electrode 111B, an EL layer 113 on the pixel electrode 111B, and a common electrode 115 on the EL layer 113.
  • the light emitted by the light-emitting element 130B is extracted as blue light to the outside of the display device 50B via the colored layer 132B.
  • Light-emitting element 130R, light-emitting element 130G, and light-emitting element 130B each have a common EL layer 113 and a common electrode 115.
  • a configuration in which a common EL layer 113 is provided for the subpixels of each color can reduce the number of manufacturing steps compared to a configuration in which a different EL layer is provided for each subpixel of each color.
  • the light emitting elements 130R, 130G, and 130B shown in FIG. 21B emit white light.
  • the white light emitted by the light emitting elements 130R, 130G, and 130B passes through the colored layers 132R, 132G, and 132B, thereby obtaining light of the desired color.
  • a light-emitting element that emits white light preferably includes two or more light-emitting layers.
  • light-emitting layers can be selected such that the emission colors of the two light-emitting layers are complementary to each other. For example, by making the emission color of the first light-emitting layer and the emission color of the second light-emitting layer complementary to each other, a configuration can be obtained in which the light-emitting element as a whole emits white light.
  • the emission colors of the three or more light-emitting layers can be combined to obtain a configuration in which the light-emitting element as a whole emits white light.
  • the EL layer 113 preferably has, for example, a light-emitting layer having a light-emitting material that emits blue light, and a light-emitting layer having a light-emitting material that emits visible light with a longer wavelength than blue.
  • the EL layer 113 preferably has, for example, a light-emitting layer that emits yellow light, and a light-emitting layer that emits blue light.
  • the EL layer 113 preferably has, for example, a light-emitting layer that emits red light, a light-emitting layer that emits green light, and a light-emitting layer that emits blue light.
  • a tandem structure For light-emitting elements that emit white light, it is preferable to use a tandem structure. Specifically, a two-stage tandem structure having a light-emitting unit that emits yellow light and a light-emitting unit that emits blue light, a two-stage tandem structure having a light-emitting unit that emits red and green light and a light-emitting unit that emits blue light, a three-stage tandem structure having, in this order, a light-emitting unit that emits blue light, a light-emitting unit that emits yellow, yellow-green or green light, and a light-emitting unit that emits blue light, or a three-stage tandem structure having, in this order, a light-emitting unit that emits blue light, a light-emitting unit that emits yellow, yellow-green or green light, and red light, and a light-emitting unit that emits blue light, etc.
  • the number of layers and the order of colors of the light-emitting units can be, from the anode side, a two-layer structure of B and Y, a two-layer structure of B and light-emitting unit X, a three-layer structure of B, Y, B, or a three-layer structure of B, X, B.
  • the number of layers and the order of colors of the light-emitting layers in light-emitting unit X can be, from the anode side, a two-layer structure of R and Y, a two-layer structure of R and G, a two-layer structure of G and R, a three-layer structure of G, R, G, or a three-layer structure of R, G, R.
  • another layer may be provided between the two light-emitting layers.
  • a light-emitting element configured to emit white light may emit light of a specific wavelength, such as red, green, or blue, with the light being intensified.
  • the light emitting element 130R, the light emitting element 130G, and the light emitting element 130B shown in FIG. 21B emit blue light.
  • the EL layer 113 has one or more light emitting layers that emit blue light.
  • the blue light emitted by the light emitting element 130B can be extracted.
  • a color conversion layer is provided between the light emitting element 130R or the light emitting element 130G and the substrate 152, so that the blue light emitted by the light emitting element 130R or the light emitting element 130G can be converted into light with a longer wavelength, and red or green light can be extracted.
  • a part of the light emitted by the light emitting element may be transmitted as it is without being converted by the color conversion layer.
  • a display device 50C shown in FIG. 22 differs from the display device 50B mainly in that it is a bottom emission type display device.
  • Light emitted by the light-emitting element is emitted toward the substrate 151. It is preferable to use a material that is highly transparent to visible light for the substrate 151. On the other hand, the translucency of the material used for the substrate 152 does not matter.
  • FIG. 22 shows an example in which the light-shielding layer 117 is provided on the substrate 151, the insulating layer 153 is provided on the light-shielding layer 117, and the transistors 205D, 205R (not shown), 205G, 207G, and 207B are provided on the insulating layer 153.
  • the colored layer 132R and the colored layer 132G are provided on the insulating layer 195, and the insulating layer 235 is provided on the colored layer 132R and the colored layer 132G.
  • the light-emitting element 130R which overlaps with the colored layer 132R, has a pixel electrode 111R, an EL layer 113, and a common electrode 115.
  • the light-emitting element 130G which overlaps with the colored layer 132G, has a pixel electrode 111G, an EL layer 113, and a common electrode 115.
  • the light-emitting element 130B (not shown), which overlaps with the colored layer 132B (not shown), has a pixel electrode 111B (not shown), an EL layer 113, and a common electrode 115.
  • the pixel electrodes 111R, 111G, and 111B are each made of a material that is highly transparent to visible light. It is preferable to use a material that reflects visible light for the common electrode 115. In a bottom emission display device, a metal with low electrical resistivity can be used for the common electrode 115, so that voltage drops caused by the electrical resistance of the common electrode 115 can be suppressed, and high display quality can be achieved.
  • the transistor of one embodiment of the present invention can be miniaturized and its occupation area can be reduced, so that in a display device with a bottom emission structure, the pixel aperture ratio can be increased or the pixel size can be reduced.
  • a display device 50D shown in FIG. 23A differs from the display device 50A mainly in that a light receiving element 130S is included.
  • Display device 50D has a light-emitting element and a light-receiving element in each pixel.
  • display device 50D it is preferable to use an organic EL element as the light-emitting element and an organic photodiode as the light-receiving element.
  • the organic EL element and the organic photodiode can be formed on the same substrate. Therefore, an organic photodiode can be built into a display device that uses an organic EL element.
  • display unit 162 has one or both of an imaging function and a sensing function. For example, in addition to displaying an image using all of the sub-pixels of display device 50D, some of the sub-pixels can provide light as a light source, some other sub-pixels can perform light detection, and the remaining sub-pixels can display the image.
  • the display device 50D it is not necessary to provide a light receiving unit and a light source separately from the display device 50D, and the number of parts in the electronic device can be reduced. For example, it is not necessary to provide a separate biometric authentication device in the electronic device, or a capacitive touch panel for scrolling, etc. Therefore, by using the display device 50D, it is possible to provide an electronic device with reduced manufacturing costs.
  • the display device 50D can capture an image using the light receiving element.
  • the image sensor can be used to capture images for personal authentication using a fingerprint, palm print, iris, pulse shape (including vein shape and artery shape), face, etc.
  • the light receiving element can be used as a touch sensor (also called a direct touch sensor) or a non-contact sensor (also called a hover sensor, hover touch sensor, or touchless sensor).
  • a touch sensor can detect an object (such as a finger, hand, or pen) by directly contacting the display device with the object.
  • a non-contact sensor can detect an object even if the object does not touch the display device.
  • the light receiving element 130S has a pixel electrode 111S on an insulating layer 235, a functional layer 113S on the pixel electrode 111S, and a common electrode 115 on the functional layer 113S.
  • Light Lin is incident on the functional layer 113S from outside the display device 50D.
  • the pixel electrode 111S is connected to the conductive layer 112b of the transistor 205S through openings provided in the insulating layer 106, the insulating layer 195, and the insulating layer 235.
  • the ends of the pixel electrode 111S are covered by an insulating layer 237.
  • the common electrode 115 is a continuous film provided in common to the light receiving element 130S, the light emitting element 130R (not shown), the light emitting element 130G, and the light emitting element 130B.
  • the common electrode 115 shared by the light emitting element and the light receiving element is connected to the conductive layer 123 provided in the connection portion 140.
  • the functional layer 113S has at least an active layer (also called a photoelectric conversion layer).
  • the active layer includes a semiconductor.
  • the semiconductor include inorganic semiconductors such as silicon, and organic semiconductors including organic compounds.
  • an organic semiconductor is used as the semiconductor of the active layer.
  • the light-emitting layer and the active layer can be formed by the same method (for example, vacuum deposition method), and the manufacturing equipment can be shared, which is preferable.
  • the functional layer 113S may further include a layer containing a material with high hole transport properties, a material with high electron transport properties, or a bipolar material, as a layer other than the active layer.
  • the functional layer 113S may further include a layer containing a material with high hole injection properties, a hole blocking material, a material with high electron injection properties, or an electron blocking material.
  • the materials that can be used in the light-emitting element described above can be used for the functional layer 113S.
  • the light receiving element can be made of either a low molecular weight compound or a high molecular weight compound, and may contain an inorganic compound.
  • the layers that make up the light receiving element can be formed by a deposition method (including vacuum deposition), a transfer method, a printing method, an inkjet method, a coating method, etc.
  • the display device 50D shown in Figures 23B and 23C has a layer 353 having light receiving elements, a circuit layer 355, and a layer 357 having light emitting elements between the substrate 151 and the substrate 152.
  • Layer 353 has, for example, light receiving element 130S.
  • Layer 357 has, for example, light emitting element 130R, light emitting element 130G, and light emitting element 130B.
  • Circuit layer 355 has a circuit that drives the light receiving element and a circuit that drives the light emitting element.
  • Circuit layer 355 has, for example, transistor 205R, transistor 205G, and transistor 205B.
  • circuit layer 355 may be provided with one or more of a switch, a capacitance, a resistance, a wiring, a terminal, etc.
  • FIG. 23B shows an example in which the light receiving element 130S is used as a touch sensor. As shown in FIG. 23B, light emitted by the light emitting element in layer 357 is reflected by a finger 352 that touches the display device 50D, and the light receiving element in layer 353 detects the reflected light. This makes it possible to detect that the finger 352 has touched the display device 50D.
  • Fig. 23C shows an example in which the light receiving element 130S is used as a non-contact sensor. As shown in Fig. 23C, light emitted by a light emitting element in layer 357 is reflected by a finger 352 that is close to (i.e., not in contact with) the display device 50D, and the light receiving element in layer 353 detects the reflected light.
  • ⁇ Configuration Example 5 of Display Device> 24A is an example of a display device to which an MML (metal maskless) structure is applied, that is, the display device 50E has light-emitting elements fabricated without using a fine metal mask.
  • MML metal maskless
  • the island-shaped light-emitting layer in the light-emitting element of a display device to which the MML structure is applied is formed by depositing a light-emitting layer on one surface and then processing it using photolithography. This makes it possible to realize a high-definition display device or a display device with a high aperture ratio, which has been difficult to achieve until now. Furthermore, since the light-emitting layer can be made different for each color, it is possible to realize a display device that is extremely vivid, has high contrast, and has high display quality.
  • a display device is composed of three types of light-emitting elements, one that emits blue light, one that emits green light, and one that emits red light
  • the deposition of the light-emitting layer and processing by photolithography can be repeated three times to form three types of island-shaped light-emitting layers.
  • Devices with an MML structure can be manufactured without using a metal mask, and therefore can exceed the upper limit of fineness resulting from the alignment accuracy of the metal mask. Furthermore, when devices are manufactured without using a metal mask, the equipment required for manufacturing the metal mask and the process of cleaning the metal mask are unnecessary. Furthermore, since the same or similar equipment as that used to manufacture transistors can be used for photolithography processing, there is no need to introduce special equipment to manufacture devices with an MML structure. In this way, the MML structure makes it possible to keep manufacturing costs low, making it suitable for mass production of devices.
  • a display device to which the MML structure is applied for example, there is no need to artificially increase the resolution by applying a special pixel arrangement such as a pentile arrangement, so it is possible to realize a display device with high resolution (for example, 500 ppi or more, 1000 ppi or more, 2000 ppi or more, 3000 ppi or more, or 5000 ppi or more) with a so-called stripe arrangement in which R, G, and B sub-pixels are each arranged in one direction.
  • a special pixel arrangement such as a pentile arrangement
  • the layered structure from the substrate 151 to the insulating layer 235, and the layered structure from the protective layer 131 to the substrate 152 are similar to those of the display device 50A, and therefore will not be described.
  • light-emitting elements 130R, 130G, and 130B are provided on insulating layer 235.
  • the light-emitting element 130R has a conductive layer 124R on the insulating layer 235, a conductive layer 126R on the conductive layer 124R, a layer 133R on the conductive layer 126R, a common layer 114 on the layer 133R, and a common electrode 115 on the common layer 114.
  • the light-emitting element 130R shown in FIG. 24A emits red light (R).
  • the layer 133R has a light-emitting layer that emits red light.
  • the layer 133R and the common layer 114 can be collectively referred to as an EL layer.
  • one or both of the conductive layer 124R and the conductive layer 126R can be referred to as a pixel electrode.
  • the light-emitting element 130G has a conductive layer 124G on the insulating layer 235, a conductive layer 126G on the conductive layer 124G, a layer 133G on the conductive layer 126G, a common layer 114 on the layer 133G, and a common electrode 115 on the common layer 114.
  • the light-emitting element 130G shown in FIG. 24A emits green light (G).
  • the layer 133G has a light-emitting layer that emits green light.
  • the layer 133G and the common layer 114 can be collectively referred to as an EL layer.
  • one or both of the conductive layers 124G and 126G can be referred to as a pixel electrode.
  • the light-emitting element 130B has a conductive layer 124B on the insulating layer 235, a conductive layer 126B on the conductive layer 124B, a layer 133B on the conductive layer 126B, a common layer 114 on the layer 133B, and a common electrode 115 on the common layer 114.
  • the light-emitting element 130B shown in FIG. 24A emits blue light (B).
  • the layer 133B has a light-emitting layer that emits blue light.
  • the layer 133B and the common layer 114 can be collectively referred to as an EL layer.
  • one or both of the conductive layers 124B and 126B can be referred to as a pixel electrode.
  • layers provided in an island shape for each light-emitting element are indicated as layer 133B, layer 133G, or layer 133R, and a layer shared by a plurality of light-emitting elements is indicated as common layer 114.
  • the layers 133R, 133G, and 133B may be referred to as island-shaped EL layers or EL layers formed in an island shape, without including the common layer 114.
  • a light-emitting element manufactured without using a metal mask may not have a common layer, and all layers constituting the EL layer may be formed in an island shape.
  • Layer 133R, layer 133G, and layer 133B are separated from each other.
  • the EL layer in an island shape for each light-emitting element, it is possible to suppress leakage current between adjacent light-emitting elements. This makes it possible to prevent unintended light emission caused by crosstalk, and to realize a display device with extremely high contrast.
  • layers 133R, 133G, and 133B are all shown to have the same thickness, but this is not limited to this. Layers 133R, 133G, and 133B may each have a different thickness.
  • the conductive layer 124R is connected to the conductive layer 112b of the transistor 205R through openings provided in the insulating layer 106, the insulating layer 195, and the insulating layer 235.
  • the conductive layer 124G is connected to the conductive layer 112b of the transistor 205G
  • the conductive layer 124B is connected to the conductive layer 112b of the transistor 205B.
  • the conductive layers 124R, 124G, and 124B are formed to cover the openings provided in the insulating layer 235.
  • Layer 128 is embedded in the recesses of the conductive layers 124R, 124G, and 124B, respectively.
  • Layer 128 has the function of planarizing the recesses of conductive layer 124R, conductive layer 124G, and conductive layer 124B.
  • Conductive layers 126R, 126G, and 126B which are connected to conductive layer 124R, conductive layer 124G, and conductive layer 124B, respectively, are provided on conductive layer 124R, conductive layer 124G, conductive layer 124B, and layer 128. Therefore, the regions overlapping with the recesses of conductive layer 124R, conductive layer 124G, and conductive layer 124B can also be used as light-emitting regions, and the aperture ratio of the pixel can be increased. It is preferable to use a conductive layer that functions as a reflective electrode for conductive layer 124R and conductive layer 126R.
  • Layer 128 may be an insulating layer or a conductive layer.
  • Various inorganic insulating materials, organic insulating materials, and conductive materials can be used as appropriate for layer 128.
  • layer 128 is preferably formed using an insulating material, and is particularly preferably formed using an organic insulating material.
  • the organic insulating material that can be used for insulating layer 237 described above can be used for layer 128.
  • FIG. 24A shows an example in which the top surface of layer 128 has a flat portion, but the shape of layer 128 is not particularly limited.
  • the top surface of layer 128 can have at least one of a convex curved surface, a concave curved surface, and a flat surface.
  • the height of the upper surface of layer 128 and the height of the upper surface of conductive layer 124R may be the same or approximately the same, or may be different from each other.
  • the height of the upper surface of layer 128 may be lower or higher than the height of the upper surface of conductive layer 124R.
  • the end of the conductive layer 126R may be aligned with the end of the conductive layer 124R, or may cover the side of the end of the conductive layer 124R.
  • the ends of the conductive layer 124R and the conductive layer 126R preferably have a tapered shape.
  • the ends of the conductive layer 124R and the conductive layer 126R preferably have a tapered shape with a taper angle greater than 0 degrees and less than 90 degrees.
  • the layer 133R provided along the side of the pixel electrode has an inclined portion.
  • the conductive layers 124G and 126G, as well as the conductive layers 124B and 126B, are similar to the conductive layers 124R and 126R, and therefore will not be described in detail.
  • conductive layer 126R The upper and side surfaces of conductive layer 126R are covered by layer 133R. Similarly, the upper and side surfaces of conductive layer 126G are covered by layer 133G, and the upper and side surfaces of conductive layer 126B are covered by layer 133B. Therefore, the entire area in which conductive layer 126R, conductive layer 126G, and conductive layer 126B are provided can be used as the light-emitting area of light-emitting element 130R, light-emitting element 130G, and light-emitting element 130B, thereby increasing the aperture ratio of the pixel.
  • a portion of the top surface and the side surfaces of layers 133R, 133G, and 133B are covered with insulating layers 125 and 127.
  • a common layer 114 is provided on layers 133R, 133G, 133B, insulating layer 125, and insulating layer 127, and a common electrode 115 is provided on common layer 114.
  • Common layer 114 and common electrode 115 are each continuous films provided in common to multiple light-emitting elements.
  • the insulating layer 237 shown in FIG. 21A and the like is not provided between the conductive layer 126R and the layer 133R.
  • the display device 50E does not have an insulating layer (also called a partition, bank, spacer, etc.) that contacts the pixel electrode and covers the upper end of the pixel electrode. Therefore, the distance between adjacent light-emitting elements can be made extremely narrow. This allows a high-definition or high-resolution display device to be obtained.
  • a mask e.g., a photomask
  • the manufacturing cost of the display device can be reduced.
  • each of the layers 133R, 133G, and 133B has a light-emitting layer.
  • Each of the layers 133R, 133G, and 133B preferably has a light-emitting layer and a carrier transport layer (electron transport layer or hole transport layer) on the light-emitting layer.
  • each of the layers 133R, 133G, and 133B preferably has a light-emitting layer and a carrier block layer (hole block layer or electron block layer) on the light-emitting layer.
  • each of the layers 133R, 133G, and 133B preferably has a light-emitting layer, a carrier block layer on the light-emitting layer, and a carrier transport layer on the carrier block layer. Since the surfaces of the layers 133R, 133G, and 133B are exposed during the manufacturing process of the display device, by providing one or both of the carrier transport layer and the carrier block layer on the light-emitting layer, it is possible to suppress exposure of the light-emitting layer to the outermost surface and reduce damage to the light-emitting layer. This can improve the reliability of the light-emitting element.
  • the common layer 114 has, for example, an electron injection layer or a hole injection layer. Alternatively, the common layer 114 may have an electron transport layer and an electron injection layer stacked together, or may have a hole transport layer and a hole injection layer stacked together.
  • the common layer 114 is shared by the light-emitting element 130R, the light-emitting element 130G, and the light-emitting element 130B.
  • Insulating layer 125 covers the sides of layers 133R, 133G, and 133B via insulating layer 125.
  • the side surfaces (and even parts of the top surfaces) of layers 133R, 133G, and 133B are covered with at least one of insulating layers 125 and 127, which prevents the common layer 114 (or common electrode 115) from coming into contact with the side surfaces of the pixel electrodes, layers 133R, 133G, and 133B, and prevents short circuits in the light-emitting elements. This improves the reliability of the light-emitting elements.
  • the insulating layer 125 has an area in contact with each side surface of the layers 133R, 133G, and 133B. By configuring the insulating layer 125 to be in contact with the layers 133R, 133G, and 133B, peeling of the layers 133R, 133G, and 133B can be prevented, and the reliability of the light-emitting element can be improved.
  • the insulating layer 127 is provided on the insulating layer 125 so as to fill the recesses in the insulating layer 125. It is preferable that the insulating layer 127 covers at least a portion of the side surface of the insulating layer 125.
  • the gaps between adjacent island-shaped layers can be filled, reducing the large unevenness of the surface on which layers (e.g., carrier injection layer, common electrode, etc.) are formed on the island-shaped layers, making it possible to make the surface flatter. This improves the coverage of the carrier injection layer, common electrode, etc.
  • layers e.g., carrier injection layer, common electrode, etc.
  • the common layer 114 and the common electrode 115 are provided on the layers 133R, 133G, 133B, the insulating layer 125, and the insulating layer 127. Before the insulating layer 125 and the insulating layer 127 are provided, there is a step between the region where the pixel electrode and the island-shaped EL layer are provided and the region (region between the light-emitting elements) where the pixel electrode and the island-shaped EL layer are not provided.
  • the display device of one embodiment of the present invention can flatten the step by having the insulating layer 125 and the insulating layer 127, and can improve the coverage of the common layer 114 and the common electrode 115. Therefore, it is possible to suppress connection failure due to step disconnection of the common layer 114 and the common electrode 115. In addition, it is possible to suppress an increase in electrical resistance due to local thinning of the common electrode 115 caused by the step.
  • the upper surface of the insulating layer 127 preferably has a shape with high flatness.
  • the upper surface of the insulating layer 127 may have at least one of a flat surface, a convex curved surface, and a concave curved surface.
  • the upper surface of the insulating layer 127 preferably has a convex curved shape with a large radius of curvature.
  • An inorganic insulating film can be used for the insulating layer 125.
  • materials that can be used for the inorganic insulating film include oxides, nitrides, oxynitrides, and nitride oxides. Specific examples of these inorganic insulating films are as described above.
  • the insulating layer 125 may have a single layer structure or a laminated structure. In particular, aluminum oxide is preferable because it has a high selectivity with respect to the EL layer in etching and has a function of protecting the EL layer in the formation of the insulating layer 127 described later.
  • the insulating layer 125 may have a laminated structure of a film formed by the ALD method and a film formed by the sputtering method.
  • the insulating layer 125 may have a laminated structure of, for example, an aluminum oxide film formed by the ALD method and a silicon nitride film formed by the sputtering method.
  • the insulating layer 125 preferably has a function as a barrier insulating layer against at least one of water and oxygen.
  • the insulating layer 125 preferably has a function of suppressing the diffusion of at least one of water and oxygen.
  • the insulating layer 125 preferably has a function of capturing or fixing (also called gettering) at least one of water and oxygen.
  • the insulating layer 125 functions as a barrier insulating layer, making it possible to suppress the intrusion of impurities (typically at least one of water and oxygen) that can diffuse from the outside into each light-emitting element. This configuration makes it possible to provide a highly reliable light-emitting element and further a highly reliable display device.
  • impurities typically at least one of water and oxygen
  • the insulating layer 125 preferably has a low impurity concentration. This can prevent impurities from entering the EL layer from the insulating layer 125 and causing deterioration of the EL layer. In addition, by lowering the impurity concentration in the insulating layer 125, the barrier properties against at least one of water and oxygen can be improved. For example, it is desirable that the insulating layer 125 has a sufficiently low hydrogen concentration or carbon concentration, or preferably both.
  • the insulating layer 127 provided on the insulating layer 125 has the function of flattening the unevenness of the insulating layer 125 formed between adjacent light-emitting elements. In other words, the presence of the insulating layer 127 has the effect of improving the flatness of the surface on which the common electrode 115 is formed.
  • an insulating layer containing an organic material can be suitably used.
  • the organic material it is preferable to use a photosensitive organic resin, for example, a photosensitive resin composition containing an acrylic resin.
  • acrylic resin does not only refer to polymethacrylic acid ester or methacrylic resin, but may refer to acrylic polymers in a broad sense.
  • the insulating layer 127 may be made of acrylic resin, polyimide resin, epoxy resin, imide resin, polyamide resin, polyimideamide resin, silicone resin, siloxane resin, benzocyclobutene resin, phenol resin, precursors of these resins, or the like.
  • the insulating layer 127 may be made of organic materials such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, or alcohol-soluble polyamide resin.
  • the photosensitive resin may be a photoresist. Either a positive-type material or a negative-type material may be used as the photosensitive organic resin.
  • the insulating layer 127 may be made of a material that absorbs visible light. By having the insulating layer 127 absorb the light emitted from the light-emitting element, it is possible to suppress leakage of light from the light-emitting element through the insulating layer 127 to an adjacent light-emitting element (stray light). This can improve the display quality of the display device. In addition, since the display quality can be improved without using a polarizing plate in the display device, it is possible to reduce the weight and thickness of the display device.
  • Materials that absorb visible light include materials containing pigments such as black, materials containing dyes, resin materials with light absorbing properties (such as polyimide), and resin materials that can be used in color filters (color filter materials).
  • resin materials with light absorbing properties such as polyimide
  • color filter materials resin materials that can be used in color filters
  • mixing color filter materials of three or more colors makes it possible to create a resin layer that is black or close to black.
  • Fig. 24B shows an example of a cross section of the display unit 162 of the display device 50F.
  • the display device 50F is mainly different from the display device 50E in that it has a colored layer (such as a color filter).
  • the configuration shown in Fig. 24B can be combined with the region including the FPC 172, the circuit unit 164, the laminated structure from the substrate 151 to the insulating layer 235 of the display unit 162, the connection unit 140, and the configuration of the end portion shown in Fig. 24A.
  • the display device 50F shown in FIG. 24B has a light emitting element 130R, a light emitting element 130G, a light emitting element 130B, a colored layer 132R that transmits red light, a colored layer 132G that transmits green light, and a colored layer 132B that transmits blue light.
  • the light emitted by the light-emitting element 130R is extracted as red light to the outside of the display device 50F via the colored layer 132R.
  • the light emitted by the light-emitting element 130G is extracted as green light to the outside of the display device 50F via the colored layer 132G.
  • the light emitted by the light-emitting element 130B is extracted as blue light to the outside of the display device 50F via the colored layer 132B.
  • Each of the light-emitting elements 130R, 130G, and 130B has a layer 133. These three layers 133 are formed using the same material and in the same process. Furthermore, these three layers 133 are separated from one another. By providing an island-like EL layer for each light-emitting element, it is possible to suppress leakage current between adjacent light-emitting elements. This makes it possible to prevent unintended light emission due to crosstalk, and to realize a display device with extremely high contrast.
  • the light emitting elements 130R, 130G, and 130B shown in FIG. 24B emit white light.
  • the white light emitted by the light emitting elements 130R, 130G, and 130B passes through the colored layers 132R, 132G, and 132B, thereby obtaining light of the desired color.
  • the light-emitting elements 130R, 130G, and 130B shown in FIG. 24B emit blue light.
  • the layer 133 has one or more light-emitting layers that emit blue light.
  • the blue light emitted by the light-emitting element 130B can be extracted.
  • a color conversion layer is provided between the light-emitting element 130R or the light-emitting element 130G and the substrate 152, so that the blue light emitted by the light-emitting element 130R or the light-emitting element 130G can be converted into light with a longer wavelength, and red or green light can be extracted.
  • a display device 50G shown in FIG. 25 differs from the display device 50F mainly in that it is a bottom emission type display device.
  • Light emitted by the light-emitting element is emitted toward the substrate 151. It is preferable to use a material that is highly transparent to visible light for the substrate 151. On the other hand, the translucency of the material used for the substrate 152 does not matter.
  • FIG. 25 shows an example in which the light-shielding layer 117 is provided on the substrate 151, the insulating layer 153 is provided on the light-shielding layer 117, and the transistors 205D, 205R (not shown), 205G, and 205B are provided on the insulating layer 153.
  • the colored layers 132R, 132G, and 132B (not shown) are provided on the insulating layer 195, and the insulating layer 235 is provided on the colored layers 132R, 132G, and 132B.
  • the light-emitting element 130R which overlaps with the colored layer 132R, has a conductive layer 124R, a conductive layer 126R, a layer 133, a common layer 114, and a common electrode 115.
  • the light-emitting element 130G which overlaps with the colored layer 132G, has a conductive layer 124G, a conductive layer 126G, a layer 133, a common layer 114, and a common electrode 115.
  • the light-emitting element 130B (not shown), which overlaps with the colored layer 132B, has a conductive layer 124B (not shown), a conductive layer 126B (not shown), a layer 133, a common layer 114, and a common electrode 115.
  • the conductive layers 124R, 124G, 124B, 126R, 126G, and 126B are each made of a material that is highly transparent to visible light. It is preferable to use a material that reflects visible light for the common electrode 115. In a bottom emission display device, a metal with low electrical resistivity can be used for the common electrode 115, so that voltage drops caused by the electrical resistance of the common electrode 115 can be suppressed, and high display quality can be achieved.
  • the transistor of one embodiment of the present invention can be miniaturized and its occupation area can be reduced, so that in a display device with a bottom emission structure, the pixel aperture ratio can be increased or the pixel size can be reduced.
  • the electronic device of this embodiment has a display device of one embodiment of the present invention in a display portion.
  • the display device of one embodiment of the present invention can easily achieve high definition and high resolution. Therefore, it can be used in the display portion of various electronic devices.
  • the semiconductor device of one embodiment of the present invention can be applied to parts other than the display part of an electronic device.
  • the semiconductor device of one embodiment of the present invention in a control part of an electronic device, it is possible to reduce power consumption, which is preferable.
  • Electronic devices include, for example, electronic devices with relatively large screens such as television sets, desktop or notebook computers, computer monitors, digital signage, large game machines such as pachinko machines, as well as digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and audio playback devices.
  • the display device of one embodiment of the present invention can be used favorably in electronic devices having a relatively small display area because it is possible to increase the resolution.
  • electronic devices include wristwatch-type and bracelet-type information terminals (wearable devices), as well as wearable devices that can be worn on the head, such as VR devices such as head-mounted displays, glasses-type AR devices, and MR devices.
  • the display device of one embodiment of the present invention preferably has an extremely high resolution such as HD (1280 x 720 pixels), FHD (1920 x 1080 pixels), WQHD (2560 x 1440 pixels), WQXGA (2560 x 1600 pixels), 4K (3840 x 2160 pixels), or 8K (7680 x 4320 pixels).
  • an extremely high resolution such as HD (1280 x 720 pixels), FHD (1920 x 1080 pixels), WQHD (2560 x 1440 pixels), WQXGA (2560 x 1600 pixels), 4K (3840 x 2160 pixels), or 8K (7680 x 4320 pixels).
  • HD 1280 x 720 pixels
  • FHD (1920 x 1080 pixels
  • WQHD 2560 x 1440 pixels
  • WQXGA 2560 x 1600 pixels
  • 4K 3840 x 2160 pixels
  • 8K 8K
  • the pixel density (resolution) of the display device of one embodiment of the present invention is preferably 100 ppi or more, preferably 300 ppi or more, more preferably 500 ppi or more, more preferably 1000 ppi or more, more preferably 2000 ppi or more, more preferably 3000 ppi or more, more preferably 5000 ppi or more, and even more preferably 7000 ppi or more.
  • the display device can support various screen ratios such as 1:1 (square), 4:3, 16:9, and 16:10.
  • the electronic device of this embodiment may have a sensor (including a function to sense, detect, or measure force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared light).
  • a sensor including a function to sense, detect, or measure force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared light).
  • the electronic device of this embodiment can have various functions. For example, it can have a function to display various information (still images, videos, text images, etc.) on the display unit, a touch panel function, a function to display a calendar, date or time, etc., a function to execute various software (programs), a wireless communication function, a function to read out programs or data recorded on a recording medium, etc.
  • a function to display various information still images, videos, text images, etc.
  • a touch panel function a function to display a calendar, date or time, etc.
  • a function to execute various software (programs) a wireless communication function
  • a function to read out programs or data recorded on a recording medium etc.
  • FIG. 26A to 26D An example of a wearable device that can be worn on the head will be described using Figures 26A to 26D.
  • These wearable devices have at least one of the following functions: a function to display AR content, a function to display VR content, a function to display SR content, and a function to display MR content.
  • a function to display AR content a function to display AR content
  • VR content a function to display VR content
  • SR content a function to display SR content
  • MR content a function to display MR content
  • Electronic device 700A shown in Fig. 26A and electronic device 700B shown in Fig. 26B each have a pair of display panels 751, a pair of housings 721, a communication unit (not shown), a pair of mounting units 723, a control unit (not shown), an imaging unit (not shown), a pair of optical members 753, a frame 757, and a pair of nose pads 758.
  • display panel 751 is omitted in Fig. 26B.
  • a display device can be applied to the display panel 751. Therefore, the electronic device can display images with extremely high resolution.
  • Electronic device 700A and electronic device 700B can each project an image displayed on display panel 751 onto display area 756 of optical member 753. Because optical member 753 is translucent, the user can see the image displayed in the display area superimposed on the transmitted image visible through optical member 753. Therefore, electronic device 700A and electronic device 700B are each electronic devices capable of AR display.
  • Electronic device 700A and electronic device 700B may be provided with a camera capable of capturing an image of the front as an imaging unit. Furthermore, electronic device 700A and electronic device 700B may each be provided with an acceleration sensor such as a gyro sensor, thereby detecting the orientation of the user's head and displaying an image corresponding to that orientation in display area 756.
  • an acceleration sensor such as a gyro sensor
  • the communication unit has a wireless communication device, and can supply video signals and the like via the wireless communication device.
  • a connector can be provided to which a cable through which a video signal and power supply potential can be connected.
  • Electronic device 700A and electronic device 700B are provided with a battery (not shown) and can be charged wirelessly, wired, or both.
  • the housing 721 may be provided with a touch sensor module.
  • the touch sensor module has a function of detecting that the outer surface of the housing 721 is touched.
  • the touch sensor module can detect a tap operation or a slide operation by the user and execute various processes. For example, a tap operation can execute processes such as pausing or resuming a video, and a slide operation can execute processes such as fast-forwarding or rewinding. Furthermore, by providing a touch sensor module on each of the two housings 721, the range of operations can be expanded.
  • touch sensors can be applied as the touch sensor module.
  • various types can be adopted, such as the capacitance type, resistive film type, infrared type, electromagnetic induction type, surface acoustic wave type, and optical type.
  • a photoelectric conversion element When using an optical touch sensor, a photoelectric conversion element can be used as the light receiving element.
  • the active layer of the photoelectric conversion element can be made of either or both of an inorganic semiconductor and an organic semiconductor.
  • Electronic device 800A shown in FIG. 26C and electronic device 800B shown in FIG. 26D each have a pair of display units 820, a housing 821, a communication unit 822, a pair of mounting units 823, a control unit 824, a pair of imaging units 825, and a pair of lenses 832. Note that display unit 820, communication unit 822, and imaging unit 825 are omitted in FIG. 26D.
  • a display device can be applied to the display portion 820. Therefore, the electronic device can display images with extremely high resolution. This allows the user to feel a high sense of immersion.
  • the display unit 820 is provided at a position inside the housing 821 where it can be viewed through the lens 832. In addition, by displaying different images on the pair of display units 820, it is also possible to perform a three-dimensional display using parallax.
  • the electronic device 800A and the electronic device 800B can each be considered electronic devices for VR.
  • a user wearing the electronic device 800A or the electronic device 800B can view the image displayed on the display unit 820 through the lens 832.
  • Electric device 800A and electronic device 800B each preferably have a mechanism that can adjust the left-right positions of lens 832 and display unit 820 so that they are optimally positioned according to the position of the user's eyes. Also, it is preferable that they have a mechanism that can adjust the focus by changing the distance between lens 832 and display unit 820.
  • the attachment unit 823 allows the user to attach the electronic device 800A or electronic device 800B to the head. Note that in FIG. 26C and other figures, the attachment unit 823 is shaped like the temples of glasses, but is not limited to this. The attachment unit 823 may be shaped like a helmet or band, for example, as long as it can be worn by the user.
  • the imaging unit 825 has a function of acquiring external information.
  • the data acquired by the imaging unit 825 can be output to the display unit 820.
  • An image sensor can be used for the imaging unit 825.
  • multiple cameras may be provided to support multiple angles of view, such as telephoto and wide angle.
  • a distance measuring sensor capable of measuring the distance to an object
  • the imaging unit 825 is one aspect of the detection unit.
  • the detection unit for example, an image sensor or a distance image sensor such as a LIDAR (Light Detection and Ranging) can be used.
  • LIDAR Light Detection and Ranging
  • the electronic device 800A may have a vibration mechanism that functions as a bone conduction earphone.
  • a vibration mechanism that functions as a bone conduction earphone.
  • a configuration having such a vibration mechanism can be applied to one or more of the display unit 820, the housing 821, and the wearing unit 823. This makes it possible to enjoy video and audio by simply wearing the electronic device 800A without the need for separate audio equipment such as headphones, earphones, or speakers.
  • Each of electronic devices 800A and 800B may have an input terminal.
  • the input terminal can be connected to a cable that supplies a video signal from a video output device or the like, and power for charging a battery provided within the electronic device.
  • the electronic device of one embodiment of the present invention may have a function of wireless communication with the earphone 750.
  • the earphone 750 has a communication unit (not shown) and has a wireless communication function.
  • the earphone 750 can receive information (e.g., audio data) from the electronic device through the wireless communication function.
  • the electronic device 700A shown in FIG. 26A has a function of transmitting information to the earphone 750 through the wireless communication function.
  • the electronic device 800A shown in FIG. 26C has a function of transmitting information to the earphone 750 through the wireless communication function.
  • the electronic device may have an earphone unit.
  • the electronic device 700B shown in FIG. 26B has an earphone unit 727.
  • the earphone unit 727 and the control unit may be configured to be connected to each other by wire.
  • a portion of the wiring connecting the earphone unit 727 and the control unit may be disposed inside the housing 721 or the attachment unit 723.
  • electronic device 800B shown in FIG. 26D has earphone unit 827.
  • earphone unit 827 and control unit 824 can be configured to be connected to each other by wire.
  • Part of the wiring connecting earphone unit 827 and control unit 824 may be disposed inside housing 821 or mounting unit 823.
  • earphone unit 827 and mounting unit 823 may have magnets. This allows earphone unit 827 to be fixed to mounting unit 823 by magnetic force, which is preferable as it makes storage easier.
  • the electronic device may have an audio output terminal to which earphones or headphones can be connected.
  • the electronic device may also have one or both of an audio input terminal and an audio input mechanism.
  • a sound collection device such as a microphone can be used as the audio input mechanism.
  • the electronic device may be endowed with the functionality of a so-called headset.
  • electronic devices according to one embodiment of the present invention are suitable for both glasses-type devices (such as electronic device 700A and electronic device 700B) and goggle-type devices (such as electronic device 800A and electronic device 800B).
  • An electronic device can transmit information to an earphone via wire or wirelessly.
  • the electronic device 6500 shown in FIG. 27A is a portable information terminal that can be used as a smartphone.
  • the electronic device 6500 has a housing 6501, a display portion 6502, a power button 6503, a button 6504, a speaker 6505, a microphone 6506, a camera 6507, and a light source 6508.
  • the display portion 6502 has a touch panel function.
  • the display device of one embodiment of the present invention can be applied to the display portion 6502.
  • FIG. 27B is a schematic cross-sectional view including the end of the housing 6501 on the microphone 6506 side.
  • a translucent protective member 6510 is provided on the display surface side of the housing 6501, and a display panel 6511, optical members 6512, a touch sensor panel 6513, a printed circuit board 6517, a battery 6518, etc. are arranged in the space surrounded by the housing 6501 and the protective member 6510.
  • the display panel 6511, the optical member 6512, and the touch sensor panel 6513 are fixed to the protective member 6510 by an adhesive layer (not shown).
  • a part of the display panel 6511 is folded back in the area outside the display unit 6502, and the FPC 6515 is connected to the folded back part.
  • An IC 6516 is mounted on the FPC 6515.
  • the FPC 6515 is connected to a terminal provided on a printed circuit board 6517.
  • the flexible display of one embodiment of the present invention can be applied to the display panel 6511. Therefore, an extremely lightweight electronic device can be realized.
  • the display panel 6511 is extremely thin, a large-capacity battery 6518 can be mounted thereon while keeping the thickness of the electronic device small.
  • an electronic device with a narrow frame can be realized.
  • FIG. 27C shows an example of a television device.
  • a display unit 7000 is built into a housing 7101.
  • the housing 7101 is supported by a stand 7103.
  • a display device can be applied to the display portion 7000.
  • the television device 7100 shown in FIG. 27C can be operated using operation switches provided on the housing 7101 and a separate remote control 7111.
  • the display unit 7000 may be provided with a touch sensor, and the television device 7100 may be operated by touching the display unit 7000 with a finger or the like.
  • the remote control 7111 may have a display unit that displays information output from the remote control 7111.
  • the channel and volume can be operated using operation keys or a touch panel provided on the remote control 7111, and the image displayed on the display unit 7000 can be operated.
  • the television device 7100 is configured to include a receiver and a modem.
  • the receiver can receive general television broadcasts.
  • by connecting to a wired or wireless communication network via the modem it is also possible to perform one-way (from sender to receiver) or two-way (between sender and receiver, or between receivers, etc.) information communication.
  • FIG. 27D shows an example of a notebook computer.
  • the notebook computer 7200 has a housing 7211, a keyboard 7212, a pointing device 7213, an external connection port 7214, etc.
  • a display unit 7000 is built into the housing 7211.
  • a display device can be applied to the display portion 7000.
  • Figures 27E and 27F show an example of digital signage.
  • the digital signage 7300 shown in FIG. 27E has a housing 7301, a display unit 7000, and a speaker 7303. It can also have LED lamps, operation keys (including a power switch or an operation switch), connection terminals, various sensors, a microphone, etc.
  • FIG. 27F shows digital signage 7400 attached to a cylindrical pole 7401.
  • Digital signage 7400 has a display unit 7000 that is provided along the curved surface of pole 7401.
  • a display device according to one embodiment of the present invention can be applied to the display portion 7000.
  • the larger the display unit 7000 the more information can be provided at one time. Also, the larger the display unit 7000, the more easily it catches people's attention, which can increase the advertising effectiveness of an advertisement, for example.
  • a touch panel By applying a touch panel to the display unit 7000, not only can images or videos be displayed on the display unit 7000, but the user can also intuitively operate it, which is preferable. Furthermore, when used to provide information such as route information or traffic information, the intuitive operation can improve usability.
  • the digital signage 7300 or the digital signage 7400 can be linked via wireless communication with an information terminal 7311 or an information terminal 7411 such as a smartphone carried by a user.
  • advertising information displayed on the display unit 7000 can be displayed on the screen of the information terminal 7311 or the information terminal 7411.
  • the display on the display unit 7000 can be switched by operating the information terminal 7311 or the information terminal 7411.
  • the digital signage 7300 or the digital signage 7400 can also be made to run a game using the screen of the information terminal 7311 or the information terminal 7411 as an operating means (controller). This allows an unspecified number of users to participate in and enjoy the game at the same time.
  • the electronic device shown in Figures 28A to 28G has a housing 9000, a display unit 9001, a speaker 9003, operation keys 9005 (including a power switch or an operation switch), a connection terminal 9006, a sensor 9007 (including a function to sense, detect, or measure force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared), a microphone 9008, etc.
  • a display device of one embodiment of the present invention can be applied to the display portion 9001.
  • the electronic devices shown in Figures 28A to 28G have various functions. For example, they can have a function to display various information (still images, videos, text images, etc.) on the display unit, a touch panel function, a function to display a calendar, date or time, etc., a function to control processing by various software (programs), a wireless communication function, a function to read and process programs or data recorded on a recording medium, etc.
  • the functions of the electronic devices are not limited to these, and they can have various functions.
  • the electronic devices may have multiple display units.
  • the electronic devices may have a function to provide a camera or the like, capture still images or videos, and store them on a recording medium (external or built into the camera), display the captured images on the display unit, etc.
  • FIG. 28A is a perspective view showing a mobile information terminal 9101.
  • the mobile information terminal 9101 can be used as, for example, a smartphone.
  • the mobile information terminal 9101 may be provided with a speaker 9003, a connection terminal 9006, a sensor 9007, and the like.
  • the mobile information terminal 9101 can display text and image information on multiple surfaces.
  • FIG. 28A shows an example in which three icons 9050 are displayed.
  • Information 9051 shown in a dashed rectangle can also be displayed on another surface of the display unit 9001. Examples of the information 9051 include notifications of incoming e-mail, SNS, telephone calls, etc., the title of e-mail or SNS, the sender's name, the date and time, the remaining battery level, and radio wave strength.
  • an icon 9050 or the like may be displayed at the position where the information 9051 is displayed.
  • Figure 28B is a perspective view showing a mobile information terminal 9102.
  • the mobile information terminal 9102 has a function of displaying information on three or more sides of the display unit 9001.
  • information 9052, information 9053, and information 9054 are each displayed on different sides.
  • a user can check information 9053 displayed in a position that can be observed from above the mobile information terminal 9102 while the mobile information terminal 9102 is stored in a breast pocket of clothes. The user can check the display without taking the mobile information terminal 9102 out of the pocket and determine, for example, whether or not to answer a call.
  • FIG. 28C is a perspective view showing a tablet terminal 9103.
  • the tablet terminal 9103 is capable of executing various applications such as mobile phone calls, e-mail, text browsing and creation, music playback, Internet communication, and computer games, for example.
  • the tablet terminal 9103 has a display unit 9001, a camera 9002, a microphone 9008, and a speaker 9003 on the front side of the housing 9000, operation keys 9005 as operation buttons on the side of the housing 9000, and a connection terminal 9006 on the bottom.
  • FIG. 28D is a perspective view showing a wristwatch-type mobile information terminal 9200.
  • the mobile information terminal 9200 can be used, for example, as a smart watch (registered trademark).
  • the display surface of the display unit 9001 is curved, and display can be performed along the curved display surface.
  • the mobile information terminal 9200 can also make hands-free calls by communicating with, for example, a headset capable of wireless communication.
  • the mobile information terminal 9200 can also transmit data to and from other information terminals and charge itself via a connection terminal 9006. Charging may be performed by wireless power supply.
  • FIG. 28E to 28G are perspective views showing a foldable mobile information terminal 9201.
  • FIG. 28E is a perspective view of the mobile information terminal 9201 in an unfolded state
  • FIG. 28G is a perspective view of the mobile information terminal 9201 in a folded state
  • FIG. 28F is a perspective view of a state in the middle of changing from one of FIG. 28E and FIG. 28G to the other.
  • the mobile information terminal 9201 is highly portable when folded, and is highly viewable due to a seamless, wide display area when unfolded.
  • the display unit 9001 of the mobile information terminal 9201 is supported by three housings 9000 connected by hinges 9055.
  • the display unit 9001 can be bent with a radius of curvature of 0.1 mm or more and 150 mm or less.

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