WO2024254938A1 - 一种显示面板及显示装置 - Google Patents
一种显示面板及显示装置 Download PDFInfo
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- WO2024254938A1 WO2024254938A1 PCT/CN2023/108132 CN2023108132W WO2024254938A1 WO 2024254938 A1 WO2024254938 A1 WO 2024254938A1 CN 2023108132 W CN2023108132 W CN 2023108132W WO 2024254938 A1 WO2024254938 A1 WO 2024254938A1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H29/00—Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
- H10H29/30—Active-matrix LED displays
- H10H29/41—Insulating layers formed between the driving transistors and the LEDs
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/80—Constructional details
- H10K59/875—Arrangements for extracting light from the devices
- H10K59/879—Arrangements for extracting light from the devices comprising refractive means, e.g. lenses
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H29/00—Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
- H10H29/80—Constructional details
- H10H29/85—Packages
- H10H29/855—Optical field-shaping means, e.g. lenses
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/124—Insulating layers formed between TFT elements and OLED elements
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
- H10K59/65—OLEDs integrated with inorganic image sensors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/80—Constructional details
- H10K59/87—Passivation; Containers; Encapsulations
- H10K59/873—Encapsulations
- H10K59/8731—Encapsulations multilayered coatings having a repetitive structure, e.g. having multiple organic-inorganic bilayers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H29/00—Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
- H10H29/80—Constructional details
- H10H29/842—Coatings, e.g. passivation layers or antireflective coatings
Definitions
- the present invention relates to the field of display technology, and in particular to a display panel and a display device.
- the screen-to-body ratio of the display area needs to be increased as much as possible, which requires the front camera above the screen to be hidden under the screen.
- the front camera sufficient light intake is required to ensure the imaging effect, so the camera area of the display panel needs to have a sufficiently high transmittance.
- Embodiments of the present invention provide a display panel and a display device, aiming to solve the problem of low light transmittance in a display panel area corresponding to a camera in the prior art.
- the present application provides a display panel, the display panel comprising:
- the display panel comprises a first display area and a second display area, and the light transmittance of the first display area is greater than the light transmittance of the second display area;
- the display panel further includes:
- An inorganic insulating layer disposed on one side of the substrate
- a pixel driving circuit is arranged in the inorganic insulating layer, wherein the pixel driving circuit includes a plurality of first pixel driving circuits arranged in the first display area or the second display area, and a plurality of second pixel driving circuits arranged in the second display area;
- An organic insulating layer disposed on a side of the inorganic insulating layer away from the substrate;
- the light-emitting layer comprising: a plurality of first light-emitting pixels arranged in the first display area, and a plurality of second light-emitting pixels arranged in the second display area, the first pixel driving circuit being electrically connected to the first light-emitting pixels, and the second pixel driving circuit being electrically connected to the second light-emitting pixels;
- the inorganic insulating layer includes a first inorganic insulating sublayer, and the refractive index of the first inorganic insulating sublayer is smaller than the refractive index of the substrate and smaller than the refractive index of the organic insulating layer.
- the inorganic insulating layer further includes:
- the second inorganic insulating sublayer is disposed between the first inorganic insulating sublayer and the organic insulating layer, and the refractive index of the second inorganic insulating sublayer is greater than the refractive index of the first inorganic insulating sublayer.
- a refractive index of the second inorganic insulating sublayer is greater than a refractive index of the substrate, and greater than a refractive index of the organic insulating layer.
- the inorganic insulating layer further includes:
- the third inorganic insulating sublayer is disposed between the second inorganic insulating sublayer and the organic insulating layer, and the refractive index of the third inorganic insulating sublayer is smaller than the refractive index of the substrate, the refractive index of the second inorganic insulating sublayer, and the refractive index of the organic insulating layer.
- the thickness of the third inorganic insulating sublayer is smaller than the thickness of the first inorganic insulating sublayer.
- the inorganic insulating layer further includes:
- the fourth inorganic insulating sublayer is disposed between the third inorganic insulating sublayer and the organic insulating layer, and the refractive index of the fourth inorganic insulating sublayer is greater than the refractive index of the first inorganic insulating sublayer and the refractive index of the third inorganic insulating sublayer.
- a refractive index of the fourth inorganic insulating sublayer is greater than a refractive index of the substrate, and greater than a refractive index of the organic insulating layer.
- the first inorganic insulating sublayer has the same refractive index as the third inorganic insulating sublayer
- the second inorganic insulating sublayer has the same refractive index as the fourth inorganic insulating sublayer.
- the inorganic insulating sublayer further includes a fifth inorganic insulating sublayer, and the fifth inorganic insulating sublayer is disposed between the fourth inorganic insulating sublayer and the organic insulating layer.
- the inorganic insulating sublayer includes: a plurality of alternately stacked low-refractive-index inorganic insulating sublayers and high-refractive-index inorganic insulating sublayers, wherein the low-refractive-index inorganic insulating sublayer is arranged close to the substrate, and the refractive index of the high-refractive-index inorganic insulating sublayer is greater than that of the adjacent low-refractive-index inorganic insulating sublayer.
- k is a positive integer, and the k value is determined according to the number of low-refractive-index inorganic insulating sublayers along the direction from the organic insulating layer to the substrate; ⁇ is the wavelength of light, and n is the refractive index.
- an embodiment of the present application further provides a device, wherein the display device comprises the display device including a sensor and a display panel, wherein the display panel comprises a first display area and a second display area, and the transmittance of the first display area is greater than the transmittance of the second display area;
- the display panel further includes:
- An inorganic insulating layer disposed on one side of the substrate
- a pixel driving circuit is arranged in the inorganic insulating layer, wherein the pixel driving circuit includes a plurality of first pixel driving circuits arranged in the first display area or the second display area, and a plurality of second pixel driving circuits arranged in the second display area;
- An organic insulating layer disposed on a side of the inorganic insulating layer away from the substrate;
- the light-emitting layer comprising: a plurality of first light-emitting pixels arranged in the first display area, and a plurality of second light-emitting pixels arranged in the second display area, the first pixel driving circuit being electrically connected to the first light-emitting pixels, and the second pixel driving circuit being electrically connected to the second light-emitting pixels;
- the inorganic insulating layer includes a first inorganic insulating sublayer, and the refractive index of the first inorganic insulating sublayer is smaller than the refractive index of the substrate and smaller than the refractive index of the organic insulating layer;
- the sensor is arranged corresponding to the first display area in the display panel.
- the inorganic insulating layer further includes:
- the second inorganic insulating sublayer is disposed between the first inorganic insulating sublayer and the organic insulating layer, and the refractive index of the second inorganic insulating sublayer is greater than the refractive index of the first inorganic insulating sublayer.
- a refractive index of the second inorganic insulating sublayer is greater than a refractive index of the substrate, and greater than a refractive index of the organic insulating layer.
- the inorganic insulating layer further includes:
- the third inorganic insulating sublayer is disposed between the second inorganic insulating sublayer and the organic insulating layer, and the refractive index of the third inorganic insulating sublayer is smaller than the refractive index of the substrate, the refractive index of the second inorganic insulating sublayer, and the refractive index of the organic insulating layer.
- the thickness of the third inorganic insulating sublayer is smaller than the thickness of the first inorganic insulating sublayer.
- the inorganic insulating layer further includes:
- the fourth inorganic insulating sublayer is disposed between the third inorganic insulating sublayer and the organic insulating layer, and the refractive index of the fourth inorganic insulating sublayer is greater than the refractive index of the first inorganic insulating sublayer and the refractive index of the third inorganic insulating sublayer.
- a refractive index of the fourth inorganic insulating sublayer is greater than a refractive index of the substrate, and greater than a refractive index of the organic insulating layer.
- the first inorganic insulating sublayer has the same refractive index as the third inorganic insulating sublayer
- the second inorganic insulating sublayer has the same refractive index as the fourth inorganic insulating sublayer.
- the inorganic insulating sublayer further includes a fifth inorganic insulating sublayer, and the fifth inorganic insulating sublayer is disposed between the fourth inorganic insulating sublayer and the organic insulating layer.
- the inorganic insulating sublayer includes: a plurality of alternately stacked low-refractive-index inorganic insulating sublayers and high-refractive-index inorganic insulating sublayers, wherein the low-refractive-index inorganic insulating sublayer is arranged close to the substrate, and the refractive index of the high-refractive-index inorganic insulating sublayer is greater than that of the adjacent low-refractive-index inorganic insulating sublayer.
- k is a positive integer, and the k value is determined according to the number of low-refractive-index inorganic insulating sublayers along the direction from the organic insulating layer to the substrate; ⁇ is the wavelength of light, and n is the refractive index.
- the present application provides a display panel and a display device, wherein the display panel includes a first display area and a second display area, wherein the light transmittance of the first display area is greater than that of the second display area, and further includes a stacked substrate, an inorganic insulating layer, an organic insulating layer, and a light-emitting layer; the inorganic insulating layer includes a first inorganic insulating sublayer, wherein the refractive index of the first inorganic insulating sublayer is less than the refractive index of the substrate and less than the refractive index of the organic insulating layer.
- the present application improves the light transmittance by setting a stacking mechanism of film layers with different refractive indices, thereby improving the imaging effect of the display panel.
- FIG1 is a cross-sectional view of an embodiment of a display panel provided in an embodiment of the present application.
- FIG2 is a schematic structural diagram of another embodiment of a display panel provided in an embodiment of the present application.
- FIG3 is a schematic structural diagram of another embodiment of a display panel provided in an embodiment of the present application.
- FIG4 is a schematic structural diagram of another embodiment of a display panel provided in an embodiment of the present application.
- FIG5 is a schematic structural diagram of another embodiment of a display panel provided in an embodiment of the present application.
- FIG6 is a schematic structural diagram of another embodiment of a display panel provided in an embodiment of the present application.
- FIG7 is a schematic structural diagram of another embodiment of a display panel provided in an embodiment of the present application.
- FIG8 is a cross-sectional view of another embodiment of a display panel provided in an embodiment of the present application.
- FIG9 is a schematic structural diagram of another embodiment of a display panel provided in an embodiment of the present application.
- FIG10 is a cross-sectional view of another embodiment of a display panel provided in an embodiment of the present application.
- FIG11 is a schematic structural diagram of another embodiment of a display panel provided in an embodiment of the present application.
- FIG. 12 is a cross-sectional view of another embodiment of a display panel provided in an embodiment of the present application.
- first and second are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as “first” and “second” may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of “multiple” is two or more, unless otherwise clearly and specifically defined.
- the embodiments of the present invention provide a display panel and a display device, which are described in detail below.
- the display panel includes a first display area and a second display area, and the transmittance of the first display area is greater than that of the second display area.
- the first display area and the second display area may correspond to the under-screen camera area in the display panel, and the under-screen camera area is the area corresponding to the under-screen camera, and the under-screen camera area is divided into a light-transmitting area and a light-shielding area.
- the light-shielding area is mainly the area corresponding to the thin-film transistor in the display panel, which is the second display area, and the light-transmitting area has no thin-film transistor, which is the first display area; light mainly passes through the light-transmitting area to enter the under-screen camera.
- the present application is mainly to increase the light transmittance of the light-transmitting area, i.e., the first display area.
- the display panel further includes: a substrate 10, an inorganic insulating layer 20, a pixel driving circuit, an organic insulating layer 30 and a light-emitting layer 40.
- the inorganic insulating layer 20 is arranged on one side of the substrate 10; the pixel driving circuit is arranged in the inorganic insulating layer 20, and the pixel driving circuit includes a plurality of first pixel driving circuits arranged in the first display area or the second display area, and a plurality of second pixel driving circuits arranged in the second display area.
- the organic insulating layer 30 is arranged on the side of the inorganic insulating layer 20 away from the base substrate 10; the light-emitting layer 40 is arranged on the side of the organic insulating layer 30 away from the base substrate 10, and the light-emitting layer 40 includes a plurality of first light-emitting pixels arranged in the first display area, and a plurality of second light-emitting pixels arranged in the second display area, the first pixel driving circuit is electrically connected to the first light-emitting pixel, and the second pixel driving circuit is electrically connected to the second light-emitting pixel.
- the inorganic insulating layer 20 includes a first inorganic insulating sublayer 201, and the refractive index of the first inorganic insulating sublayer 201 is less than the refractive index of the substrate and less than the refractive index of the organic insulating layer.
- the substrate 10, the inorganic insulating layer 20 and the organic insulating layer 30 stacked in the display panel are structured as a whole with different refractive indices for each layer.
- the low refractive index film layer is used as an anti-reflection film of the high refractive index film layer to improve the light transmittance, thereby effectively improving the screen body transmittance of the camera area under the screen.
- the inorganic insulating layer 20 may further include a second inorganic insulating sublayer 202.
- a schematic diagram of the structure of another embodiment of the display panel provided in the embodiment of the present application is provided.
- the second inorganic insulating sublayer 202 is disposed between the first inorganic insulating sublayer 201 and the organic insulating layer 30, and the refractive index of the second inorganic insulating sublayer 202 is greater than the refractive index of the first inorganic insulating sublayer 201.
- the refractive index of the second inorganic insulating sublayer 202 is greater than the refractive index of the substrate 10 and also greater than the refractive index of the organic insulating layer 30.
- the inorganic insulating layer 20 may further include a third inorganic insulating sublayer 203, which is disposed between the second inorganic insulating sublayer 202 and the organic insulating layer 30.
- the refractive index of the third inorganic insulating sublayer 203 is smaller than the refractive index of the substrate 10, smaller than the refractive index of the second inorganic insulating sublayer 202, and smaller than the refractive index of the organic insulating layer 30.
- the inorganic insulating layer 20 further includes: a fourth inorganic insulating sublayer 204, which is arranged between the third inorganic insulating sublayer 203 and the organic insulating layer 30.
- the refractive index of the fourth inorganic insulating sublayer 204 is greater than the refractive index of the first inorganic insulating sublayer 201 and the refractive index of the third inorganic insulating sublayer 203.
- the refractive index of the fourth inorganic insulating sublayer 204 is greater than the refractive index of the substrate 10, and also greater than the refractive index of the organic insulating layer 30.
- the inorganic insulating layer 20 further includes: a fifth inorganic insulating sublayer 205, which is disposed between the fourth inorganic insulating sublayer 204 and the organic insulating layer 30.
- the refractive index of the fifth inorganic insulating sublayer 205 is smaller than the refractive index of the substrate 10 and the refractive index of the organic insulating layer 30.
- the refractive index of the fifth inorganic insulating sublayer 205 is also smaller than the refractive index of the fourth insulating sublayer 204.
- FIG4 is a schematic diagram of another embodiment of the display panel provided by the present application.
- the inorganic insulating sublayer may further include a sixth inorganic insulating layer 206 , which is disposed between the fifth inorganic insulating sublayer 205 and the organic insulating layer 30 .
- the refractive index of the first inorganic insulating sublayer 201, the third inorganic insulating sublayer 203 and the fifth inorganic insulating sublayer can be in the same refractive index range; in a specific embodiment, the refractive index of the three can be the same.
- the refractive index of the second inorganic insulating sublayer 202, the refractive index of the fourth inorganic insulating sublayer 204 and the sixth insulating sublayer 206 can also be in the same refractive index range; in a specific embodiment, the refractive index of the three can be the same.
- the first inorganic insulating sublayer 201, the third inorganic insulating sublayer 203 and the fifth inorganic insulating sublayer can be made of the same material, for example, all of them are silicon oxide materials.
- the refractive index of the second inorganic insulating sublayer 202, the fourth inorganic insulating sublayer 204 and the sixth inorganic insulating layer 206 can be made of the same material, for example, all of them are silicon oxide materials.
- the thicknesses of different inorganic insulating sublayers are usually different. Specifically, the thickness of the third inorganic insulating sublayer is usually less than the thickness of the first inorganic insulating sublayer.
- the inorganic insulating layer is the gate insulating layer, planarization layer and other structures in the display panel.
- the actual structure of the display panel is described below:
- the display panel further includes a stacked substrate layer 101, multiple barrier layers 102, and a buffer layer 103; an active layer 104 disposed above the buffer layer 103, a first insulating layer 105 disposed above the active layer 104 and completely covering the active layer 104, a first gate layer 106 disposed above the first insulating layer 105, a second insulating layer 107 disposed above the first gate layer 106 and completely covering the first gate layer 106, and a second gate layer 108 disposed above the second insulating layer 107.
- the display panel further includes a first interlayer dielectric layer 109 disposed above the second gate layer 108; an oxide semiconductor layer 100 is further disposed above the first interlayer dielectric layer 109, and a third insulating layer 110 is further formed above the oxide semiconductor layer 100, and the third insulating layer 110 completely covers the oxide semiconductor layer 100.
- a third gate layer 120 is also formed at a position corresponding to the oxide semiconductor layer 100 above the third insulating layer 110; a second interlayer dielectric layer 130 is formed above the third gate layer 120, and the second interlayer dielectric layer 130 completely covers the third gate layer 120.
- vias are also formed to form source and drain layers of two thin film transistors respectively; and a planarization layer 140 is also formed above the two source and drain layers, and the planarization layer 140 completely covers the source and drain layers and the second interlayer dielectric layer 130, so as to planarize the upper surface of the display panel.
- FIG. 6 it is a schematic diagram of the structure of another embodiment of the display panel provided in the embodiment of the present application.
- the display panel includes a stacked substrate layer 101, an inorganic insulating layer and a planarization layer 140.
- the embodiment shown in Figure 6 is a simplified schematic diagram of the display panel structure. The technical solution of the present application is described below in conjunction with Figures 5 and 6.
- FIG5 simplifies the display panel structure shown in FIG6 to obtain a display panel including a stacked base layer 101, an inorganic insulating layer and a planarization layer 140;
- the base layer 101 is equivalent to the substrate 10 in FIG1-4
- the planarization layer 140 is similar to the organic insulating layer in FIG1-4
- the inorganic insulating layer and the pixel driving circuit arranged between the inorganic insulating layer are located between the two. Therefore, the inorganic insulating layer in this application includes a multi-layer structure such as the multi-layer barrier layer 20, the buffer layer 103, the first gate layer 40, etc. in FIG1.
- the details are as follows:
- the inorganic insulating layer may be a multi-layer structure, and the inorganic insulating layer may specifically include a cross-stacked silicon nitride layer and a silicon oxide layer.
- the inorganic insulating layer may include: a first silicon oxide layer 301, a first silicon nitride layer 302, a second silicon oxide layer 303, a second silicon nitride layer 304, a third silicon oxide layer 305, and a third silicon nitride layer 306 stacked from bottom to top; and the first silicon oxide layer is disposed above the base layer 101 and in direct contact with the base layer 101, and the planarization layer is disposed above the third silicon nitride layer 306.
- the multiple silicon oxide layers and silicon nitride layers stacked here are similar to the multiple inorganic insulating sub-layers in FIGS. 1-4.
- the multiple film layer structures between the base layer 101 and the first planarization layer in FIG5 are divided into multiple cross-stacked silicon nitride layers and multiple silicon oxide layers according to different preparation materials.
- the preparation materials of the multiple barrier layers 102 are generally silicon dioxide (SiO2) and silicon nitride (SiNx), and the preparation materials of the buffer layer 103 located above the multiple barrier layers 102 also include silicon dioxide and silicon nitride.
- SiO2 silicon dioxide
- SiNx silicon nitride
- the preparation materials of the buffer layer 103 located above the multiple barrier layers 102 also include silicon dioxide and silicon nitride.
- the silicon nitride in the multiple barrier layer 102 and the silicon nitride in the buffer layer 103 are in direct contact, so the silicon nitride in the multiple barrier layer 102 and the silicon nitride in the buffer layer 103 can be regarded as the same layer structure to obtain the first silicon nitride layer 302; at this time, the film layer is re-divided according to the preparation material of the film layer.
- the insulating layer, interlayer dielectric layer, etc. in the present application are all made of silicon oxide and silicon nitride materials
- the other film layers except the active layer, the gate layer, and the oxide semiconductor layer can be divided twice to obtain the aforementioned first silicon oxide layer 301, the first silicon nitride layer 302, the second silicon oxide layer 303, the second silicon nitride layer 304, the third silicon oxide layer 305 and the third silicon nitride layer 306.
- the first silicon oxide layer 301 is actually only a part of the multiple barrier layers 102, while the first silicon nitride layer includes a part of the multiple barrier layers 102 and a part of the buffer layer 103. That is, in the embodiments of the present application, both the silicon oxide layer and the silicon nitride layer may only include a part of the film structure such as the aforementioned multiple barrier layers 102, the buffer layer 103, the insulating layer, and the interlayer dielectric layer, or a part of each of the two film layers may reconstitute a silicon nitride layer or a silicon oxide layer.
- the present application mainly adjusts the light transmittance of the light-transmitting area by changing the refractive index and thickness of the silicon nitride layer and the silicon oxide layer.
- the refractive index of the silicon nitride layer is greater than the refractive index of the silicon oxide layer, and the silicon oxide layer with a lower refractive index is arranged above the silicon nitride layer with a higher refractive index.
- the silicon oxide layer with a lower refractive index can act as an anti-reflection film, which can reduce the reflection of light when passing through different media and enhance the transmittance of light through interference.
- the first silicon oxide layer is arranged above the substrate layer, and the refractive index of the silicon oxide layer (including the first silicon oxide layer) is less than the refractive index of the substrate layer.
- the film layer with a lower refractive index is located above the film layer with a higher refractive index, which can enhance the transmittance of light.
- the silicon oxide layer with a lower refractive index is located above the silicon nitride layer with a higher refractive index, and different silicon oxide layers can also increase the transmittance of light.
- the refractive index of the third silicon nitride layer is greater than the refractive index of the planarization layer, which can also increase the transmittance of light.
- the refractive index range of the film layer in the embodiment shown in FIG5 is:
- the refractive index of the silicon oxide layer is less than the refractive index of the base layer, and even if the silicon oxide layer includes a first silicon oxide layer, a second silicon oxide layer, a third silicon oxide layer and a plurality of different silicon oxide layers, the refractive index ranges of these silicon oxide layers are the same.
- the silicon nitride layer even if the silicon nitride layer includes a first silicon nitride layer, a second silicon nitride layer, a third silicon nitride layer and a plurality of different silicon nitride layers, the refractive index ranges of these silicon nitride layers are the same.
- the refractive index of the base layer is usually set to be greater than the refractive index of the silicon oxide layer; that is, the refractive index of the first inorganic insulator layer, the third inorganic insulator layer and the fifth insulator layer is greater than or less than the refractive index of the substrate.
- the refractive index of the silicon oxide layer (including the first inorganic insulator layer, the third inorganic insulator layer and the fifth insulator layer) is set to 1.48
- the refractive index range of the substrate i.e., the base layer
- the silicon nitride layer with a larger refractive index than the silicon oxide layer may include: a second inorganic insulator layer, a fourth inorganic insulator layer and a sixth insulator layer, and the silicon oxide layer and the silicon nitride layer are alternately stacked, wherein the silicon oxide layer is arranged closer to the base layer.
- the inorganic insulator layer includes: a plurality of alternating stacked low-refractive-index inorganic insulator layers (i.e., silicon oxide layers) and high-refractive-index inorganic insulator layers (silicon nitride layers), and the low-refractive-index inorganic insulator layer is arranged close to the substrate, and the refractive index of the high-refractive-index inorganic insulator layer is greater than the refractive index of the adjacent low-refractive-index inorganic insulator layer.
- low-refractive-index inorganic insulator layers i.e., silicon oxide layers
- high-refractive-index inorganic insulator layers silicon nitride layers
- the value of ⁇ may be 550 nm; in this case, the film thickness of the silicon oxide layer (including the first inorganic insulating sublayer, the third inorganic insulating sublayer and the fifth insulating sublayer) satisfies:
- the silicon oxide layer and silicon nitride layer in the present application can actually be part of the functional layer in FIG. 1 , or can be a combination of parts of two functional layers. Therefore, the film thicknesses of different silicon oxide layers in FIG. 5 are different, and the film thicknesses of different silicon nitride layers are also different.
- the film thicknesses of different silicon oxide layers all meet the film thickness range of 929 (2k-1) ⁇ -955 (2k-1) ⁇ , the actual film thicknesses of different silicon oxide layers are also different.
- the first silicon oxide layer includes a portion of the multiple barrier layer 102, and the thickness of the first silicon oxide layer can be 650-695 nm.
- the second silicon oxide layer can include a portion of the buffer layer and a portion of the first insulating layer, and the thickness of the second silicon oxide layer can be 465-495 nm.
- the third silicon oxide layer can include a portion of the first interlayer dielectric layer, the third insulating layer, and a portion of the second interlayer dielectric layer; the thickness of the third silicon oxide layer can be 275 nm-295 nm.
- the first silicon nitride layer includes a portion of the multiple barrier layer 102 and a portion of the buffer layer 103; the film thickness of the first silicon nitride layer can be specifically in the range of 0-100nm.
- the second silicon nitride layer can include a portion of the second insulating layer and a portion of the first interlayer dielectric layer; the film thickness of the second silicon nitride layer can be in the range of 0-280nm.
- the third silicon nitride layer can include a portion of the second interlayer dielectric layer, and the film thickness of the third silicon nitride layer can be in the range of 0-200nm.
- the overall thickness of the planarization layer or the organic insulating layer can be in the range of 7-8um; and the overall thickness of the base layer or the substrate can be in the range of 12-16um.
- FIG7 it is a schematic diagram of the structure of another embodiment of the display panel provided in the embodiment of the present application; and FIG8 is a cross-sectional view of another embodiment of the display panel provided in the embodiment of the present application.
- the display panel also includes a base layer 101 and a planarization layer, and the inorganic insulating layer at this time is also a multi-layer structure including multiple silicon oxide layers and multiple silicon nitride layers.
- the inorganic insulating layer at this time includes a first silicon oxide layer, a first silicon nitride layer, a second silicon oxide layer, a second silicon nitride layer, and a third silicon oxide layer stacked from bottom to top; the first silicon oxide layer is also arranged above the base layer and is in direct contact with the base layer 101.
- the via needs to be filled to ensure the safety and flatness of the display panel as a whole.
- the material of the planarization layer i.e., the organic insulating layer
- the planarization layer located above the third silicon oxide layer includes the part in the filled via.
- the planarization layer is filled in the via hole. Since the third silicon oxide layer and part of the third silicon oxide layer are removed, the thickness of the third silicon oxide layer in FIG8 is reduced. Specifically, the thickness of the third silicon oxide layer in FIG8 is still within the range of 929 (2k-1) ⁇ -955 (2k-1) ⁇ , but can be specifically 275nm-295nm.
- the third silicon nitride layer and part of the third silicon oxide layer are dug out, the first silicon oxide layer, the first silicon nitride layer, the second silicon oxide layer, the second silicon nitride layer and part of the third silicon oxide layer still exist; therefore, the light transmittance of the light-transmitting area can still be increased by changing the refractive index and thickness of the film layer.
- the third oxide layer in the embodiments of Figures 7 and 8 is dug out to a certain thickness, so the thickness is less than the thickness of the third oxide layer in the embodiments of Figures 5 and 6; in this embodiment, the thickness of the third oxide layer can be 275-295nm.
- the overall thickness of the planarization layer or the organic insulating layer can be in the range of 7-8um; and the overall thickness of the base layer or the substrate can be in the range of 12-16um.
- FIG9 it is a schematic diagram of the structure of another embodiment of the display panel provided in the embodiment of the present application.
- FIG10 is a cross-sectional view of another embodiment of the display panel provided in the embodiment of the present application.
- the inorganic insulating layer is also a multi-layer structure; the silicon oxide layer at this time includes a first silicon oxide layer and a second silicon oxide layer, and the silicon nitride layer includes a first silicon nitride layer.
- the inorganic insulating layer at this time includes a first silicon oxide layer, a first silicon nitride layer, and a second silicon oxide layer stacked from bottom to top.
- a via hole is also formed in the light-transmitting area of the display panel.
- the bottom of the via hole is located above the second silicon oxide layer and is in contact with the upper surface of the second silicon oxide layer; the planarization layer also includes a portion filled in the via hole.
- the second interlayer dielectric layer, the third insulating layer, the first interlayer dielectric layer, the second insulating layer, and part of the first insulating layer located in the light-transmitting area are dug out. At this time, the bottom of the via hole is located inside the first insulating layer.
- the via depth in FIG. 9 and FIG. 10 is greater than the via depth in the embodiments of FIG. 7 and FIG. 8; in the embodiments of FIG. 7 and FIG. 8, not only the entire third silicon nitride layer and the entire third silicon oxide layer are dug out, but also the entire second silicon nitride layer and part of the second silicon oxide layer are dug out. Therefore, the film thickness of the second silicon oxide layer in FIG. 9 and FIG. 10 is less than the film thickness of the second silicon oxide layer in the embodiments of FIG. 7 and FIG. 8. In the structure shown in FIG.
- the second interlayer dielectric layer, the third insulating layer, the first interlayer dielectric layer, the second insulating layer and part of the first insulating layer located in the light-transmitting area are dug out at this time.
- the film thickness of the second silicon oxide layer in the embodiments of FIG. 9 and FIG. 10 ranges from 275 to 295 nm.
- FIG11 it is a schematic diagram of the structure of another embodiment of the display panel provided in an embodiment of the present application.
- FIG12 is a cross-sectional view of another embodiment of the display panel provided in an embodiment of the present application.
- the inorganic insulating layer is a single film layer structure, that is, the inorganic insulating layer includes only one film layer, which is a first silicon oxide layer.
- the refractive index of the inorganic insulating layer is less than the refractive index of the base layer 101.
- the refractive index of the inorganic insulating layer as a whole has nothing to do with the refractive index of the base layer; rather, the refractive index of the silicon oxide layer in the inorganic insulating layer is less than the refractive index of the silicon nitride layer.
- the inorganic insulating layer includes a first silicon oxide layer, and a via is also formed in the light-transmitting area of the display panel, and the bottom of the via is located on the upper surface of the first silicon oxide layer; and the planarization layer is filled in the via.
- the bottom of the via is located inside the multiple barrier layers 102.
- the embodiments of FIGS. 11 and 12 remove the first silicon nitride layer, the second silicon oxide layer, the second silicon nitride layer, the third silicon oxide, the third silicon nitride layer and part of the first silicon oxide layer.
- the thickness of the first silicon oxide layer is less than the thickness of the first silicon oxide layer in the aforementioned embodiments.
- the film thickness range of the first silicon oxide layer is: 280-295nm.
- the film thickness of the silicon oxide layer in the inorganic insulating layer satisfies: 929 (2k-1) ⁇ -955 (2k-1) ⁇ . It is just that when the hole-digging operation is performed, part of the silicon oxide layer located in the light-transmitting area is dug out, so the actual thickness of different silicon oxide layers may be different. The thickness of the silicon nitride layer is different and can be set according to the actual situation.
- the refractive index of the silicon nitride layer is greater than that of the silicon oxide layer.
- the refractive index of the inorganic insulating layer i.e., the first silicon oxide layer
- the refractive index of the planarization layer can be in the range of 1.45-1.65; the refractive index of the base layer can be in the range of 1.50-1.70.
- the refractive indices of the planarization layer and the base layer are usually controlled to be greater than 1.6.
- the base layer 101 and the planarization layer are both transparent film layers made of organic materials to improve the transmittance of light.
- silicon oxide layer and silicon nitride layer in this application is mainly based on the preparation material, while the gate insulation layer, planarization layer, etc. are divided according to the actual function. There is a certain overlap between the silicon oxide layer, silicon nitride layer and the insulation layer, interlayer dielectric layer and other functional layers in this application. And the openings in this application are all for the light-transmitting area in the camera area under the screen, and no opening operation is performed on the picture display area in the display panel.
- the above display panel embodiment only describes the above structure. It can be understood that, in addition to the above structure, the display panel of the embodiment of the present invention may also include any other necessary structures as needed, such as a cathode layer, a pixel definition layer, etc., which are not specifically limited here.
- the present application also provides a display device, which includes a display panel as described in any one of the above items; the specific structure of the display panel can refer to the above content and will not be repeated here.
- the above units or structures can be implemented as independent entities, or can be arbitrarily combined to be implemented as the same or several entities.
- the specific implementation of the above units or structures can refer to the previous method embodiments, which will not be repeated here.
- a display panel and a display device provided by an embodiment of the present invention are introduced in detail above. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of the present invention, there will be changes in the specific implementation methods and application scopes. In summary, the content of this specification should not be understood as limiting the present invention.
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Abstract
本申请提供一种显示面板及显示装置,通过设置折射率不同的膜层堆叠机构,以改善光线透过率,进而改善显示面板的成像效果。
Description
本发明涉及显示技术领域,具体涉及一种显示面板及显示装置。
随着人们在显示中对视觉体验的追求,需要尽可能的提升屏幕中显示区的屏占比,这就需要将屏幕上方的前置摄像头隐藏到屏下。对于前置摄像头来说,需要足够的进光量才能保证成像效果,因此对于显示面板来说摄像区域需要有足够高的透过率。
针对显示面板摄像头对应的区域处来说,光线在不同的膜层处容易发生干涉反射等问题,造成光线透过时,界面出现反射、干涉等现象,导致屏体透过率变低,影响摄像头的成像效果。
本发明实施例提供一种显示面板及显示装置,旨在解决现有技术下摄像头对应的显示面板区域光线透过率不高的问题。
为解决上述问题,第一方面,本申请提供一种显示面板,所述显示面板包括:
所述显示面板包括第一显示区和第二显示区,所述第一显示区的透光率大于所述第二显示区的透光率;
所述显示面板还包括:
衬底;
无机绝缘层,设置在所述衬底的一侧;
像素驱动电路,设置在所述无机绝缘层中,所述像素驱动电路包括多个设置在所述第一显示区或所述第二显示区中的第一像素驱动电路、和多个设置所述第二显示区中的第二像素驱动电路;
有机绝缘层,设置在所述无机绝缘层远离所述衬底的一侧;
发光层,设置在所述有机绝缘层远离所述衬底的一侧,所述发光层包括:多个设置在所述第一显示区的第一发光像素,和多个设置在所述第二显示区的第二发光像素,所述第一像素驱动电路与所述第一发光像素电连接,所述第二像素驱动电路与所述第二发光像素电连接;
其中,所述无机绝缘层包括第一无机绝缘子层,所述第一无机绝缘子层的折射率小于所述衬底的折射率,且小于所述有机绝缘层的折射率。
在一些可能的实施例中,所述无机绝缘层还包括:
第二无机绝缘子层,设置在所述第一无机绝缘子层和所述有机绝缘层之间,所述第二无机绝缘子层的折射率大于所述第一无机绝缘子层的折射率。
在一些可能的实施例中,所述第二无机绝缘子层的折射率大于所述衬底的折射率,且大于所述有机绝缘层的折射率。
在一些可能的实施例中,所述无机绝缘层还包括:
第三无机绝缘子层,设置在所述第二无机绝缘子层和所述有机绝缘层之间,所述第三无机绝缘子层的折射率小于所述衬底的折射率、所述第二无机绝缘子层的折射率、以及所述有机绝缘层的折射率。
在一些可能的实施例中,所述第三无机绝缘子层的厚度小于所述第一无机绝缘子层的厚度。
在一些可能的实施例中,所述无机绝缘层还包括:
第四无机绝缘子层,设置在所述第三无机绝缘子层和所述有机绝缘层之间,所述第四无机绝缘子层的折射率大于所述第一无机绝缘子层的折射率和所述第三无机绝缘子层的折射率。
在一些可能的实施例中,所述第四无机绝缘子层的折射率大于所述衬底的折射率,且大于所述有机绝缘层的折射率。
在一些可能的实施例中,所述第一无机绝缘子层与所述第三无机绝缘子层的折射率相同,所述第二无机绝缘子层的折射率与所述第四无机绝缘子层的折射率相同。
在一些可能的实施例中,所述无机绝缘子层还包括第五无机绝缘子层,所述第五无机绝缘子层设置在第四无机绝缘子层和有机绝缘层之间。
在一些可能的实施例中,所述无机绝缘子层包括:多个交替堆叠的低折射率无机绝缘子层和高折射率无机绝缘子层,其中所述低折射率无机绝缘子层靠近所述衬底设置,所述高折射率无机绝缘子层的折射率大于相邻的所述低折射率无机绝缘子层,
所述低折射率无机绝缘子层的厚度均满足以下公式:d=(2k-1)λ/(4n),
其中,所述k正整数,且所述k值沿所述有机绝缘层向所述衬底方向,根据所述低折射率无机绝缘子层的层数确定;λ为光线波长,n为折射率。
第二方面,本申请实施例还提供一种装置,所述显示设备包括所述显示装置包括传感器和显示面板,所述显示面板包括第一显示区和第二显示区,所述第一显示区的透光率大于所述第二显示区的透光率;
所述显示面板还包括:
衬底;
无机绝缘层,设置在所述衬底的一侧;
像素驱动电路,设置在所述无机绝缘层中,所述像素驱动电路包括多个设置在所述第一显示区或所述第二显示区中的第一像素驱动电路、和多个设置所述第二显示区中的第二像素驱动电路;
有机绝缘层,设置在所述无机绝缘层远离所述衬底的一侧;
发光层,设置在所述有机绝缘层远离所述衬底的一侧,所述发光层包括:多个设置在所述第一显示区的第一发光像素,和多个设置在所述第二显示区的第二发光像素,所述第一像素驱动电路与所述第一发光像素电连接,所述第二像素驱动电路与所述第二发光像素电连接;
其中,所述无机绝缘层包括第一无机绝缘子层,所述第一无机绝缘子层的折射率小于所述衬底的折射率,且小于所述有机绝缘层的折射率;
所述传感器与所述显示面板中的第一显示区对应设置。
在一些可能的实施例中,所述无机绝缘层还包括:
第二无机绝缘子层,设置在所述第一无机绝缘子层和所述有机绝缘层之间,所述第二无机绝缘子层的折射率大于所述第一无机绝缘子层的折射率。
在一些可能的实施例中,所述第二无机绝缘子层的折射率大于所述衬底的折射率,且大于所述有机绝缘层的折射率。
在一些可能的实施例中,所述无机绝缘层还包括:
第三无机绝缘子层,设置在所述第二无机绝缘子层和所述有机绝缘层之间,所述第三无机绝缘子层的折射率小于所述衬底的折射率、所述第二无机绝缘子层的折射率、以及所述有机绝缘层的折射率。
在一些可能的实施例中,所述第三无机绝缘子层的厚度小于所述第一无机绝缘子层的厚度。
在一些可能的实施例中,所述无机绝缘层还包括:
第四无机绝缘子层,设置在所述第三无机绝缘子层和所述有机绝缘层之间,所述第四无机绝缘子层的折射率大于所述第一无机绝缘子层的折射率和所述第三无机绝缘子层的折射率。
在一些可能的实施例中,所述第四无机绝缘子层的折射率大于所述衬底的折射率,且大于所述有机绝缘层的折射率。
在一些可能的实施例中,所述第一无机绝缘子层与所述第三无机绝缘子层的折射率相同,所述第二无机绝缘子层的折射率与所述第四无机绝缘子层的折射率相同。
在一些可能的实施例中,所述无机绝缘子层还包括第五无机绝缘子层,所述第五无机绝缘子层设置在第四无机绝缘子层和有机绝缘层之间。
在一些可能的实施例中,所述无机绝缘子层包括:多个交替堆叠的低折射率无机绝缘子层和高折射率无机绝缘子层,其中所述低折射率无机绝缘子层靠近所述衬底设置,所述高折射率无机绝缘子层的折射率大于相邻的所述低折射率无机绝缘子层,
所述低折射率无机绝缘子层的厚度均满足以下公式:d=(2k-1)λ/(4n),
其中,所述k正整数,且所述k值沿所述有机绝缘层向所述衬底方向,根据所述低折射率无机绝缘子层的层数确定;λ为光线波长,n为折射率。
本申请提供一种显示面板及显示装置,显示面板包括第一显示区和第二显示区,第一显示的透光率大于第二显示区,还包括层叠设置的衬底、无机绝缘层、有机绝缘层和发光层;无机绝缘层包括第一无机绝缘子层,第一无机绝缘子层的折射率小于衬底的折射率,且小于有机绝缘层的折射率。本申请通过设置折射率不同的膜层堆叠机构,以改善光线透过率,进而改善显示面板的成像效果。
为了更清楚地说明本发明实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为本申请实施例提供的显示面板一实施例截面图;
图2为本申请实施例提供的显示面板另一实施例结构示意图;
图3为本申请实施例提供的显示面板另一实施例结构示意图;
图4为本申请实施例提供的显示面板另一实施例结构示意图;
图5为本申请实施例提供的显示面板另一实施例结构示意图;
图6为本申请实施例提供的显示面板另一实施例结构示意图;
图7为本申请实施例提供的显示面板另一实施例结构示意图;
图8为本申请实施例提供的显示面板另一实施例截面图;
图9为本申请实施例提供的显示面板另一实施例结构示意图;
图10为本申请实施例提供的显示面板另一实施例截面图;
图11为本申请实施例提供的显示面板另一实施例结构示意图;
图12为本申请实施例提供的显示面板另一实施例截面图。
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
在本发明的描述中,需要理解的是,术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本发明和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本发明的限制。此外,术语“第一”、“第二”仅用于描述目的,而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。在本发明的描述中,“多个”的含义是两个或两个以上,除非另有明确具体的限定。
在本申请中,“示例性”一词用来表示“用作例子、例证或说明”。本申请中被描述为“示例性”的任何实施例不一定被解释为比其它实施例更优选或更具优势。为了使本领域任何技术人员能够实现和使用本发明,给出了以下描述。在以下描述中,为了解释的目的而列出了细节。应当明白的是,本领域普通技术人员可以认识到,在不使用这些特定细节的情况下也可以实现本发明。在其它实例中,不会对公知的结构和过程进行详细阐述,以避免不必要的细节使本发明的描述变得晦涩。因此,本发明并非旨在限于所示的实施例,而是与符合本申请所公开的原理和特征的最广范围相一致。
本发明实施例提供一种显示面板及显示装置。以下分别进行详细说明。
如图1所示,为本申请实施例提供的显示面板一实施例截面图。在图1中,显示面板包括第一显示区和第二显示区,第一显示区的透光率大于第二显示区。在一个具体实施例中,第一显示区和第二显示区可以对应显示面板中的屏下摄像区,屏下摄像区即屏下摄像头对应的区域,而屏下摄像区又分为透光区和遮光区。其中,遮光区主要是显示面板中的薄膜晶体管对应的区域即为第二显示区,透光区则无薄膜晶体管即为第一显示区;光线主要从透光区透过,以进入屏下摄像头中。本申请主要是增大透光区即第一显示区的光线透过率。
在图1中,显示面板还包括:衬底10、无机绝缘层20、像素驱动电路、有机绝缘层30和发光层40。其中,无机绝缘层20设置在衬底10的一侧;像素驱动电路设置在无机绝缘层20中,且像素驱动电路包括多个设置在第一显示区或第二显示区的第一像素驱动电路、和多个设置在第二显示区的第二像素驱动电路。有机绝缘层30则设置在无机绝缘层20远离衬底基板10的一侧;发光层40设置在有机绝缘层30远离衬底基板10的一侧,且发光层40包括多个设置在第一显示区的第一发光像素、和多个设置在第二显示区内的第二发光像素,第一像素驱动电路与第一发光像素电连接,第二像素驱动电路与第二发光像素电连接。
在上述实施例中,无机绝缘层20包括第一无机绝缘子层201,第一无机绝缘子层201的折射率小于衬底的折射率,且小于有机绝缘层的折射率。这样使得显示面板中堆叠设置的衬底10、无机绝缘层20和有机绝缘层30整体为每层折射率都不同的结构,通过低折射率与高折射率膜层彼此相邻搭配设计,利用低折射率膜层充当高折射率膜层的增透膜来提高光线透过率,有效提高屏下摄像区的屏体透过率。
在另一些实施例中,无机绝缘层20还可以包括第二无机绝缘子层202。如图2所示,为本申请实施例提供的显示面板另一实施例结构示意图。在图2中,第二无机绝缘子层202设置在第一无机绝缘子层201和有机绝缘层30之间,而第二无机绝缘子层202的折射率大于第一无机绝缘子层201的折射率。同时,第二无机绝缘子层202的折射率大于衬底10的折射率,也大于有机绝缘层30的折射率。
请继续参考图2,在图2中无机绝缘层20还可以包括第三无机绝缘子层203,第三无机绝缘子层203设置在第二无机绝缘子层202和有机绝缘层30之间。且第三无机绝缘子层203的折射率小于衬底10的折射率、也小于第二无机绝缘子层202的折射率、以及小于有机绝缘层30的折射率。
如图3所示,为本申请实施例提供的显示面板另一实施例结构示意图。在图3所示的实施例中,无机绝缘层20还包括:第四无机绝缘子层204,设置在第三无机绝缘子层203和有机绝缘层30之间。第四无机绝缘子层204的折射率大于第一无机绝缘子层201的折射率和第三无机绝缘子层203的折射率。且第四无机绝缘子层204的折射率大于衬底10的折射率,也大于有机绝缘层30的折射率。
请继续参考图3,在图3中无机绝缘层20还包括:第五无机绝缘子层205,第五无机绝缘子层205设置在第四无机绝缘子层204和有机绝缘层30之间。且第五无机绝缘子层205的折射率小于衬底10的折射率,也小于有机绝缘层30的折射率。第五无机绝缘子层205的折射率还小于第四绝缘子层204的折射率。
如图4所示,为本申请实施例提供的显示面板另一实施例结构示意图。在图4中,无机绝缘子层还可以包括第六无机绝缘层206,第六无机绝缘层206设置在第五无机绝缘子层205和有机绝缘层30之间。
在上述实施例中,第一无机绝缘子层201、第三无机绝缘子层203和第五无机绝缘子层的折射率可以处于相同的折射率范围内;在一个具体实施例中,三者的折射率可以相同。而第二无机绝缘子层202的折射率、第四无机绝缘子层204和第六绝缘子层206的折射率同样可以处于相同的折射率范围内;在一个具体实施例中,三者的折射率可以相同。在本申请中,第一无机绝缘子层201、第三无机绝缘子层203和第五无机绝缘子层可以为同种材料制成,例如均为氧化硅材料。第二无机绝缘子层202的折射率、第四无机绝缘子层204和第六无机绝缘层206可以为同种材料制成,例如均为氧化硅材料。
在上述实施例中,虽然不同无机绝缘子层的制备材料可以相同,但不同无机绝缘子层的厚度通常不同。具体地,第三无机绝缘子层的厚度通常小于第一无机绝缘子层的厚度。
需要说明的是,在本申请的实施例中,制备无机绝缘层20中的多个无机绝缘子层的过程中,实际上是利用显示面板中现有的功能膜层制备得到的,无需新增额外的制程即可实现,例如无机绝缘层即为显示面板中的栅极绝缘层、平坦化层等结构。以下结构显示面板的实际结构加以说明:
如图5所示,为本申请实施例提供的显示面板一实施例结构示意图。在图5中,显示面板还包括层叠设置的基底层101、多重阻挡层102、缓冲层103;以及设置在缓冲层103上方的有源层104、设置在有源层104上方且完全覆盖有源层104的第一绝缘层105,设置在第一绝缘层105上方的第一栅极层106,设置在第一栅极层106上方且完全覆盖第一栅极层106的第二绝缘层107,设置在第二绝缘层107上方的第二栅极层108。该显示面板还包括设置在第二栅极层108上方的第一层间介质层109;而第一层间介质层109上方还设置有氧化物半导体层100,氧化物半导体层100上方还形成有第三绝缘层110,第三绝缘层110完全覆盖氧化物半导体层100。第三绝缘层110上方与氧化物半导体层100对应的位置处还制备形成有第三栅极层120;第三栅极层120的上方形成有第二层间介质层130,第二层间介质层130完全覆盖第三栅极层120。在图5中,还形成有过孔以分别形成两个薄膜晶体管各自的源漏极层;而在两个源漏极层上方还形成有平坦化层140,平坦化层140完全覆盖源漏极层和第二层间介质层130,以使得显示面板的上表面平坦化。
如图6所示,为本申请实施例提供的显示面板另一实施例结构示意图。在图6所示的实施例中,显示面板包括层叠设置的基底层101、无机绝缘层和平坦化层140。图6所示的实施例是显示面板结构的简易示意图,以下结合图5和图6描述本申请的技术方案。
图5将图6所示的显示面板结构进行简化,得到包括层叠设置的基底层101、无机绝缘层和平坦化层140的显示面板;而基底层101等同于图1-4中的衬底10,平坦化层140类似与图1-4中的有机绝缘层,位于两者之间的即为无机绝缘层和设置在无机绝缘层之间的像素驱动电路。因此本申请中的无机绝缘层包括图1中的多层阻挡层20、缓冲层103、第一栅极层40…等多层结构。具体如下:
在本申请的一些实施例中,无机绝缘层可以为多膜层结构,且无机绝缘层具体可包括交叉堆叠设置的氮化硅层和氧化硅层。以图6所示的实施例为例,无机绝缘层可以包括:从下至上层叠设置的第一氧化硅层301、第一氮化硅层302、第二氧化硅层303、第二氮化硅层304、第三氧化硅层305和第三氮化硅层306;而第一氧化硅层设置在基底层101上方并与基底层101直接接触,平坦化层设置在第三氮化硅层306上方。此处堆叠设置的多个氧化硅层和氮化硅层,类似于图1-4中的多个无机绝缘子层。
图6所示的实施例,根据制备材料的不同将图5中基底层101和第一平坦化层之间的多个膜层结构,划分为交叉堆叠的多个氮化硅层和多个氧化硅层。具体地,以位于基底层101上方且与基底层101直接接触的多重阻挡层102为例,多重阻挡层102的制备材料通常为二氧化硅(SiO2)和氮化硅(SiNx),而位于多重阻挡层102上方的缓冲层103的制备材料也包括二氧化硅和氮化硅。且多重阻挡层102制备时,是将氮化硅制备在二氧化硅的上方;缓冲层103制备时则是将二氧化硅制备在氮化硅的上方。此时多重阻挡层102中的氮化硅和缓冲层103中的氮化硅直接接触,因此可以将多重阻挡层102中的氮化硅和缓冲层103中的氮化硅看做同一层结构,得到第一氮化硅层302;此时是根据膜层的制备材料重新对膜层进行划分。
由于本申请中的绝缘层、层间介质层等均是利用氧化硅和氮化硅材料制成的,因此可以对除有源层、栅极层、氧化物半导体层外的其他膜层进行二次划分,得到前述第一氧化硅层301、第一氮化硅层302、第二氧化硅层303、第二氮化硅层304、第三氧化硅层305和第三氮化硅层306。
对于图5和图6所示的实施例来说,第一氧化硅层301为实际上仅为多重阻挡层102的一部分,而第一氮化硅层则包括多重阻挡层102的一部分以及缓冲层103的一部分。即在本申请的实施例中,氧化硅层和氮化硅层均可以仅包括前述多重阻挡层102、缓冲层103、绝缘层、层间介质层等膜层结构的一部分,或是两个膜层各自的一部分重新组成氮化硅层或氧化硅层。而本申请主要通过改变氮化硅层和氧化硅层的各自的折射率和厚度,以调整透光区的光线透过率。
具体地,本申请中氮化硅层的折射率大于氧化硅层的折射率,而较低折射率的氧化硅层设置在较高折射率的氮化硅层上方,较低折射率的氧化硅层可以起到增透膜的作用,在减弱光线在穿过不同介质时的反射的同时,还可以通过干涉来增强光线的透过率。在图5所示的实施例中,第一氧化硅层设置在基底层上方,而氧化硅层(包括第一氧化硅层)的折射率小于基底层的折射率,这样设置就是较低折射率的膜层位于较高折射率的膜层的上方,可以增强光线的透过率。
对于第一氮化硅层302、第二氧化硅层303、第二氮化硅层304、第三氧化硅层305来说,在图5中,同样是较低折射率的氧化硅层位于较高折射率的氮化硅层的上方,不同的氧化硅层同样可以增大光线的透过率。而对于第三氮化硅层来说,第三氮化硅层的折射率大于平坦化层的折射率,同样可以提高光线的透过率。如下表所示,为图5所示的实施例中的膜层的折射率范围:
| 膜层 | 折射率 |
| 基底层 | 1.45-1.65 |
| 第一氧化硅层 | 1.38-1.48 |
| 第一氮化硅层 | 1.70-1.97 |
| 第二氧化硅层 | 1.38-1.48 |
| 第二氮化硅层 | 1.70-1.97 |
| 第三氧化硅层 | 1.38-1.48 |
| 第三氮化硅层 | 1.70-1.97 |
| 平坦化层 | 1.50-1.70 |
从上表可以看出,在本申请中,氧化硅层的折射率小于基底层的折射率,且即使氧化硅层包括第一氧化硅层、第二氧化硅层、第三氧化硅层等多个不同的氧化硅层,这些氧化硅层的折射率范围也是相同的。同理,对于氮化硅层来说,即使氮化硅层包括第一氮化硅层、第二氮化硅层、第三氮化硅层等多个不同的氮化硅层,这些氮化硅层的折射率范围也是相同的。
需要说明的是,对于基底层和氧化硅层来说,虽然两者对应的折射率范围存在一定的重叠,但在实际制备显示面板时,通常将基底层的折射率设置为大于氧化硅层的折射率;即第一无机绝缘子层、第三无机绝缘子层和第五绝缘子层的折射率大于小于衬底的折射率。例如,当氧化硅层(包括第一无机绝缘子层、第三无机绝缘子层和第五绝缘子层)的折射率设定为1.48时,衬底(即基底层)的折射率范围需要在1.48-1.65的范围内,而不是1.45-1.65的范围。上表中,比氧化硅层折射率更大的氮化硅层,可以包括:第二无机绝缘子层、第四无机绝缘子层和第六绝缘子层,氧化硅层和氮化硅层交替层叠设置,其中,氧化硅层更靠近基底层设置。
在调整不同膜层的折射率的同时,还需要对应调整不同膜层的厚度,结合折射率和厚度才能增大光线的透过率。具体地,无机绝缘子层包括:多个交替堆叠的低折射率无机绝缘子层(即氧化硅层)和高折射率无机绝缘子层(氮化硅层),且低折射率无机绝缘子层靠近衬底设置,高折射率无机绝缘子层的折射率大于相邻的低折射率无机绝缘子层的折射率。本申请中的低折射率无机绝缘子层(即氧化硅层)的膜厚度满足:d=(2k-1)λ/(4n);其中,所述k正整数,且所述k值沿所述有机绝缘层向所述衬底方向,根据低折射率的无机绝缘子层的层数确定(例如:本申请的上表中,氧化硅层包括第一无机绝缘子层、第三无机绝缘子层和第五绝缘子层,那么其中第五绝缘子层的k值为1,第三无机子层的k值为2,第一无机子层的k值为3);λ为光线波长,可以380~780nm ,n为每个无机绝缘子层的折射率大小。
在一个具体实施例中,λ取值可以为550nm;此时氧化硅层(包括第一无机绝缘子层、第三无机绝缘子层和第五绝缘子层)的膜厚度满足:
929(2k-1)Å-955(2k-1)Å,k为正整数,而Å为长度单位,1 Å为0.1nm。
但由于本申请中的氧化硅层和氮化硅层实际上可以为图1中的功能层的一部分,也可以为两个功能层的一部分组合得到。因此图5中不同的氧化硅层的膜厚均不同,不同的氮化硅层的膜厚也均不同。对于氧化硅层来说,虽然不同的氧化硅层膜厚均满足:929(2k-1)Å-955(2k-1)Å的膜厚范围,但不同氧化硅层的实际膜厚也是不同的。
以图5所示的显示面板为例,第一氧化硅层包括多重阻挡层102的一部分,第一氧化硅层的膜厚具体可以为650-695nm。第二氧化硅层可以包括缓冲层的一部分,以及第一绝缘层的一部分,第二氧化硅层的膜厚具体可以为465-495nm。第三氧化硅层可以包括第一层间介质层的一部分,第三绝缘层,以及第二层间介质层的一部分;第三氧化硅层的膜厚具体可以为275nm-295nm。
对于氮化硅层来说,第一氮化硅层包括多重阻挡层102的一部分,以及缓冲层103的一部分;第一氮化硅层的膜厚具体可以为0-100nm的厚度范围内。而第二氮化硅层可以包括第二绝缘层的一部分,以及第一层间介质层的一部分;第二氮化硅层的膜厚可以在0-280nm的厚度范围内。而第三氮化硅层可以包括第二层间介质层的一部分,第三氮化硅层的膜厚可以在0-200nm的范围内。而平坦化层或者说有机绝缘层的整体厚度可以在7-8um的范围内;而基底层或者说衬底的整体厚度可以为12-16um的范围内。
如图7所示,为本申请实施例提供的显示面板另一实施例结构示意图;而图8为本申请实施例提供的显示面板另一实施例截面图。请参考图7和图8,此时的显示面板同样包括基底层101和平坦化层,此时的无机绝缘层同样为多膜层结构包括多个氧化硅层和多个氮化硅层。但与图5所示的实施例不同的是,此时的无机绝缘层包括从下至上层叠设置的第一氧化硅层、第一氮化硅层、第二氧化硅层、第二氮化硅层和第三氧化硅层;第一氧化硅层同样设置在基底层上方且与基底层101直接接触。
在图7图8所示的实施例中,不存在第三氮化硅层,而是在图5图6所示的实施例的基础上,进行挖孔操作,挖除第三氮化硅层和部分第三氧化硅层,在透光区形成过孔;而过孔的底部位于第三氧化硅层上方且与第三氧化硅层的上表面贴合。对于图7图8所示的结构来说,挖除了位于透光区的第二层间介质层,以及部分第三绝缘层。此时过孔的底部位于第三绝缘层内部。在形成过孔后,还需要在对过孔进行填充以保证显示面板整体的安全性和平坦性。在本申请中,可以在过孔中填充平坦化层(即有机绝缘层)的材料,此时位于第三氧化硅层上方的平坦化层包括填充的过孔中的部分。
此时的平坦化层填充在过孔中。且由于挖除了第三氧化硅层和部分第三氧化硅层,因此图8中的第三氧化硅层的膜厚减小。具体地,图8中的第三氧化硅层的膜厚范围依旧在929(2k-1)Å-955(2k-1)Å的膜厚范围内,但具体可以为275nm-295nm。
在上述实施例中,虽然挖除了第三氮化硅层及部分第三氧化硅层,但仍存在有第一氧化硅层、第一氮化硅层、第二氧化硅层、第二氮化硅层和部分第三氧化硅层;因此仍可以通过改变膜层的折射率和厚度增大透光区的光线透过率。且需要说明的是,图7图8实施例中的第三氧化物层被挖除了一定的厚度,因此厚度小于图5图6实施例中的第三氧化物层的厚度;在此实施例中,第三氧化物层的厚度可以为275-295nm。而平坦化层或者说有机绝缘层的整体厚度可以在7-8um的范围内;而基底层或者说衬底的整体厚度可以为12-16um的范围内。
如图9所示,为本申请实施例提供的显示面板另一实施例结构示意图。图10为本申请实施例提供的显示面板另一实施例截面图。在图9图10所示的实施例中,无机绝缘层同样为多膜层结构;此时的氧化硅层包括第一氧化硅层和第二氧化硅层,氮化硅层包括第一氮化硅层。此时的无机绝缘层包括从下至上层叠设置的第一氧化硅层、第一氮化硅层和第二氧化硅层。
图9图10所示的实施例中,在显示面板的透光区同样形成有过孔,此时过孔的底部位于第二氧化硅层上方且与第二氧化硅层的上表面贴合;平坦化层同样包括填充在过孔中的部分。在图9图10所示的结构中,此时挖除了位于透光区的第二层间介质层、第三绝缘层、第一层间介质层、第二绝缘层以及部分第一绝缘层。此时过孔的底部位于第一绝缘层内部。
与图7图8实施例不同的是,图9图10中的过孔深度大于图7图8实施例中的过孔深度;图7图8中的实施例中不仅挖除了整个第三氮化硅层和整个第三氧化硅层,还挖除了整个第二氮化硅层和部分第二氧化硅层。因此图9图10中的第二氧化硅层的膜厚,小于图7图8实施例中的第二氧化硅层的膜厚。在图9所示的结构中,此时挖除了位于透光区的第二层间介质层、第三绝缘层、第一层间介质层、第二绝缘层以及部分第一绝缘层。具体地,图9图10实施例中的第二氧化硅层的膜厚范围为275-295nm。
如图11所示,为本申请实施例提供的显示面板另一实施例结构示意图。图12为本申请实施例提供的显示面板另一实施例截面图。在图11图12所示的实施例中,无机绝缘层为单膜层结构,即无机绝缘层仅包括一个膜层,为第一氧化硅层。此时无机绝缘层折射率小于基底层101的折射率。而当无机绝缘层包括交叠设置的氧化硅层和氮化硅层时,无机绝缘层整体的折射率大小与基底层的折射率大小并无关系;而是无机绝缘层中的氧化硅层的折射率小于氮化硅层的折射率。
在图11图12所示的实施例中,无机绝缘层包括第一氧化硅层,显示面板的透光区同样形成有过孔,且过孔的底部位于第一氧化硅层的上表面贴合;而平坦化层填充在过孔中。在图11所示的结构中,过孔的底部位于多重阻挡层102内部。与前述实施例不同的是,图11图12的实施例挖除了第一氮化硅层、第二氧化硅层、第二氮化硅层、第三氧化硅、第三氮化硅层和部分第一氧化硅层。在图11图12所示的实施例中,第一氧化硅层的厚度小于前述实施例中的第一氧化硅层的厚度。具体地,第一氧化硅层的膜厚范围为:280-295nm。
在上述实施例中,不论无机绝缘层为单膜层还是多膜层结构,无机绝缘层中的氧化硅层的膜厚度均满足:929(2k-1)Å-955(2k-1)Å。只是在进行挖孔操作时,挖除了位于透光区的部分氧化硅层,因此不同氧化硅层的实际厚度可能不同。而氮化硅层的厚度均不同,具体可以根据实际情况设定。
对于折射率来说,氮化硅层的折射率大于氧化硅层的折射率。而当无机绝缘层仅包括第一氧化硅层时,无机绝缘层(即第一氧化硅层)的折射率小于基底层101的折射率。而平坦化层的折射率可以1.45-1.65的范围内;基底层的折射率可以在1.50-1.70的范围的。在实际制备显示面板时,通常控制平坦化层和基底层的折射率均大于1.6。且本申请中的基底层101和平坦化层均为有机材料制成的透明膜层,以提高光线的透过率。
需要说明的是,本申请中的氧化硅层和氮化硅层的划分主要是根据制备材料划分的,而栅极绝缘层、平坦化层等则是根据实际的功能进行划分的。本申请中氧化硅层、氮化硅层和绝缘层、层间介质层等功能层之间存在一定的重叠。且本申请中的开孔都是针对屏下摄像区中的透光区来说的,并未对显示面板中的画面显示区等进行开孔操作。
需要说明的是,上述显示面板实施例中仅描述了上述结构,可以理解的是,除了上述结构之外,本发明实施例显示面板中,还可以根据需要包括任何其他的必要结构,例如阴极层、像素定义层等,具体此处不作限定。
本申请还提供一种显示装置,所述显示装置包括如上任一项所述的显示面板;显示面板的具体结构可以参考前述内容,此处不做赘述。
在上述实施例中,对各个实施例的描述都各有侧重,某个实施例中没有详述的部分,可以参见上文针对其他实施例的详细描述,此处不再赘述。
具体实施时,以上各个单元或结构可以作为独立的实体来实现,也可以进行任意组合,作为同一或若干个实体来实现,以上各个单元或结构的具体实施可参见前面的方法实施例,在此不再赘述。
以上对本发明实施例所提供的一种显示面板及显示装置进行了详细介绍,本文中应用了具体个例对本发明的原理及实施方式进行了阐述,以上实施例的说明只是用于帮助理解本发明的方法及其核心思想;同时,对于本领域的技术人员,依据本发明的思想,在具体实施方式及应用范围上均会有改变之处,综上所述,本说明书内容不应理解为对本发明的限制。
Claims (20)
- 一种显示面板,其中,所述显示面板包括第一显示区和第二显示区,所述第一显示区的透光率大于所述第二显示区的透光率;所述显示面板还包括:衬底;无机绝缘层,设置在所述衬底的一侧;像素驱动电路,设置在所述无机绝缘层中,所述像素驱动电路包括多个设置在所述第一显示区或所述第二显示区中的第一像素驱动电路、和多个设置所述第二显示区中的第二像素驱动电路;有机绝缘层,设置在所述无机绝缘层远离所述衬底的一侧;发光层,设置在所述有机绝缘层远离所述衬底的一侧,所述发光层包括:多个设置在所述第一显示区的第一发光像素,和多个设置在所述第二显示区的第二发光像素,所述第一像素驱动电路与所述第一发光像素电连接,所述第二像素驱动电路与所述第二发光像素电连接;其中,所述无机绝缘层包括第一无机绝缘子层,所述第一无机绝缘子层的折射率小于所述衬底的折射率,且小于所述有机绝缘层的折射率。
- 根据权利要求1所述的显示面板,其中,所述无机绝缘层还包括:第二无机绝缘子层,设置在所述第一无机绝缘子层和所述有机绝缘层之间,所述第二无机绝缘子层的折射率大于所述第一无机绝缘子层的折射率。
- 根据权利要求2所述的显示面板,其中,所述第二无机绝缘子层的折射率大于所述衬底的折射率,且大于所述有机绝缘层的折射率。
- 根据权利要求2所述的显示面板,其中,所述无机绝缘层还包括:第三无机绝缘子层,设置在所述第二无机绝缘子层和所述有机绝缘层之间,所述第三无机绝缘子层的折射率小于所述衬底的折射率、所述第二无机绝缘子层的折射率、以及所述有机绝缘层的折射率。
- 根据权利要求4所述的显示面板,其中,所述第三无机绝缘子层的厚度小于所述第一无机绝缘子层的厚度。
- 根据权利要求4所述的显示面板,其中,所述无机绝缘层还包括:第四无机绝缘子层,设置在所述第三无机绝缘子层和所述有机绝缘层之间,所述第四无机绝缘子层的折射率大于所述第一无机绝缘子层的折射率和所述第三无机绝缘子层的折射率。
- 根据权利要求6所述的显示面板,其中,所述第四无机绝缘子层的折射率大于所述衬底的折射率,且大于所述有机绝缘层的折射率。
- 根据权利要求6所述的显示面板,其中,所述第一无机绝缘子层与所述第三无机绝缘子层的折射率相同,所述第二无机绝缘子层的折射率与所述第四无机绝缘子层的折射率相同。
- 根据权利要求1所述的显示面板,其中,所述无机绝缘子层还包括第五无机绝缘子层,所述第五无机绝缘子层设置在第四无机绝缘子层和有机绝缘层之间。
- 根据权利要求1所述的显示面板,其中,所述无机绝缘子层包括:多个交替堆叠的低折射率无机绝缘子层和高折射率无机绝缘子层,其中所述低折射率无机绝缘子层靠近所述衬底设置,所述高折射率无机绝缘子层的折射率大于相邻的所述低折射率无机绝缘子层,所述低折射率无机绝缘子层的厚度均满足以下公式:d=(2k-1)λ/(4n),其中,所述k正整数,且所述k值沿所述有机绝缘层向所述衬底方向,根据所述低折射率无机绝缘子层的层数确定;λ为光线波长,n为折射率。
- 一种显示装置,其中,所述显示装置包括传感器和显示面板,所述显示面板包括第一显示区和第二显示区,所述第一显示区的透光率大于所述第二显示区的透光率;所述显示面板还包括:衬底;无机绝缘层,设置在所述衬底的一侧;像素驱动电路,设置在所述无机绝缘层中,所述像素驱动电路包括多个设置在所述第一显示区或所述第二显示区中的第一像素驱动电路、和多个设置所述第二显示区中的第二像素驱动电路;有机绝缘层,设置在所述无机绝缘层远离所述衬底的一侧;发光层,设置在所述有机绝缘层远离所述衬底的一侧,所述发光层包括:多个设置在所述第一显示区的第一发光像素,和多个设置在所述第二显示区的第二发光像素,所述第一像素驱动电路与所述第一发光像素电连接,所述第二像素驱动电路与所述第二发光像素电连接;其中,所述无机绝缘层包括第一无机绝缘子层,所述第一无机绝缘子层的折射率小于所述衬底的折射率,且小于所述有机绝缘层的折射率;所述传感器与所述显示面板中的第一显示区对应设置。
- 根据权利要求11所述的显示面板,其中,所述无机绝缘层还包括:第二无机绝缘子层,设置在所述第一无机绝缘子层和所述有机绝缘层之间,所述第二无机绝缘子层的折射率大于所述第一无机绝缘子层的折射率。
- 根据权利要求12所述的显示面板,其中,所述第二无机绝缘子层的折射率大于所述衬底的折射率,且大于所述有机绝缘层的折射率。
- 根据权利要求12所述的显示面板,其中,所述无机绝缘层还包括:第三无机绝缘子层,设置在所述第二无机绝缘子层和所述有机绝缘层之间,所述第三无机绝缘子层的折射率小于所述衬底的折射率、所述第二无机绝缘子层的折射率、以及所述有机绝缘层的折射率。
- 根据权利要求14所述的显示面板,其中,所述第三无机绝缘子层的厚度小于所述第一无机绝缘子层的厚度。
- 根据权利要求14所述的显示面板,其中,所述无机绝缘层还包括:第四无机绝缘子层,设置在所述第三无机绝缘子层和所述有机绝缘层之间,所述第四无机绝缘子层的折射率大于所述第一无机绝缘子层的折射率和所述第三无机绝缘子层的折射率。
- 根据权利要求16所述的显示面板,其中,所述第四无机绝缘子层的折射率大于所述衬底的折射率,且大于所述有机绝缘层的折射率。
- 根据权利要求16所述的显示面板,其中,所述第一无机绝缘子层与所述第三无机绝缘子层的折射率相同,所述第二无机绝缘子层的折射率与所述第四无机绝缘子层的折射率相同。
- 根据权利要求11所述的显示面板,其中,所述无机绝缘子层还包括第五无机绝缘子层,所述第五无机绝缘子层设置在第四无机绝缘子层和有机绝缘层之间。
- 根据权利要求11所述的显示面板,其中,所述无机绝缘子层包括:多个交替堆叠的低折射率无机绝缘子层和高折射率无机绝缘子层,其中所述低折射率无机绝缘子层靠近所述衬底设置,所述高折射率无机绝缘子层的折射率大于相邻的所述低折射率无机绝缘子层,所述低折射率无机绝缘子层的厚度均满足以下公式:d=(2k-1)λ/(4n),其中,所述k正整数,且所述k值沿所述有机绝缘层向所述衬底方向,根据所述低折射率无机绝缘子层的层数确定;λ为光线波长,n为折射率。
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| KR20230063964A (ko) * | 2021-11-01 | 2023-05-10 | 삼성디스플레이 주식회사 | 표시 장치 및 그 제조 방법 |
| KR20230131404A (ko) * | 2022-03-04 | 2023-09-13 | 삼성디스플레이 주식회사 | 표시 장치 |
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2023
- 2023-06-16 CN CN202310726360.9A patent/CN117460358A/zh active Pending
- 2023-07-19 WO PCT/CN2023/108132 patent/WO2024254938A1/zh not_active Ceased
- 2023-07-19 US US18/548,364 patent/US20250113687A1/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114256437A (zh) * | 2021-12-21 | 2022-03-29 | 合肥维信诺科技有限公司 | Oled显示面板及显示装置 |
| CN115425050A (zh) * | 2022-09-02 | 2022-12-02 | 武汉天马微电子有限公司 | 一种显示面板及显示装置 |
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| US20250113687A1 (en) | 2025-04-03 |
| CN117460358A (zh) | 2024-01-26 |
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