WO2024125166A1

WO2024125166A1 - Microled display device and manufacturing method therefor

Info

Publication number: WO2024125166A1
Application number: PCT/CN2023/130412
Authority: WO
Inventors: 胡双元; 庄永漳
Original assignee: 镭昱光电科技(苏州)有限公司
Priority date: 2022-12-14
Filing date: 2023-11-08
Publication date: 2024-06-20
Also published as: CN115881711A

Abstract

A MicroLED display device and a manufacturing method therefor, relating to the technical field of micro-display. The MicroLED display device uses a two-passivation process; side walls of LED units (200) are protected by means of a first passivation layer (400), thereby avoiding an increase in electrical leakage caused by the generation of a surface state of the side walls; then the first passivation layer (400) is directly used as a mask, holes (310) can be formed in a metal bonding layer (300) without additionally providing a mask, no mask removing process is required after metal etching, and the effect of a photoresist removal process on the metal bonding layer (300) does not need to be considered, so that a wider range of bonding metals can be selected; and after the holes (310) are formed, the side walls of the holes (310) are covered with a second passivation layer (500), so that a bonding metal exposed by the side walls can be covered to form electrical isolation for reducing electrical leakage, thereby ensuring the performance and reliability of the device.

Description

MicroLED display device and preparation method thereof

This application claims the priority of the Chinese patent application filed with the Chinese Patent Office on December 14, 2022, with application number CN202211608392.0 and invention name “MicroLED display device and preparation method thereof”, the entire contents of which are incorporated by reference in this application.

Technical Field

The present application belongs to the field of microdisplay technology, and specifically relates to a MicroLED display device and a method for preparing the same.

Background technique

For micro-display LEDs (MicroLEDs) used in the AR/VR field, the pixel density requirements are very high, and the general pixel size requirements are below 10um, or even below 5um. In order to obtain MicroLEDs with this pixel density, the general manufacturing process is implemented in a monolithic integration manner, that is, the entire epitaxial wafer is bonded to the CMOS driver by bonding (generally metal bonding), and then the pixelation process is performed. This method aligns the LED unit with the CMOS driver by photolithography, so the accuracy is extremely high. In order to maximize the high precision of this method, metal bonding is generally not patterned in advance. Therefore, in the subsequent pixelation process, the metal between the LED units needs to be etched for electrical isolation to achieve independent control of a single LED unit.

In the traditional MicroLED process, after etching, the mask needs to be removed before the subsequent process can be carried out. In the process of removing the mask, it is inevitable that the exposed bonding metal sidewalls will be affected and exposed to chemical substances, such as metal reacting with solution or gas, which will damage the overall structure and affect product performance and reliability.

technical problem

The embodiments of the present application provide a MicroLED display device and a method for preparing the same, aiming to overcome the technical problem that in the process of removing the mask in the existing MicroLED process, the exposed bonding metal sidewalls will inevitably be affected, resulting in damage to the overall structure and affecting product performance and reliability.

Technical Solutions

The method for preparing the MicroLED display device described in the embodiment of the present application includes:

Providing a driving substrate, a metal bonding layer and an LED unit, wherein the metal bonding layer is disposed on the driving substrate, and a plurality of LED units are arrayed on the metal bonding layer;

forming a first passivation layer, wherein the first passivation layer covers the LED unit;

Patterning the first passivation layer and using the first passivation layer as a mask to form a plurality of holes or grooves on the metal bonding layer, wherein the holes or grooves are located between adjacent LED units, and the bottoms of the holes or grooves expose the driving substrate;

forming a second passivation layer, wherein the second passivation layer covers the first passivation layer and fills the hole or the groove;

Etching the first passivation layer and the second passivation layer to at least expose the light emitting surface of the LED unit;

A transparent electrode layer is formed, wherein the transparent electrode layer covers the light emitting surface and is electrically connected to the LED unit.

In some embodiments, the LED unit includes a step structure formed by etching an LED epitaxial layer, the step structure includes a first doped semiconductor layer, a second doped semiconductor layer and an active layer located therebetween; the step structure at least disconnects and electrically isolates the second doped semiconductor layers of adjacent LED units from each other;

The light emitting surface is located on the second doped semiconductor layer.

In some embodiments, the active layer may be a multi-quantum well structure for confining electron and hole carriers to the quantum well region. When electrons and holes recombine, the carriers undergo radiative recombination and emit photons, converting electrical energy into light energy.

In some embodiments, the LED units are micro light emitting diodes.

In some embodiments, the first and second doped semiconductor layers may include one or more layers based on II-VI materials such as ZnSe or ZnO or III-V materials such as GaN, AlN, InN, InGaN, GaP, AlInGaP, AlGaAs and alloys thereof.

In some embodiments, the size of the LED unit is 0.1-5 microns, and the distance between adjacent LED units is 1-10 microns.

In some embodiments, providing a driving substrate, a metal bonding layer and an LED unit includes:

Providing an LED epitaxial layer, wherein the LED epitaxial layer is disposed on a substrate;

Forming the metal bonding layer on the driving substrate and/or the LED epitaxial layer, and bonding the driving substrate to the LED epitaxial layer;

removing the substrate;

Etching the LED epitaxial layer into the step structure;

The driving substrate includes a plurality of first contacts, and the first contacts are located between adjacent LED units.

In some embodiments, when a plurality of holes or grooves are formed on the metal bonding layer, the bottoms of the holes or grooves are exposed to expose the first contacts;

Etching the first passivation layer and the second passivation layer to expose the light emitting surface of the LED unit and the first contact;

The transparent electrode layer covers the light emitting surface and the holes or grooves to electrically connect the second doped semiconductor layer of the LED unit with the corresponding first contact point, so that the LED unit is driven alone through the first contact point.

removing the substrate;

Etching the LED epitaxial layer into the step structure;

The driving substrate includes a plurality of first contacts, wherein the first contacts are located below the LED unit, and the metal bonding layer electrically connects the first contacts and the first doped semiconductor layer.

In some embodiments, when a plurality of holes or grooves are formed on the metal bonding layer, the holes or grooves are spaced apart and electrically isolated from the metal bonding layers below the adjacent LED units;

Etching the first passivation layer and the second passivation layer to expose the light emitting surface of the LED unit;

The transparent electrode layer covers the light emitting surfaces of the adjacent LED units to electrically connect the second doped semiconductor layers of the adjacent LED units, so that the LED units are driven individually through the first contacts.

In some embodiments, forming the first passivation layer includes:

Atomic layer deposition and plasma chemical vapor deposition of dielectric materials are sequentially used to form a laminated dielectric layer, and the laminated dielectric layer is the first passivation layer.

In some embodiments, the atomic layer deposition and the plasma chemical vapor deposition are performed alternately multiple times to form the stacked dielectric layer.

In some embodiments, the material of the first passivation layer may be an inorganic dielectric material and/or an organic dielectric material; and/or the inorganic dielectric material is selected from one or more of SiO ₂ , Si ₃ N ₄ , and Al ₂ O ₃ .

In some embodiments, the hole groove is formed by a metal etching process;

When forming the hole groove, the thickness of the first passivation layer is reduced to 20-300 nm.

Accordingly, the MicroLED display device of the embodiment of the present application includes:

Driver substrate;

a metal bonding layer, the metal bonding layer being disposed on the driving substrate, the metal bonding layer being provided with a plurality of holes or grooves penetrating therethrough, the bottoms of the holes or grooves exposing the driving substrate;

LED units, a plurality of said LED units are arrayed on said metal bonding layer, and said holes or grooves are located between adjacent said LED units;

a first passivation layer, wherein the first passivation layer covers the LED unit and exposes the hole or the groove;

a second passivation layer, the second passivation layer covering the first passivation layer and filling the hole or the groove;

The first passivation layer and the second passivation layer at least expose the light emitting surface of the LED unit;

A transparent electrode layer covers the light emitting surface and is electrically connected to the LED unit.

The light emitting surface is located on the second doped semiconductor layer.

In some embodiments, the driving substrate includes a plurality of first contacts, and the first contacts are located between adjacent LED units.

In some embodiments, the bottom of the hole or groove exposes the first contact, the first passivation layer and the second passivation layer also expose the first contact, and the transparent electrode layer covers the light emitting surface and the hole or groove to electrically connect the second doped semiconductor layer of the LED unit with the corresponding first contact, so that the LED unit can be driven alone through the first contact.

In some embodiments, the driving substrate includes a plurality of first contacts, the first contacts are located below the LED unit, and the metal bonding layer electrically connects the first contacts and the first doped semiconductor layer.

In some embodiments, the holes or grooves separate and electrically isolate the metal bonding layers beneath adjacent LED units;

In some embodiments, the first passivation layer is: a laminated dielectric layer formed by atomic layer deposition and plasma chemical vapor deposition in sequence.

In some embodiments, the first passivation layer is a laminated dielectric layer formed by alternating multiple atomic layer depositions and plasma chemical vapor depositions.

In some embodiments, the thickness of the first passivation layer is 20-300 mm.

Beneficial Effects

Compared with the prior art, the preparation method of the MicroLED display device of the embodiment of the present application includes: providing a driving substrate, a metal bonding layer and an LED unit, the metal bonding layer is arranged on the driving substrate, and a plurality of LED units are arrayed on the metal bonding layer; forming a first passivation layer, the first passivation layer covers the LED unit; patterning the first passivation layer and using the first passivation layer as a mask, forming a plurality of holes or grooves on the metal bonding layer, the holes or grooves are located between adjacent LED units, and the bottoms of the holes or grooves expose the driving substrate; forming a second passivation layer, the second passivation layer covers the first passivation layer and fills the holes or grooves; etching the first passivation layer and the second passivation layer to expose at least the light emitting surface of the LED unit; forming a transparent electrode layer, the transparent electrode layer covers the light emitting surface, and is electrically connected to the LED unit. The present application adopts a double passivation process, and the side walls of the LED unit are protected by the first passivation layer to prevent the side walls from generating surface states and causing increased leakage. Then, the first passivation layer is directly used as a mask, and a hole groove can be formed in the metal bonding layer without setting up an additional mask. After metal etching, there is no need to remove the mask, and there is no need to consider the impact of the degumming process on the metal bonding layer. Therefore, the range of bonding metal options is wider. After the hole groove is formed, the second passivation layer is used to cover the side walls of the hole groove, so that the bonding metal exposed on the side wall can be covered to form electrical isolation, reduce leakage, and thus ensure device performance and reliability.

Compared with the prior art, the MicroLED display device of the embodiment of the present application includes: a driving substrate; a metal bonding layer, the metal bonding layer is arranged on the driving substrate, and the metal bonding layer is provided with a plurality of holes or grooves through the driving substrate, and the bottom of the holes or grooves exposes the driving substrate; an LED unit, a plurality of LED units are arranged in an array on the metal bonding layer, and the holes or grooves are located between adjacent LED units; a first passivation layer, the first passivation layer covers the LED unit and exposes the light-emitting surface and the holes or grooves of the LED unit; a second passivation layer, the second passivation layer covers the first passivation layer and fills the holes or grooves; a transparent electrode layer, the transparent electrode layer covers the light-emitting surface and is electrically connected to the LED unit. The display device protects the side wall of the LED unit through the first passivation layer, and protects the bonding metal through the second passivation layer, so that it will not be affected by the process, reduce leakage, and thus ensure the performance and reliability of the device.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1 is a top view of a MicroLED display device in a first embodiment of the present application;

FIG2 is a schematic diagram of a cross section of a MicroLED display device along line A-A in the first embodiment of the present application;

3 is a cross-sectional schematic diagram of a driving substrate and an LED epitaxial layer in the first embodiment of the present application;

FIG4 is a cross-sectional schematic diagram of forming a metal bonding layer in the first embodiment of the present application;

FIG5 is a cross-sectional schematic diagram of the bonding process in the first embodiment of the present application;

FIG6 is a cross-sectional schematic diagram of an LED unit formed in the first embodiment of the present application;

FIG7 is a schematic top view of an LED unit formed in the first embodiment of the present application;

FIG8 is a cross-sectional schematic diagram of forming a first passivation layer in the first embodiment of the present application;

FIG9 is a schematic top view of forming a first passivation layer in the first embodiment of the present application;

10 is a cross-sectional schematic diagram of patterning the first passivation layer to form a mask in the first embodiment of the present application;

FIG11 is a schematic top view of the state shown in FIG8 to the state shown in FIG10;

FIG12 is a cross-sectional schematic diagram of forming a hole groove in the metal bonding layer in the first embodiment of the present application;

FIG13 is a schematic top view from the state shown in FIG10 to the state shown in FIG12;

FIG14 is a cross-sectional schematic diagram of forming a second passivation layer in the first embodiment of the present application;

FIG15 is a schematic top view from the state shown in FIG12 to the state shown in FIG14;

16 is a cross-sectional schematic diagram of the first embodiment of the present application after etching the first passivation layer and the second passivation layer;

FIG17 is a schematic top view from the state shown in FIG14 to the state shown in FIG16;

FIG18 is a schematic top view of the state from FIG16 to FIG1;

FIG19 is a cross-sectional schematic diagram of a MicroLED display device in a second embodiment of the present application;

20 is a cross-sectional schematic diagram of patterning the first passivation layer to form a mask in the second embodiment of the present application;

21 is a schematic top view of patterning the first passivation layer to form a mask in the second embodiment of the present application;

FIG22 is a cross-sectional schematic diagram of forming a hole groove in a metal bonding layer in the second embodiment of the present application;

FIG23 is a schematic top view from the state shown in FIG20 to the state shown in FIG22;

FIG24 is a cross-sectional schematic diagram of forming a second passivation layer in the second embodiment of the present application;

FIG25 is a cross-sectional schematic diagram of etching the first passivation layer and the second passivation layer in the second embodiment of the present application;

FIG26 is a schematic top view from the state shown in FIG24 to the state shown in FIG25;

Figure numerals: 10-driving substrate; 100-first contact; 20-LED epitaxial layer; 200-LED unit; 210-first doped semiconductor layer; 220-active layer; 230-second doped semiconductor layer; 201-light emitting surface; 30-substrate; 300-metal bonding layer; 310-hole or groove; 400-first passivation layer; 410-first through hole; 500-second passivation layer; 510-second through hole; 520-third through hole; 600-transparent electrode layer.

Embodiments of the present invention

The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

In the description of the present application, it should be understood and specifically stated that in the description of the present application, the terms "on", "over", "above", and "over" should be interpreted in the broadest sense, meaning that the description containing these terms is interpreted as "a component may be set on another component in direct contact, or there may be intermediate components or layers between the components."

In addition, for ease of description, the present application may also use spatially relative terms such as "under", "beneath", "under", "on", "above", "above", "lower", "upper", etc. to describe the relationship of one element or component to another element or component shown in the drawings. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90° or at other orientations), and the spatially relative descriptors used in the present application should be interpreted accordingly.

The term "layer" as used in this application refers to a material portion including an area with a certain thickness. The layer can extend over the entire lower or upper structure, or can extend over a local range of the lower or upper structure. In addition, a layer can be an area of a homogeneous or inhomogeneous continuous structure, whose thickness is less than the thickness of the continuous structure. For example, a layer can be located between the top surface and the bottom surface of the continuous structure or between any pair of horizontal planes therebetween. The layer can extend horizontally, vertically and/or along a tapered surface. A layer can include multiple layers. For example, a semiconductor layer can include one or more doped or undoped semiconductor layers, and can have the same or different materials.

In the description of the present application, the "micro" LED and "micro" device used refer to the descriptive size of certain devices or structures according to the embodiments of the present application. The term "micro" device or structure used herein is intended to represent a scale of 100 nanometers to 100 microns. However, it should be understood that the embodiments of the present application are not necessarily limited to this, and certain aspects of the embodiments can be applicable to larger and possibly smaller size scales.

The applicant noted that in the traditional MicroLED process, photoresist or dielectric layer is generally used as a mask, and reactive ion etching (RIE), inductively coupled plasma (ICP) etching or ion beam etching (IBE) are used to etch metal. Because the bonding metal is generally composed of multiple layers of materials, the preferred etching method is to use a method in which the etching rates of each layer of metal are not much different, among which IBE is used more. In these etching processes, the semiconductor material is generally etched first, and then the metal isolation etching is completed. After the etching is completed, it is generally necessary to remove the mask and then deposit the dielectric layer to passivate the semiconductor sidewalls and wrap the etched metal sidewalls to form electrical isolation. Commonly used debonding solutions will react with certain metals. Therefore, the metal bonding layer will be affected during the mask removal process, narrowing the selection range of bonding metals and not conducive to obtaining optimal performance. The use of oxygen plasma debonding will also cause the bonding metal to react with oxygen, causing certain changes in its performance.

In view of this, the embodiments of the present application provide a MicroLED display device and a method for manufacturing the same to overcome at least one of the above-mentioned defects.

The embodiments of the present application describe a MicroLED display device and a method for preparing the device. The MicroLED display device of the present application uses Micro-LED (Micro light-emitting diode, micro light-emitting diode structure), and the size of the micro light-emitting diode is reduced to 100 nanometers to 100 microns. In Micro-LED, the Micro-LED array is highly integrated, and the distance between the LED units of the Micro-LED in the array is further reduced to the order of 5 microns. The display method of Micro-LED is to connect Micro-LEDs of 5 microns or even smaller sizes to a driving substrate to achieve precise control of the brightness of each Micro-LED. The preparation method of the embodiment of the present application is applicable to the Micro-LED structure and realizes the preparation of a micro-sized MicroLED display device.

Specifically, referring to FIG. 1 , FIG. 2 and FIG. 19 , the MicroLED display device of the embodiment of the present application includes a driving substrate 10, a metal bonding layer 300, an LED unit 200, a first passivation layer 400, a second passivation layer 500 and a transparent electrode layer 600. The metal bonding layer 300 is provided on the driving substrate 10, and the metal bonding layer 300 is provided with a plurality of holes or grooves through it, and the bottom of the holes or grooves exposes the driving substrate 10; a plurality of LED units 200 are arranged in an array on the metal bonding layer 300, and the holes or grooves are located between adjacent LED units 200; the first passivation layer 400 covers the LED unit 200 and exposes the light emitting surface 201 and the holes or grooves of the LED unit 200; the second passivation layer 500 covers the first passivation layer 400 and fills the holes or grooves; the transparent electrode layer 600 covers the light emitting surface 201 and is electrically connected to the LED unit 200.

It can be understood that the MicroLED display device protects the side wall of the LED unit 200 through the first passivation layer 400 and protects the metal bonding layer 300 through the second passivation layer 500, so that it will not be affected by the process, reduce leakage, and thus ensure device performance and reliability.

In some embodiments, the drive substrate 10 may include semiconductor materials such as silicon, silicon carbide, home nitride, germanium, gallium arsenide, cobalt phosphide. In some embodiments, the drive substrate 10 may be made of a non-conductive material, such as glass, plastic, or a sapphire wafer. In some embodiments, the drive substrate 10 may have a drive circuit formed therein, and the drive substrate 10 may be a CMOS (Complementary Metal Oxide Semiconductor) backplane or a TFT glass substrate. The drive circuit provides an electrical signal to the LED unit 200 to control the brightness. In some embodiments, the drive circuit may include an active matrix drive circuit, wherein each individual LED unit 200 corresponds to an independent driver.

In some embodiments, the LED unit 200 includes a step structure formed by etching the LED epitaxial layer 20, the step structure includes a first doped semiconductor layer 210, a second doped semiconductor layer 230 and an active layer 220 located therebetween; the step structure at least disconnects and electrically isolates the second doped semiconductor layers 230 of adjacent LED units 200 from each other; the light emitting surface 201 is located on the second doped semiconductor layer 230, and specifically the light emitting surface 201 may be located at the top of the step structure.

Please refer to Figures 6 and 20 , the first doped semiconductor layer 210 is disposed on the metal bonding layer 300 , the active layer 220 is disposed on the side of the first doped semiconductor layer 210 away from the metal bonding layer 300 , and the second doped semiconductor layer 230 is disposed on the side of the active layer 220 away from the first doped semiconductor layer 210 .

In some embodiments, the driving substrate 10 includes a plurality of first contacts 100 , and the first contacts 100 are located between adjacent LED units 200 .

In some embodiments, the hole or groove is specifically a hole 310, the bottom of the hole 310 exposes the first contact 100, and the transparent electrode layer 600 covers the light emitting surface 201 and the hole 310 to electrically connect the second doped semiconductor layer 230 of the LED unit 200 with the corresponding first contact 100, so that the LED unit 200 can be driven alone through the first contact 100.

In some embodiments, the first doped semiconductor layers 210 of adjacent LED units 200 are disconnected and electrically isolated from each other; the first contact 100 is located below the LED unit 200 , and the metal bonding layer 300 electrically connects the first contact 100 and the first doped semiconductor layer 210 .

In some embodiments, the hole or groove is specifically a groove 310, which separates and electrically isolates the metal bonding layer 300 under adjacent LED units 200; the transparent electrode layer 600 covers the light emitting surface 201 of adjacent LED units 200 and the common contact of the driving substrate 10 to electrically connect the second doped semiconductor layer 230 of the adjacent LED units 200, so that the LED units 200 can be driven individually through the first contacts 100.

Specifically, please refer to FIG. 1 and FIG. 2 again. In the first embodiment of the present application, the driving substrate 10 includes a plurality of first contacts 100 , the plurality of first contacts 100 are arranged in an array, and the first contacts 100 are located between adjacent LED units 200 .

The metal bonding layer 300 is disposed on the driving substrate 10, and is used to bond the LED epitaxial layer 20 to the driving substrate 10, and is used to electrically connect the first doped semiconductor layer 210 of each LED unit 200. The bonding metal of the metal bonding layer 300 includes Au, Sn, In, Cu or Ti.

Please refer to FIG. 12 and FIG. 13 , a plurality of holes 310 are provided through the metal bonding layer 300, the plurality of holes 310 are arranged in an array, and the holes 310 are located between adjacent LED units 200 and are arranged relative to the first contacts 100, and the bottom of the holes 310 exposes the driving substrate 10 and the corresponding first contacts 100. In the first embodiment, the holes 310 may be circular holes, and the metal bonding layer 300 is penetrated at the holes 310 to expose the side walls.

A plurality of LED units 200 are arrayed on the metal bonding layer 300 to be connected to the driving substrate 10 as a whole through the metal bonding layer 300 , and the first doped semiconductor layers 210 of the LED units 200 are electrically connected to each other through the metal bonding layer 300 .

The first passivation layer 400 covers the LED unit 200 and exposes the light emitting surface 201 and the hole 310 of the LED unit 200. That is, the first passivation layer 400 at least covers the side wall of the LED unit 200 to protect the side wall of the LED unit 200 and prevent it from forming a surface state during the preparation process.

The second passivation layer 500 covers the first passivation layer 400 and the sidewalls of the hole 310 to protect the sidewalls formed by etching the metal bonding layer 300 and prevent the overall structure from being damaged, thereby ensuring the performance and stability of the product.

The transparent electrode layer 600 covers the light emitting surface 201 and the holes or grooves to electrically connect the LED unit 200 and the corresponding first contacts 100 of the driving substrate 10 , so that the LED unit 200 is driven alone through the first contacts 100 .

Specifically, please refer to Figure 19. In the second embodiment of the present application, the driving substrate 10 includes a plurality of first contacts 100, and the plurality of first contacts 100 are arranged in an array, and the first contacts 100 are located below the LED unit 200 and are arranged opposite to the LED unit 200; in addition, the driving substrate 10 may further include a common contact (not shown in the figure), and the common contact is arranged near the edge of the driving substrate 10.

The metal bonding layer 300 is disposed on the driving substrate 10, and is used to bond the LED epitaxial layer 20 to the driving substrate 10, and is used to electrically connect the first doped semiconductor layer 210 of the LED unit 200 and the first contact 100. The bonding metal of the metal bonding layer 300 includes Au, Sn, In, Cu or Ti.

Please refer to FIG. 22 and FIG. 23 , a groove 310 is provided through the metal bonding layer 300, and a plurality of grooves 310 may be provided, and the plurality of grooves 310 are arranged in an array and spaced between adjacent LED units 200, and the bottom of the groove 310 exposes the driving substrate 10, and the groove 310 may also be a through groove. In the second embodiment, the groove 310 is a groove that penetrates the metal bonding layer 300 in the thickness direction, and the groove 310 forms a gap on the metal bonding layer 300, dividing the metal bonding layer 300 into a plurality of metal bonding parts arranged in an array, and the metal bonding parts are arranged one by one under the LED unit 200, and adjacent metal bonding parts are spaced by the groove 310.

In the second embodiment, a plurality of LED units 200 are arranged in an array on a metal bonding layer 300 so as to be connected as a whole with a driving substrate 10 through the metal bonding layer 300. The first doped semiconductor layer 210 of each LED unit 200 is electrically connected to the first contact 100 through a metal bonding portion separated by the metal bonding layer 300.

The first passivation layer 400 covers the LED unit 200 and exposes the light emitting surface 201 and the groove 310 of the LED unit 200. That is, the first passivation layer 400 at least covers the side wall of the LED unit 200 to protect the side wall of the LED unit 200 and prevent it from forming a surface state during the preparation process.

The second passivation layer 500 covers the first passivation layer 400 and the sidewalls of the groove 310 to protect the sidewalls formed by etching the metal bonding layer 300 and prevent the overall structure from being damaged, thereby ensuring the performance and stability of the product.

The transparent electrode layer 600 covers the light emitting surface 201 of each LED unit to electrically connect the second doped semiconductor layer 230 of each LED unit 200, and can electrically connect the second doped semiconductor layer 230 to the common contact of the driving substrate 10 so that the LED unit 200 can be driven individually through the first contact 100.

In some embodiments, the first passivation layer 400 is a laminated dielectric layer formed by sequentially using atomic layer deposition and plasma chemical vapor deposition.

Specifically, the material of the first passivation layer 400 can be selected from inorganic dielectric materials such as SiO ₂ , Si ₃ N ₄ , Al ₂ O ₃ , or other feasible organic dielectric materials. Because the dielectric material will also be etched by the ion beam at the same time, the thickness of the dielectric material should be greater than the thickness etched in the etching process. After the etching is completed, the thickness of the dielectric layer, that is, the thickness of the first passivation layer 400, is preferably 20-300 nm. In this embodiment, the dielectric layer formed by atomic layer deposition (ALD) has a very high density and is not easily etched, which can form a better passivation effect on the side wall of the LED unit 200, and the use of plasma chemical vapor deposition (PECVD) can thicken the dielectric layer. The laminated dielectric layer formed can make the dielectric layer that is finally left stop etching on the ALD dielectric layer, so that the consistency of the product is greatly improved, and the thickness requirement of the first passivation layer 400 is met.

Furthermore, in some embodiments, the first passivation layer 400 is a laminated dielectric layer formed by alternately performing multiple atomic layer depositions and plasma chemical vapor depositions. For example, the deposition process of ALD/PECVD/ALD/PECVD can be alternately performed to form the first passivation layer 400 that meets the requirements.

Accordingly, the embodiment of the present application also provides a method for preparing a MicroLED display device, the characteristics of which include:

A driving substrate 10, a metal bonding layer 300 and an LED unit 200 are provided, wherein the metal bonding layer 300 is disposed on the driving substrate 10, and a plurality of LED units 200 are arranged in an array on the metal bonding layer 300;

forming a first passivation layer 400 , wherein the first passivation layer 400 covers the LED unit 200 ;

The first passivation layer 400 is patterned and the first passivation layer 400 is used as a mask to form a plurality of holes or grooves on the metal bonding layer 300, wherein the holes or grooves are located between adjacent LED units 200, and the bottoms of the holes or grooves expose the driving substrate 10;

forming a second passivation layer 500, wherein the second passivation layer 500 covers the first passivation layer 400 and the sidewalls of the hole or the groove;

Etching the first passivation layer 400 and the second passivation layer 500 to at least expose the light emitting surface 201 of the LED unit 200;

A transparent electrode layer 600 is formed, and the transparent electrode layer 600 covers the light emitting surface 201 and is electrically connected to the LED unit 200 .

It can be understood that the preparation method adopts a double passivation process, and the side wall of the LED unit 200 is protected by the first passivation layer 400 to prevent it from generating surface states and causing increased leakage; then the first passivation layer 400 is directly used as a mask, and a hole or groove can be formed in the metal bonding layer 300 without setting up an additional mask. After metal etching, there is no need to remove the mask, and there is no need to consider the impact of the degumming process on the metal bonding layer 300, so the range of bonding metal options is wider; after the hole or groove is formed, the second passivation layer 500 is used to cover the side wall of the hole or groove, so that the bonding metal exposed on the side wall can be covered to form electrical isolation, reduce leakage, and thus ensure device performance and reliability.

Specifically, the LED unit 200 includes a step structure formed by etching the LED epitaxial layer 20, the step structure includes a first doped semiconductor layer 210, a second doped semiconductor layer 230 and an active layer 220 located therebetween; the step structure at least disconnects and electrically isolates the second doped semiconductor layers 230 of adjacent LED units 200 from each other; the light emitting surface 201 is located on the second doped semiconductor layer 230, and specifically the light emitting surface 201 is located at the top of the step structure.

In the first embodiment, please refer to Figure 3, a driving substrate 10, a metal bonding layer 300 and an LED unit 200 are provided, including: providing an LED epitaxial layer 20, and the LED epitaxial layer 20 is arranged on a substrate 30; wherein the substrate 30 is a semiconductor material, such as silicon, GaN, SiC, etc., or the substrate 30 is a non-conductive material, such as sapphire or glass; the LED epitaxial layer generally includes an N-type doped layer, a P-type doped layer, and a multi-quantum well layer.

Please refer to FIG. 4 , a metal bonding layer 300 is formed on the driving substrate 10 and the LED epitaxial layer 20 respectively, and the driving substrate 10 is bonded to the LED epitaxial layer 20 to expose the substrate 30 .

Referring to FIG. 5 , the substrate 30 of the bonded wafer may be removed by a dry method or a wet method.

Please refer to Figures 6 and 7. The LED epitaxial layer 20 can be etched by a dry method or a wet method to form a step structure, that is, a plurality of LED units 200 arranged in an array are etched out, and the LED units 200 are arranged in an array on the metal bonding layer 300, so that the first doped semiconductor layers 210 of adjacent LED units 200 are electrically connected to each other through the metal bonding layer 300; wherein the first contact 100 of the driving substrate 10 is located between adjacent LED units 200.

Further, referring to Figures 8 and 9, an inorganic or organic dielectric material is used to perform a first passivation on the side wall of the LED unit 200 to form a first passivation layer 400. At this time, the thickness of the first passivation layer 400 is greater than the thickness of the first passivation layer 400 after etching the metal bonding layer 300. In order to match the subsequent metal etching process, the material and thickness of the first passivation layer 400 can be designed.

Specifically, the material of the first passivation layer 400 can be selected from inorganic dielectric materials such as SiO ₂ , Si ₃ N ₄ , Al ₂ O ₃ , or other feasible organic dielectric materials, for example, polyimide, SU-8 photoresist or other photopatternable polymers. Conventional methods for depositing dielectric layers include plasma chemical vapor deposition (PECVD) and atomic layer deposition (ALD). The dielectric layer deposited by ALD has very high density and is not easy to be etched. Therefore, the material for the first passivation can adopt a multi-layer dielectric layer structure, such as first depositing a dielectric layer by ALD (the dielectric layer deposited by ALD has a better passivation effect on the semiconductor sidewall), and then depositing a thickened dielectric layer by PECVD. Of course, several pairs of dielectric layers can also be used as the first passivation layer, such as ALD/PECVD/ALD/PECVD, etc. Because the etching rate of the ALD dielectric layer is slow, the dielectric layer that is finally left can be stopped at the ALD dielectric layer through the design of the laminated dielectric layer, which greatly improves the consistency of the product.

10 and 11 , the first passivation layer 400 is patterned to form a plurality of first through holes 410 penetrating the first passivation layer 400 and arranged in an array. The first through holes 410 are disposed above the first contacts 100 .

Referring to FIG. 12 and FIG. 13 , the first passivation layer 400 is used as a mask to etch the metal bonding layer 300 through the surface dielectric layer of the drive substrate 10 to form an array of holes 310, and the bottom of the holes 310 exposes the first contact 100. The metal etching process can be conventional ion beam etching, or inductively coupled plasma etching and reactive ion etching. In the process of forming the holes 310, the thickness of the first passivation layer 400 is reduced to 20-300 nm.

Please refer to Figures 14 and 15. After the metal bonding layer 300 is etched, there is no need to remove the mask process, and the second passivation is directly performed. An inorganic or organic dielectric material is used to cover the exposed bonding metal sidewalls of the hole 310 to form a second passivation layer 500. The sidewalls of the hole 310 are electrically isolated to prevent short circuits in subsequent metal routings, etc. At the same time, the metal with high reaction activity is protected to improve the compatibility of subsequent processes.

Please refer to Figures 16 and 17, the dielectric layer above the step structure and the first contact 100 of the driving substrate 10 is etched, that is, the first passivation layer 400 and the second passivation layer 500 are etched to form a second through hole 510 and a third through hole 520, so that the second through hole 510 exposes the first contact 100, and the third through hole 520 exposes the light emitting surface 201 of the LED unit 200.

2 and 18 , a transparent electrode layer 600 is deposited, and the transparent electrode layer 600 covers the light emitting surface 201 and the hole 310 to electrically connect the second doped semiconductor layer 230 of the LED unit 200 with the corresponding first contact 100, so that the LED unit 200 is driven alone through the first contact 100. The transparent electrode layer 600 is made of a transparent material, such as ITO.

Please refer to Figure 19. Different from the first embodiment, in the second embodiment, the first contact 100 of the driving substrate 10 is provided below the LED unit 200, and the first contact 100 is electrically connected to the first doped semiconductor layer 210 of the LED unit 200 through the metal bonding layer 300.

The side wall of the LED unit 200 is passivated for the first time using an inorganic or organic dielectric material to form a first passivation layer 400. At this time, the thickness of the first passivation layer 400 is greater than the thickness of the first passivation layer 400 after etching the metal bonding layer 300. In order to match the subsequent metal etching process, the material and thickness of the first passivation layer 400 can be designed.

Further, referring to Figures 20 and 21, the first passivation layer 400 is patterned to form a plurality of first through holes 410 that penetrate the first passivation layer 400 and are arranged in an array. In the second embodiment, the first through holes 410 are through-groove structures that space the first passivation layer 400 covering adjacent LED units 200.

Please refer to FIG. 22 and FIG. 23 . With the first passivation layer 400 as a mask, the metal bonding layer 300 is etched through to the surface dielectric layer of the driving substrate 10 to form an array of grooves 310. Conventional ion beam etching, inductively coupled plasma etching and reactive ion etching can be used as the metal etching process. The groove 310 is located between adjacent LED units 200, and the bottom of the groove 310 exposes the driving substrate 10. Specifically, the groove 310 is a groove that penetrates the metal bonding layer 300 in the thickness direction. The groove 310 forms a gap on the metal bonding layer 300, and the metal bonding layer 300 is divided into a plurality of metal bonding parts arranged in an array. The metal bonding parts are arranged one by one below the LED unit 200, and adjacent metal bonding parts are arranged at intervals through the groove 310. In the process of forming the groove 310, the thickness of the first passivation layer 400 is thinned to 20-300 nm.

Please refer to Figure 24. After the metal bonding layer 300 is etched, there is no need to remove the mask process, and the second passivation is directly performed. An inorganic or organic dielectric material is used to cover the exposed bonding metal sidewalls of the groove 310 to form a second passivation layer 500. The sidewalls of the groove 310 are electrically isolated to prevent short circuits in subsequent metal routings, etc. At the same time, the metal with high reaction activity is protected to improve the compatibility of subsequent processes.

Please refer to Figures 25 and 26 , the dielectric layer above the step structure and the common contact of the driving substrate 10 is etched, that is, the first passivation layer 400 and the second passivation layer 500 are etched to form a third through hole 520, and the third through hole 520 exposes the light emitting surface 201 of the LED unit 200.

Please refer to FIG. 19 again, a transparent electrode layer 600 is deposited, and the transparent electrode layer 600 covers the light emitting surface 201 of each LED unit 200 to electrically connect the second doped semiconductor layer 230 of each LED unit 200, and further connect the second doped semiconductor layer 230 to the common contact of the driving substrate 10, so that the LED unit 200 is driven individually through the first contact 100. The transparent electrode layer 600 is made of a transparent material, such as ITO.

In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

The MicroLED display device and its preparation method provided in the embodiments of the present application are introduced in detail above, and the principles and implementation methods of the present application are explained by using specific examples. The description of the above embodiments is only used to help understand the technical solution and its core idea of the present application; ordinary technicians in this field should understand that: they can still modify the technical solutions recorded in the aforementioned embodiments, or replace some of the technical features therein with equivalents; and these modifications or replacements do not make the essence of the corresponding technical solution deviate from the scope of the technical solution of the embodiments of the present application.

Claims

A method for preparing a MicroLED display device, comprising:

A driving substrate (10), a metal bonding layer (300) and an LED unit (200) are provided, wherein the metal bonding layer (300) is arranged on the driving substrate (10), and a plurality of LED units (200) are arranged in an array on the metal bonding layer (300);

forming a first passivation layer (400), wherein the first passivation layer (400) covers the LED unit (200);

Patterning the first passivation layer (400) and using the first passivation layer (400) as a mask to form a plurality of holes or grooves on the metal bonding layer (300), wherein the holes or grooves are located between adjacent LED units (200), and the bottoms of the holes or grooves expose the driving substrate (10);

forming a second passivation layer (500), wherein the second passivation layer (500) covers the first passivation layer (400) and fills the hole or the groove;

Etching the first passivation layer (400) and the second passivation layer (500) to expose at least the light emitting surface (201) of the LED unit (200);

A transparent electrode layer (600) is formed, wherein the transparent electrode layer (600) covers the light emitting surface (201) and is electrically connected to the LED unit (200).
The method for preparing a MicroLED display device according to claim 1, wherein the LED unit (200) comprises a step structure formed by etching an LED epitaxial layer (20), the step structure comprising a first doped semiconductor layer (210), a second doped semiconductor layer (230) and an active layer (220) located therebetween; the step structure at least disconnects and electrically isolates the second doped semiconductor layers (230) of adjacent LED units (200);

The light emitting surface (201) is located on the second doped semiconductor layer (230).
The method for preparing a MicroLED display device according to claim 2, wherein providing a driving substrate (10), a metal bonding layer (300) and an LED unit (200) comprises:

Providing an LED epitaxial layer (20), wherein the LED epitaxial layer (20) is arranged on a substrate (30);

forming the metal bonding layer (300) on the driving substrate (10) and/or the LED epitaxial layer (20), and bonding the driving substrate (10) to the LED epitaxial layer (20);

removing the substrate (30);

Etching the LED epitaxial layer (20) into the step structure;

The driving substrate (10) comprises a plurality of first contacts (100), wherein the first contacts (100) are located between adjacent LED units (200).
The method for preparing a MicroLED display device according to claim 3, wherein when a plurality of holes or grooves are formed on the metal bonding layer (300), the bottoms of the holes or grooves are exposed to expose the first contacts (100);

Etching the first passivation layer (400) and the second passivation layer (500) to expose the light emitting surface (201) of the LED unit (200) and the first contact (100);

The transparent electrode layer (600) covers the light emitting surface (201) and the hole or groove to electrically connect the second doped semiconductor layer (230) of the LED unit (200) with the corresponding first contact (100), so that the LED unit (200) is driven alone through the first contact (100).
The method for preparing a MicroLED display device according to claim 2, wherein providing a driving substrate (10), a metal bonding layer (300) and an LED unit (200) comprises:

Providing an LED epitaxial layer (20), wherein the LED epitaxial layer (20) is arranged on a substrate (30);

forming the metal bonding layer (300) on the driving substrate (10) and/or the LED epitaxial layer (20), and bonding the driving substrate (10) to the LED epitaxial layer (20);

removing the substrate (30);

Etching the LED epitaxial layer (20) into the step structure;

The driving substrate (10) comprises a plurality of first contacts (100), wherein the first contacts (100) are located below the LED unit (200), and the metal bonding layer (300) electrically connects the first contacts (100) and the first doped semiconductor layer (210).
The method for preparing a MicroLED display device according to claim 5, wherein when a plurality of holes or grooves are formed on the metal bonding layer (300), the holes or grooves are spaced apart and electrically isolated from the metal bonding layer (300) below the adjacent LED units (200);

Etching the first passivation layer (400) and the second passivation layer (500) to expose the light emitting surface (201) of the LED unit (200);

The transparent electrode layer (600) covers the light emitting surface (201) of the adjacent LED unit (200) to electrically connect the second doped semiconductor layer (230) of the adjacent LED unit (200), so that the LED unit (200) is driven individually through the first contact point (100).
The method for preparing a MicroLED display device according to claim 1, wherein forming the first passivation layer (400) comprises:

Atomic layer deposition and plasma chemical vapor deposition of dielectric materials are sequentially used to form a laminated dielectric layer, wherein the laminated dielectric layer is the first passivation layer (400).
The method for preparing a MicroLED display device according to claim 7, wherein the atomic layer deposition and the plasma chemical vapor deposition are performed alternately multiple times to form the laminated dielectric layer.
According to the method for preparing a MicroLED display device according to claim 7, the material of the first passivation layer (400) can be selected from an inorganic dielectric material and/or an organic dielectric material; and/or the inorganic dielectric material is selected from one or more of SiO2 , Si3N4 , and Al2O3 .
The method for preparing a MicroLED display device according to any one of claims 1 to 9, wherein the hole or groove is formed by a metal etching process;

Before forming the hole or the groove, the thickness of the first passivation layer (400) is reduced to 20-300 nm.
A MicroLED display device, comprising:

A driving substrate (10);

a metal bonding layer (300), the metal bonding layer (300) being arranged on the driving substrate (10), the metal bonding layer (300) being provided with a plurality of holes or grooves penetrating therethrough, the bottoms of the holes or grooves exposing the driving substrate (10);

LED units (200), wherein a plurality of the LED units (200) are arranged in an array on the metal bonding layer (300), and the holes or grooves are located between adjacent LED units (200);

a first passivation layer (400), the first passivation layer (400) covering the LED unit (200) and exposing the hole or the groove;

a second passivation layer (500), the second passivation layer (500) covering the first passivation layer (400) and filling the hole or the groove;

The first passivation layer (400) and the second passivation layer (500) at least expose the light emitting surface of the LED unit (200);

A transparent electrode layer (600), the transparent electrode layer (600) covers the light emitting surface (201) and is electrically connected to the LED unit (200).
The MicroLED display device according to claim 11, wherein the LED unit (200) comprises a step structure formed by etching the LED epitaxial layer (20), the step structure comprising a first doped semiconductor layer (210), a second doped semiconductor layer (230) and an active layer (220) located therebetween; the step structure at least disconnects and electrically isolates the second doped semiconductor layers (230) of adjacent LED units (200);

The light emitting surface (201) is located on the second doped semiconductor layer (230).
The MicroLED display device according to claim 12, wherein the driving substrate (10) comprises a plurality of first contacts (100), and the first contacts (100) are located between adjacent LED units (200).
The MicroLED display device according to claim 13, wherein the bottom of the hole or the groove exposes the first contact (100), the first passivation layer (400) and the second passivation layer (500) also expose the first contact (100), and the transparent electrode layer (600) covers the light emitting surface (201) and the hole or the groove to electrically connect the second doped semiconductor layer (230) of the LED unit (200) with the corresponding first contact (100), so that the LED unit (200) is driven alone through the first contact (100).
The MicroLED display device according to claim 12, wherein the driving substrate (10) comprises a plurality of first contacts (100), the first contacts (100) are located below the LED unit (200), and the metal bonding layer (300) electrically connects the first contacts (100) and the first doped semiconductor layer (210).
The MicroLED display device according to claim 15, wherein the holes or grooves space and electrically isolate the metal bonding layers (300) below the adjacent LED units (200);

The transparent electrode layer (600) covers the light emitting surface (201) of the adjacent LED unit (200) to electrically connect the second doped semiconductor layer (230) of the adjacent LED unit (200), so that the LED unit (200) is driven individually through the first contact point (100).
The MicroLED display device according to claim 11, wherein the first passivation layer (400) is: a laminated dielectric layer formed by atomic layer deposition and plasma chemical vapor deposition in sequence.
The MicroLED display device according to claim 17, wherein the first passivation layer (400) is: a laminated dielectric layer formed by alternating multiple atomic layer deposition and plasma chemical vapor deposition.
The MicroLED display device according to claim 17, wherein the material of the first passivation layer (400) can be selected from an inorganic dielectric material and/or an organic dielectric material; and/or the inorganic dielectric material is selected from one or more of SiO2 , Si3N4 , and Al2O3 .
The MicroLED display device according to any one of claims 11 to 19, wherein the thickness of the first passivation layer (400) is 20 to 300 mm.